0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
会员中心
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
NLAST4501D

NLAST4501D

  • 厂商:

    ONSEMI(安森美)

  • 封装:

  • 描述:

    NLAST4501D - Single SPST Analog Switch - ON Semiconductor

  • 数据手册
  • 价格&库存
NLAST4501D 数据手册
NLAST4501 Single SPST Analog Switch The NLAST4501 is an analog switch manufactured in sub−micron silicon−gate CMOS technology. It achieves very low RON while maintaining extremely low power dissipation. The device is a bilateral switch suitable for switching either analog or digital signals, which may vary from zero to full supply voltage. The NLAST4501 is a low voltage, TTL (low threshold) compatible device, pin for pin compatible with the MAX4501. The Enable pin is compatible with standard TTL level outputs when supply voltage is nominal 5.0 Volts. It is also over−voltage tolerant, making it a very useful logic level translator. http://onsemi.com MARKING DIAGRAMS 5 1 SC70−5/SC−88A/SOT−353 DF SUFFIX CASE 419A • • • • • Guaranteed RON of 32 W at 5.5 V Low Power Dissipation: ICC = 2 mA Low Threshold Enable pin TTL compatible at 5.0 Volts TTL version and pin for pin with NLAS4501 Provides Voltage translation for many different voltage levels 3.3 to 5.0 Volts, Enable pin may go as high as )5.5 Volts 1.8 to 3.3 Volts 1.8 to 2.5 Volts Improved version of MAX4501 (at any voltage between 2 and 5.5 Volts) A3d Pin 1 5 1 SOT23−5/TSOP−5/SC59−5 DT SUFFIX CASE 483 Pin 1 A3d • • Chip Complexity: FETs = 11 d = Date Code PIN ASSIGNMENT Pin COM 1 5 VCC 1 2 NO 2 3 4 GND 3 4 ENABLE 5 Function COM NO GND ENABLE VCC Figure 1. Pinout (Top View) L H FUNCTION TABLE On/Off Enable Input State of Analog Switch Off On ORDERING INFORMATION See detailed ordering and shipping information on page 8 of this data sheet. © Semiconductor Components Industries, LLC, 2003 1 November, 2003 − Rev. 2 Publication Order Number: NLAST4501/D NLAST4501 MAXIMUM RATINGS Symbol VCC VIN VIS IIK TSTG TL TJ qJA PD MSL FR VESD Positive DC Supply Voltage Digital Input Voltage (Enable) Analog Output Voltage (VNO or VCOM) DC Current, Into or Out of Any Pin Storage Temperature Range Lead Temperature, 1 mm from Case for 10 Seconds Junction Temperature under Bias Thermal Resistance Power Dissipation in Still Air at 85_C Moisture Sensitivity Flammability Rating ESD Withstand Voltage Oxygen Index: 30% − 35% Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) Above VCC and Below GND at 85_C (Note 5) SC70−5/SC−88A (Note 1) TSOP−5 SC70−5/SC−88A TSOP−5 Parameter Value *0.5 to )7.0 *0.5 to )7.0 *0.5 to VCC )0.5 $20 *65 to )150 260 )150 350 230 150 200 Level 1 UL−94−VO (0.125 in) > 2000 > 100 N/A $300 V Unit V V V mA _C _C _C _C/W mW ILatch−Up Latch−Up Performance mA Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute−maximum−rated conditions is not implied. Functional operation should be restricted to the Recommended Operating Conditions. 1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow. 2. Tested to EIA/JESD22−A114−A. 3. Tested to EIA/JESD22−A115−A. 4. Tested to JESD22−C101−A. 5. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN VIO VIS TA tr, tf Positive DC Supply Voltage Digital Input Voltage (Enable) Static or Dynamic Voltage Across an Off Switch Analog Input Voltage (NO, COM) Operating Temperature Range, All Package Types Input Rise or Fall Time, (Enable Input) Vcc = 3.3 V $ 0.3 V Vcc = 5.0 V $ 0.5 V NORMALIZED FAILURE RATE Parameter Min 2.0 GND GND GND *55 0 0 Max 5.5 5.5 VCC VCC )125 100 20 Unit V V V V _C ns/V DEVICE JUNCTION TEMPERATURE VERSUS TIME TO 0.1% BOND FAILURES Junction Temperature °C 80 90 100 110 120 130 140 Time, Hours 1,032,200 419,300 178,700 79,600 37,000 17,800 8,900 Time, Years 117.8 47.9 20.4 9.4 4.2 2.0 1.0 FAILURE RATE OF PLASTIC = CERAMIC UNTIL INTERMETALLICS OCCUR TJ = 130_C TJ = 120_C TJ = 100_C TJ = 110_C TJ = 90_C TJ = 80_C 100 TIME, YEARS 1 1 10 1000 Figure 2. Failure Rate vs. Time Junction Temperature http://onsemi.com 2 NLAST4501 DC CHARACTERISTICS − Digital Section (Voltages Referenced to GND) Guaranteed Max Limit Symbol VIH Parameter Minimum High−Level Input Voltage, Enable Inputs Condition VCC 3.0 4.5 5.5 VIL Maximum Low−Level Input Voltage, Enable Inputs 3.0 4.5 5.5 IIN ICC Maximum Input Leakage Current, Enable Inputs Maximum Quiescent Supply Current (per package) VIN = 5.5 V or GND Enable and VIS = VCC or GND 0 V to 5.5 V 5.5 *55_C to 25_C 1.4 2.0 2.0 0.53 0.8 0.8 $0.1 1.0 t85_C 1.4 2.0 2.0 0.53 0.8 0.8 $1.0 1.0 t125_C 1.4 2.0 2.0 0.53 0.8 0.8 $1.0 2.0 mA mA V Unit V DC ELECTRICAL CHARACTERISTICS − Analog Section Guaranteed Max Limit Symbol RON Parameter Maximum ON Resistance (Figures 8 − 12) Condition VIN = VIH VIS = VCC to GND IIsI = v10.0 mA VIN = VIH IIsI = v10.0 mA VIS = 1 V, 2 V, 3.5 V VIN = VIL VNO = 1.0 V, VCOM = 4.5 V or VCOM = 1.0 V and VNO 4.5 V VIN = VIL VNO = 4.5 V or 1.0 V VCOM = 1.0 V or 4.5 V VCC 3.0 4.5 5.5 4.5 *55_C to 25_C 45 30 25 4 t85_C 50 35 30 4 t125_C 55 40 35 5 W Unit W RFLAT(ON) ON Resistance Flatness INO(OFF) Off Leakage Current, Pin 2 (Figure 3) Off Leakage Current, Pin 1 (Figure 3) 5.5 1 10 100 nA ICOM(OFF) 5.5 1 10 100 nA AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns) Guaranteed Max Limit VCC Symbol tON Parameter Turn−On Time Test Conditions RL = 300 W, CL = 35 pF (Figures 4, 5, and 13) (V) 2.0 3.0 4.5 5.5 tOFF Turn−Off Time RL = 300 W, CL = 35 pF (Figures 4, 5, and 13) 2.0 3.0 4.5 5.5 *55_C to 25_C Min Typ 7.0 5.0 4.5 4.5 11.0 7.0 5.0 5.0 Max 14 10 9 9 22 14 10 10 Min t85_C Typ Max 16 12 11 11 24 16 12 12 Typical @ 25, VCC = 5.0 V CIN CNO or CNC CCOM(OFF) CCOM(ON) Maximum Input Capacitance, Select Input Analog I/O (switch off) Common I/O (switch off) Feedthrough (switch on) 8 10 10 20 pF Min t125_C Typ Max 16 12 11 11 24 16 12 12 ns Unit ns http://onsemi.com 3 NLAST4501 ADDITIONAL APPLICATION CHARACTERISTICS (Voltages Referenced to GND Unless Noted) VCC Symbol BW Parameter Maximum On−Channel −3dB Bandwidth or Minimum Frequency Response Condition VIS = 0 dBm VIS centered between VCC and GND (Figures 6 and 14) VIS = 0 dBm @ 10 kHz VIS centered between VCC and GND (Figure 6) f = 100 kHz; VIS = 1 V RMS VIS centered between VCC and GND (Figures 6 and 15) VIS = VCC to GND, FIS = 20 kHz tr = tf = 3 ns RIS = 0 W, CL = 1000 pF Q = CL * DVOUT (Figures 7 and 16) FIS = 20 Hz to 1 MHz, RL = Rgen = 600 W, CL = 50 pF VIS = 3.0 VPP sine wave VIS = 5.0 VPP sine wave (Figure 17) V 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 3.0 5.5 1.5 3.0 pC Limit 25°C 190 200 220 *2 *2 *2 *93 dB dB Unit MHz VONL Maximum Feedthrough On Loss VISO Off−Channel Isolation Q Charge Injection Enable Input to Common I/O THD Total Harmonic Distortion THD ) Noise 3.3 5.5 0.3 0.15 % 1.00E+05 1.00E+04 1.00E+03 1.00E+02 LEAKAGE (pA) 1.00E+01 1.00E+00 1.00E−01 1.00E−02 1.00E−03 1.00E−04 1.00E−05 1.00E−06 1.00E−07 −55 −35 ICOM(ON) ICOM(OFF) INO(OFF) −15 5 25 45 65 85 105 125 145 TEMPERATURE (_C) Figure 3. Switch Leakage vs. Temperature http://onsemi.com 4 NLAST4501 VCC DUT VCC 0.1 mF 300 W NO COM VOUT 35 pF Output VOL tON tOFF Input 0V VOH 90% 90% 50% 50% Input Figure 4. tON/tOFF VCC DUT NO COM VOUT 35 pF 300 W Input VCC 50% 0V VOH Output VOL 10% 10% 50% Input tOFF tON Figure 5. tON/tOFF http://onsemi.com 5 NLAST4501 Reference COM NO 50 W Generator 50 W DUT Transmitted Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is the bandwidth of an On switch. VISO, Bandwidth and VONL are independent of the input signal direction. VISO = Off Channel Isolation = 20 Log VONL = On Channel Loss = 20 Log VOUT for VIN at 100 kHz VIN VOUT for VIN at 100 kHz to 50 MHz VIN Bandwidth (BW) = the frequency 3 dB below VONL Figure 6. Off Channel Isolation/On Channel Loss (BW)/Crosstalk (On Channel to Off Channel)/VONL DUT NO COM CL Output VIN VCC GND Off VIN On Off ∆VOUT Figure 7. Charge Injection: (Q) http://onsemi.com 6 NLAST4501 80 70 60 RON (Ω) 50 RON (Ω) 40 30 20 10 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 VCOM (VOLTS) VCC = 2.5 VCC = 3.0 VCC = 4.5 10 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 VIS (VOLTS) 125°C VCC = 2.0 80 70 60 50 40 30 20 −55°C 25°C 85°C Figure 8. RON vs. VCOM and VCC (@255C) Figure 9. RON vs. VCOM and Temperature, VCC = 2.0 V 45 40 35 30 RON (Ω) 25 20 15 10 5 0 0 125°C 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 85°C −55°C 25°C RON (Ω) 30 25 20 15 10 5 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 VCOM (VOLTS) 125°C 25°C 85°C −55°C VCOM (VOLTS) Figure 10. RON vs. VCOM and Temperature, VCC = 2.5 V Figure 11. RON vs. VCOM and Temperature, VCC = 3.0 V 35.0 18 16 14 RON (Ω) 12 10 8 6 4 2 0 0 0.4 0.8 1.2 1.6 2 2.4 2.8 3.2 3.6 4 4.4 VCOM (VOLTS) 125°C TIME (nS) 85°C 25°C −55°C 30.0 25.0 20.0 15.0 10.0 5.0 tOFF 0.0 2.0 3.0 4.5 VCC (V) 5.0 5.5 tON Figure 12. RON vs. VCOM and Temperature, VCC = 4.5 V Figure 13. Switching Time vs. Supply Voltage, T = 255C http://onsemi.com 7 NLAST4501 0 10 Bandwidth (On − Loss) OFF ISOLATION (dB/Div) 0 BANDWIDTH (dB/Div) Phase (Degrees) 5 PHASE (Degrees) 0 −50 VCC = 5.0 V TA = 25°C VCC = 5.0 V TA = 25°C 10 100 1 10 100 300 −100 10 100 1 FREQUENCY (MHz) 10 100 300 FREQUENCY (MHz) Figure 14. ON Channel Bandwidth and Phase Shift Over Frequency Figure 15. Off Channel Isolation 1.60 1.40 1.20 1.00 Q (pC) 0.80 0.60 0.40 0.20 0.00 0.0 VCC = 3.0 V VCC = 5.0 V 100 10 THD (%) 1 3.3 V 0.1 5.5 V 0.01 1.0 2.0 3.6 3.0 VCOM (V) 4.0 4.5 5.0 10 100 1000 10000 100000 1000000 FREQUENCY (Hz) Figure 16. Charge Injection vs. VCOM Figure 17. THD vs. Frequency DEVICE ORDERING INFORMATION Device Nomenclature Circuit Indicator NL NL Device Function 4501 4501 Package Suffix DF DT Tape & Reel Suffix T2 T1 Package Type (Name/SOT#/ Common Name) SC70−5/SC−88A/ SOT−353 SOT23−5/TSOP−5/ SC59−5 Tape & Reel Size 178 mm (7 in) 3000 Unit 178 mm (7 in) 3000 Unit Device Order Number NLAST4501DFT2 NLAST4501DTT1 Technology AST AST †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. http://onsemi.com 8 NLAST4501 PACKAGE DIMENSIONS SC−88A/SOT−353 DF SUFFIX CASE 419A−02 ISSUE G A G NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 419A−01 OBSOLETE. NEW STANDARD 419A−02. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. 5 4 S 1 2 3 −B− DIM A B C D G H J K N S D 5 PL 0.2 (0.008) M B M N J C INCHES MIN MAX 0.071 0.087 0.045 0.053 0.031 0.043 0.004 0.012 0.026 BSC −−− 0.004 0.004 0.010 0.004 0.012 0.008 REF 0.079 0.087 MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.80 1.10 0.10 0.30 0.65 BSC −−− 0.10 0.10 0.25 0.10 0.30 0.20 REF 2.00 2.20 H K TSOP−5 DT SUFFIX CASE 483−02 ISSUE C D 5 1 2 4 3 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. A AND B DIMENSIONS DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MILLIMETERS INCHES DIM MIN MAX MIN MAX A 2.90 3.10 0.1142 0.1220 B 1.30 1.70 0.0512 0.0669 C 0.90 1.10 0.0354 0.0433 D 0.25 0.50 0.0098 0.0197 G 0.85 1.05 0.0335 0.0413 H 0.013 0.100 0.0005 0.0040 J 0.10 0.26 0.0040 0.0102 K 0.20 0.60 0.0079 0.0236 L 1.25 1.55 0.0493 0.0610 M 0_ 10 _ 0_ 10 _ S 2.50 3.00 0.0985 0.1181 S B L G A J C 0.05 (0.002) H K M http://onsemi.com 9 NLAST4501 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800−282−9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. http://onsemi.com 10 NLAST4501/D
NLAST4501D 价格&库存

很抱歉,暂时无法提供与“NLAST4501D”相匹配的价格&库存,您可以联系我们找货

免费人工找货