NLAST4501_06

NLAST4501 Single SPST Analog Switch The NLAST4501 is an analog switch manufactured in sub−micron silicon−gate CMOS technology. It achieves very low RON while maintaining extremely low power dissipation. The device is a bilateral switch suitable for switching either analog or digital signals, which may vary from zero to full supply voltage. The NLAST4501 is a low voltage, TTL (low threshold) compatible device, pin for pin compatible with the MAX4501. The Enable pin is compatible with standard TTL level outputs when supply voltage is nominal 5.0 V. It is also over−voltage tolerant, making it a very useful logic level translator. Features http://onsemi.com MARKING DIAGRAMS A3 M G G 1 1 SC70−5/SC−88A/SOT−353 DF SUFFIX CASE 419A • • • • • • • Chip Complexity: FETs = 11 • Pb−Free Packages are Available Guaranteed RON of 32 W at 5.5 V Low Power Dissipation: ICC = 2 mA Low Threshold Enable pin TTL compatible at 5.0 V TTL version and pin for pin with NLAS4501 Provides Voltage translation for many different voltage levels 3.3 to 5.0 V, Enable pin may go as high as )5.5 V 1.8 to 3.3 V 1.8 to 2.5 V Improved version of MAX4501 (at any voltage between 2 and 5.5 V) 1 TSOP−5 DT SUFFIX CASE 483 1 A3AYW G G A3 = Specific Device Code M = Date Code* A = Assembly Location Y = Year W = Work Week G = Pb−Free Package (Note: Microdot may be in either location) *Date Code orientation and/or position and underbar may vary depending upon manufacturing location. 5 VCC Pin COM 1 PIN ASSIGNMENT Function COM NO GND ENABLE VCC NO 2 1 2 GND 3 4 ENABLE 3 4 5 Figure 1. Pinout (Top View) FUNCTION TABLE On/Off Enable Input L H State of Analog Switch Off On ORDERING INFORMATION See detailed ordering and shipping information on page 8 of this data sheet. © Semiconductor Components Industries, LLC, 2006 1 May, 2006 − Rev. 4 Publication Order Number: NLAST4501/D NLAST4501 MAXIMUM RATINGS Rating Positive DC Supply Voltage Digital Input Voltage (Enable) Analog Output Voltage (VNO or VCOM) DC Current, Into or Out of Any Pin Storage Temperature Range Lead Temperature, 1 mm from Case for 10 Seconds Junction Temperature under Bias Thermal Resistance Power Dissipation in Still Air at 85_C Moisture Sensitivity Flammability Rating ESD Withstand Voltage Oxygen Index: 30% − 35% Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) Above VCC and Below GND at 85_C (Note 5) SC70−5/SC−88A (Note 1) TSOP−5 SC70−5/SC−88A TSOP−5 Symbol VCC VIN VIS IIK TSTG TL TJ qJA PD MSL FR VESD Value *0.5 to )7.0 *0.5 to )7.0 *0.5 to VCC )0.5 $20 *65 to )150 260 )150 350 230 150 200 Level 1 UL 94 V−0 @ 0.125 in > 2000 > 100 N/A $300 V Unit V V V mA _C _C _C _C/W mW Latchup Performance ILatchup mA Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow. 2. Tested to EIA/JESD22−A114−A. 3. Tested to EIA/JESD22−A115−A. 4. Tested to JESD22−C101−A. 5. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Parameter Positive DC Supply Voltage Digital Input Voltage (Enable) Static or Dynamic Voltage Across an Off Switch Analog Input Voltage (NO, COM) Operating Temperature Range, All Package Types Input Rise or Fall Time, (Enable Input) Vcc = 3.3 V $ 0.3 V Vcc = 5.0 V $ 0.5 V NORMALIZED FAILURE RATE Symbol VCC VIN VIO VIS TA tr, tf Min 2.0 GND GND GND *55 0 0 Max 5.5 5.5 VCC VCC )125 100 20 Unit V V V V _C ns/V DEVICE JUNCTION TEMPERATURE VERSUS TIME TO 0.1% BOND FAILURES Junction Temperature °C 80 90 100 110 120 130 140 Time, Hours 1,032,200 419,300 178,700 79,600 37,000 17,800 8,900 Time, Years 117.8 47.9 20.4 9.4 4.2 2.0 1.0 FAILURE RATE OF PLASTIC = CERAMIC UNTIL INTERMETALLICS OCCUR TJ = 130_C TJ = 120_C TJ = 100_C TJ = 110_C TJ = 90_C TJ = 80_C 100 TIME, YEARS 1 1 10 1000 Figure 2. Failure Rate vs. Time Junction Temperature http://onsemi.com 2 NLAST4501 DC CHARACTERISTICS − Digital Section (Voltages Referenced to GND) Guaranteed Max Limit Parameter Minimum High−Level Input Voltage, Enable Inputs Condition Symbol VIH VCC 3.0 4.5 5.5 3.0 4.5 5.5 0 V to 5.5 V 5.5 *55_C to 25_C 1.4 2.0 2.0 0.53 0.8 0.8 $0.1 1.0 t85_C 1.4 2.0 2.0 0.53 0.8 0.8 $1.0 1.0 t125_C 1.4 2.0 2.0 0.53 0.8 0.8 $1.0 2.0 Unit V Maximum Low−Level Input Voltage, Enable Inputs VIL V Maximum Input Leakage Current, Enable Inputs Maximum Quiescent Supply Current (per package) VIN = 5.5 V or GND Enable and VIS = VCC or GND IIN ICC mA mA DC ELECTRICAL CHARACTERISTICS − Analog Section Guaranteed Max Limit Parameter Maximum ON Resistance (Figures 8 − 12) ON Resistance Flatness Condition VIN = VIH VIS = VCC to GND IIsI = v10.0mA VIN = VIH IIsI = v10.0 mA VIS = 1 V, 2 V, 3.5 V VIN = VIL VNO = 1.0 V, VCOM = 4.5 V or VCOM = 1.0 V and VNO 4.5 V VIN = VIL VNO = 4.5 V or 1.0 V VCOM = 1.0 V or 4.5 V Symbol RON VCC 3.0 4.5 5.5 4.5 *55_C to 25_C 45 30 25 4 t85_C 50 35 30 4 t125_C 55 40 35 5 Unit W RFLAT(ON) W Off Leakage Current, Pin 2 (Figure 3) Off Leakage Current, Pin 1 (Figure 3) INO(OFF) 5.5 1 10 100 nA ICOM(OFF) 5.5 1 10 100 nA AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns) Guaranteed Max Limit VCC Parameter Turn−On Time Test Conditions RL = 300 W, CL = 35 pF (Figures 4, 5, and 13) Symbol tON (V) 2.0 3.0 4.5 5.5 2.0 3.0 4.5 5.5 *55_C to 25_C Min Typ 7.0 5.0 4.5 4.5 11.0 7.0 5.0 5.0 Max 14 10 9 9 22 14 10 10 Min t85_C Typ Max 16 12 11 11 24 16 12 12 Min t125_C Typ Max 16 12 11 11 24 16 12 12 Unit ns Turn−Off Time RL = 300 W, CL = 35 pF (Figures 4, 5, and 13) tOFF ns Typical @ 25, VCC = 5.0 V Maximum Input Capacitance, Select Input Analog I/O (switch off) Common I/O (switch off) Feedthrough (switch on) CIN CNO or CNC CCOM(OFF) CCOM(ON) 8 10 10 20 pF http://onsemi.com 3 NLAST4501 ADDITIONAL APPLICATION CHARACTERISTICS (Voltages Referenced to GND Unless Noted) VCC Parameter Maximum On−Channel −3dB Bandwidth or Minimum Frequency Response Maximum Feedthrough On Loss Condition VIS = 0 dBm VIS centered between VCC and GND (Figures 6 and 14) VIS = 0 dBm @ 10 kHz VIS centered between VCC and GND (Figure 6) f = 100 kHz; VIS = 1 V RMS VIS centered between VCC and GND (Figures 6 and 15) VIS = VCC to GND, FIS = 20 kHz tr = tf = 3 ns RIS = 0 W, CL = 1000 pF Q = CL * DVOUT (Figures 7 and 16) FIS = 20 Hz to 1 MHz, RL = Rgen = 600 W, CL = 50 pF VIS = 3.0 VPP sine wave VIS = 5.0 VPP sine wave (Figure 17) Symbol BW V 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 3.0 5.5 Limit 25°C 190 200 220 *2 *2 *2 *93 Unit MHz VONL dB Off−Channel Isolation VISO dB Charge Injection Enable Input to Common I/O Q 1.5 3.0 pC Total Harmonic Distortion THD ) Noise THD 3.3 5.5 0.3 0.15 % 1.00E+05 1.00E+04 1.00E+03 1.00E+02 1.00E+01 1.00E+00 1.00E−01 1.00E−02 1.00E−03 1.00E−04 1.00E−05 1.00E−06 1.00E−07 −55 −35 LEAKAGE (pA) ICOM(ON) ICOM(OFF) INO(OFF) −15 5 25 45 65 85 105 125 145 TEMPERATURE (_C) Figure 3. Switch Leakage vs. Temperature http://onsemi.com 4 NLAST4501 VCC DUT VCC 0.1 mF 300 W NO COM VOUT 35 pF Output VOL tON tOFF Input 0V VOH 90% 90% 50% 50% Input Figure 4. tON/tOFF VCC DUT NO COM VOUT 35 pF 300 W Input VCC 50% 0V VOH Output VOL 10% tOFF tON 10% 50% Input Figure 5. tON/tOFF http://onsemi.com 5 NLAST4501 Reference COM NO 50 W Generator 50 W DUT Transmitted Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is the bandwidth of an On switch. VISO, Bandwidth and VONL are independent of the input signal direction. VISO = Off Channel Isolation = 20 Log VONL = On Channel Loss = 20 Log VOUT VIN for VIN at 100 kHz VOUT for VIN at 100 kHz to 50 MHz VIN Bandwidth (BW) = the frequency 3 dB below VONL Figure 6. Off Channel Isolation/On Channel Loss (BW)/Crosstalk (On Channel to Off Channel)/VONL DUT NO COM CL Output VIN VCC GND Off VIN On Off DVOUT Figure 7. Charge Injection: (Q) http://onsemi.com 6 NLAST4501 80 70 60 RON (W) 50 RON (W) 40 30 20 10 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 VCOM (VOLTS) VCC = 2.5 VCC = 3.0 VCC = 4.5 10 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 VIS (VOLTS) 125°C VCC = 2.0 80 70 60 50 40 30 20 −55°C 25°C 85°C Figure 8. RON vs. VCOM and VCC (@255C) Figure 9. RON vs. VCOM and Temperature, VCC = 2.0 V 45 40 35 30 RON (W) 25 20 15 10 5 0 0 125°C 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 85°C −55°C 25°C RON (W) 30 25 20 15 10 5 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 VCOM (VOLTS) 125°C 25°C 85°C −55°C VCOM (VOLTS) Figure 10. RON vs. VCOM and Temperature, VCC = 2.5 V Figure 11. RON vs. VCOM and Temperature, VCC = 3.0 V 35.0 18 16 14 RON (W) 12 10 8 6 4 2 0 0 0.4 0.8 1.2 1.6 2 2.4 2.8 3.2 3.6 4 4.4 VCOM (VOLTS) 125°C TIME (nS) 85°C 25°C −55°C 30.0 25.0 20.0 15.0 10.0 5.0 tOFF 0.0 2.0 3.0 4.5 VCC (V) 5.0 5.5 tON Figure 12. RON vs. VCOM and Temperature, VCC = 4.5 V Figure 13. Switching Time vs. Supply Voltage, T = 255C http://onsemi.com 7 NLAST4501 0 10 Bandwidth (On − Loss) OFF ISOLATION (dB/Div) 0 BANDWIDTH (dB/Div) Phase (Degrees) 5 PHASE (Degrees) 0 −50 VCC = 5.0 V TA = 25°C VCC = 5.0 V TA = 25°C 10 100 1 10 100 300 −100 10 100 1 FREQUENCY (MHz) 10 100 300 FREQUENCY (MHz) Figure 14. ON Channel Bandwidth and Phase Shift Over Frequency Figure 15. Off Channel Isolation 1.60 1.40 1.20 1.00 Q (pC) 0.80 0.60 0.40 0.20 0.00 0.0 VCC = 3.0 V VCC = 5.0 V 100 10 THD (%) 1 3.3 V 0.1 5.5 V 0.01 1.0 2.0 3.6 3.0 VCOM (V) 4.0 4.5 5.0 10 100 1000 10000 100000 1000000 FREQUENCY (Hz) Figure 16. Charge Injection vs. VCOM Figure 17. THD vs. Frequency ORDERING INFORMATION Device Nomenclature Circuit Indicator Device Function Package Suffix Tape & Reel Suffix Device NLAST4501DFT2 Technology Package SC−88A/SOT−353/ SC70 Shipping† DF NLAST4501DFT2G NLAST4501DTT1 DT NLAST4501DTT1G NL AST 4501 T2 SC−88A/SOT−353/ SC70 (Pb−Free) TSOP−5 3000/Tape & Reel T1 TSOP−5 (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. http://onsemi.com 8 NLAST4501 PACKAGE DIMENSIONS SC−88A / SOT−353 / SC−70 CASE 419A−02 ISSUE J A G 5 4 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 419A−01 OBSOLETE. NEW STANDARD 419A−02. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. S 1 2 3 −B− D 5 PL 0.2 (0.008) M B M N J C DIM A B C D G H J K N S INCHES MIN MAX 0.071 0.087 0.045 0.053 0.031 0.043 0.004 0.012 0.026 BSC −−− 0.004 0.004 0.010 0.004 0.012 0.008 REF 0.079 0.087 MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.80 1.10 0.10 0.30 0.65 BSC −−− 0.10 0.10 0.25 0.10 0.30 0.20 REF 2.00 2.20 H K SOLDERING FOOTPRINT* 0.50 0.0197 0.65 0.025 0.65 0.025 0.40 0.0157 1.9 0.0748 SCALE 20:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 9 NLAST4501 PACKAGE DIMENSIONS TSOP−5 CASE 483−02 ISSUE E D 5 1 2 4 3 S B L G A J C 0.05 (0.002) H K M NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. A AND B DIMENSIONS DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MILLIMETERS MIN MAX 2.90 3.10 1.30 1.70 0.90 1.10 0.25 0.50 0.85 1.05 0.013 0.100 0.10 0.26 0.20 0.60 1.25 1.55 0_ 10 _ 2.50 3.00 INCHES MIN MAX 0.1142 0.1220 0.0512 0.0669 0.0354 0.0433 0.0098 0.0197 0.0335 0.0413 0.0005 0.0040 0.0040 0.0102 0.0079 0.0236 0.0493 0.0610 0_ 10 _ 0.0985 0.1181 DIM A B C D G H J K L M S SOLDERING FOOTPRINT* 1.9 0.074 0.95 0.037 2.4 0.094 1.0 0.039 0.7 0.028 SCALE 10:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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