NLU1GT50CMX1TCG

ON Semiconductor Is Now To learn more about onsemi™, please visit our website at www.onsemi.com onsemi and       and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. onsemi reserves the right to make changes at any time to any products or information herein, without notice. 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Should Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. Other names and brands may be claimed as the property of others. NLU1GT50 Single Buffer, Non-Inverting, TTL Level TTL−Compatible Inputs The NLU1GT50 MiniGatet is an advanced CMOS high−speed non−inverting buffer in ultra−small footprint. The device input is compatible with TTL−type input thresholds and the output has a full 5.0 V CMOS level output swing. The NLU1GT50 input and output structures provide protection when voltages up to 7.0 V are applied, regardless of the supply voltage. • • • • MARKING DIAGRAMS 1 Features • • • • • www.onsemi.com Designed for 1.65 to 5.5 V VCC Operation High Speed: tPD = 3.5 ns (Typ) @ VCC = 5.0 V Low Power Dissipation: ICC = 1 mA (Max) at TA = 25°C TTL−Compatible Input: VIL = 0.8 V; VIH = 2.0 V, VCC = 5.0 V CMOS−Compatible Output: VOH > 0.8 VCC; VOL < 0.1 VCC @ Load Power Down Protection Provided on inputs Balanced Propagation Delays Ultra−Small Packages These are Pb−Free Devices 1 1 UDFN6 MU SUFFIX CASE 517AA LM ULLGA6 1.0 x 1.0 CASE 613AD LM ULLGA6 1.45 x 1.0 CASE 613AF LM UDFN6 1.0 x 1.0 CASE 517BX VM UDFN6 1.45 x 1.0 CASE 517AQ RM 1 NC 1 6 VCC 1 IN A 2 5 NC L M GND 3 4 = Device Marking = Date Code OUT Y ORDERING INFORMATION See detailed ordering and shipping information on page 4 of this data sheet. Figure 1. Pinout (Top View) 1 IN A OUT Y Figure 2. Logic Symbol FUNCTION TABLE PIN ASSIGNMENT 1 NC 2 IN A 3 GND A Y 4 OUT Y L H L H 5 NC 6 VCC © Semiconductor Components Industries, LLC, 2016 June, 2016 − Rev. 5 1 Publication Order Number: NLU1GT50/D NLU1GT50 MAXIMUM RATINGS Symbol Value Unit VCC DC Supply Voltage −0.5 to +7.0 V VIN DC Input Voltage −0.5 to +7.0 V DC Output Voltage −0.5 to +7.0 V VIN < GND −20 mA VOUT < GND ±20 mA VOUT Parameter IIK DC Input Diode Current IOK DC Output Diode Current IO DC Output Source/Sink Current ±12.5 mA ICC DC Supply Current Per Supply Pin ±25 mA IGND DC Ground Current per Ground Pin ±25 mA TSTG Storage Temperature Range −65 to +150 °C TL Lead Temperature, 1 mm from Case for 10 Seconds 260 °C TJ Junction Temperature Under Bias 150 °C MSL FR VESD ILATCHUP1 Moisture Sensitivity Level 1 Flammability Rating Oxygen Index: 28 to 34 ESD Withstand Voltage UL 94 V−0 @ 0.125 in Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) Latchup Performance Above VCC and Below GND at 125 °C (Note 5) > 2000 > 200 N/A V ±500 mA Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2 ounce copper trace no air flow. 2. Tested to EIA / JESD22−A114−A. 3. Tested to EIA / JESD22−A115−A. 4. Tested to JESD22−C101−A. 5. Tested to EIA / JESD78. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit 1.65 5.5 V VCC Positive DC Supply Voltage VIN Digital Input Voltage 0 5.5 V Output Voltage 0 5.5 V −55 +125 °C 0 0 100 20 ns/V VOUT TA Operating Free−Air Temperature Dt/DV Input Transition Rise or Fall Rate VCC = 3.3 V ± 0.3 V VCC = 5.0 V ± 0.5 V www.onsemi.com 2 NLU1GT50 DC ELECTRICAL CHARACTERISTICS TA = +855C TA = 25 5C Symbol Parameter VIH Low−Level Input Voltage VIL VOH VOL Conditions Low−Level Input Voltage High−Level Output Voltage Low−Level Output Voltage VIN = VIH or VIL VCC (V) Min Typ Max Min 1.65 to 2.29 0.50 x VCC 0.50 x VCC 2.3 to 2.99 0.45 x VCC 0.45 x VCC 3.0 1.4 1.4 4.5 to 5.5 2.0 Max TA = −555C to +1255C Min Max V 2.0 1.65 to 2.29 0.10 x VCC 0.10 x VCC 0.10 x VCC 2.3 to 2.99 0.15 x VCC 0.15 x VCC 0.15 x VCC 3.0 0.53 0.53 0.53 4.5 to 5.5 0.8 0.8 0.8 VCC– 0.1 VCC– 0.1 3.0 2.9 2.9 4.5 4.4 4.4 2.48 3.80 2.34 3.66 V V 1.65 to 2.99 VCC– 0.1 3.0 2.9 4.5 4.4 VIN = VIH or VIL IOH = −4 mA IOH = −8 mA 3.0 4.5 2.58 3.94 VIN = VIH or VIL IOL = 50 mA 1.65 to 2.99 0 0.1 0.1 0.1 3.0 0 0.1 0.1 0.1 4.5 0 0.1 0.1 0.1 IOH = −50 mA Unit VIN = VIH or VIL IOL = 4 mA IOL = 8 mA 3.0 4.5 0.36 0.36 0.44 0.44 0.52 0.52 V IIN Input Leakage Current 0 = VIN = 5.5 V 0 to 5.5 ±0.1 ±1.0 ±1.0 mA ICC Quiescent Supply Current VIN = 5.5 V or GND 5.5 1.0 20 40 mA ICCT Quiescent Supply Current VIN = 3.4 V 5.5 1.35 1.50 1.65 mA IOPD Output Leakage Current VOUT = 5.5 V 0.0 0.5 5.0 10 mA www.onsemi.com 3 NLU1GT50 AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 n) Parameter Symbol tPLH, tPHL Propagation Delay, Input A to Output Y TA = 25 5C VCC (V) Test Condition 1.65 to 1.95 CL = 15 pF 16.6 2.3 to 2.7 CL = 15 pF Min Typ CL = 50 pF 3.0 to 3.6 4.5 to 5.5 CIN Input Capacitance CPD Power Dissipation Capacitance (Note 6) Max TA = +855C TA = −555C to +1255C Min Min Max Max Unit 18.0 22.0 ns 13.3 14.5 17.5 19.5 22.0 25.5 CL = 15 pF 4.5 10.0 11.0 13.0 CL = 50 pF 6.3 13.5 15.0 17.5 CL = 15 pF 3.5 6.7 7.5 8.5 CL = 50 pF 4.3 7.7 8.5 9.5 5 10 10 10.0 5.0 12 pF pF 6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the dynamic operating current consumption without load. Average operating current can be obtained by the equation ICC(OPR) = CPD • VCC • fin + ICC. CPD is used to determine the no−load dynamic power consumption: PD = CPD • VCC2 • fin + ICC • VCC. TEST POINT A VCC 50% OUTPUT DEVICE UNDER TEST GND tPLH tPHL CL * VOH Y 50% VCC VOL *Includes all probe and jig capacitance Figure 3. Switching Waveforms Figure 4. Test Circuit ORDERING INFORMATION Package Shipping† UDFN6, 1.2 x 1.0, 0.4P (Pb−Free) 3000 / Tape & Reel NLU1GT50AMX1TCG ULLGA6, 1.45 x 1.0, 0.5P (Pb−Free) 3000 / Tape & Reel NLU1GT50CMX1TCG ULLGA6, 1.0 x 1.0, 0.35P (Pb−Free) 3000 / Tape & Reel NLU1GT50AMUTCG UDFN6, 1.45 x 1.0, 0.5P (Pb−Free) 3000 / Tape & Reel NLU1GT50CMUTCG UDFN6, 1.0 x 1.0, 0.35P (Pb−Free) 3000 / Tape & Reel Device NLU1GT50MUTCG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 4 NLU1GT50 PACKAGE DIMENSIONS UDFN6 1.45x1.0, 0.5P CASE 517AQ ISSUE O A B D L L L1 PIN ONE REFERENCE 0.10 C ÉÉÉ ÉÉÉ DETAIL A E OPTIONAL CONSTRUCTIONS DETAIL B OPTIONAL CONSTRUCTIONS A 0.05 C A1 SIDE VIEW MOLD CMPD DETAIL B 0.05 C 6X DIM A A1 A2 b D E e L L1 ÉÉ ÉÉ EXPOSED Cu TOP VIEW 0.10 C A2 6X C 6X SEATING PLANE 0.30 PACKAGE OUTLINE L 1.24 3 DETAIL A 6X 0.53 4 BOTTOM VIEW MILLIMETERS MIN MAX 0.45 0.55 0.00 0.05 0.07 REF 0.20 0.30 1.45 BSC 1.00 BSC 0.50 BSC 0.30 0.40 −−− 0.15 MOUNTING FOOTPRINT e 1 6 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM THE TERMINAL TIP. 6X 0.50 PITCH DIMENSIONS: MILLIMETERS b 0.10 C A B 0.05 C 1 NOTE 3 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 5 NLU1GT50 PACKAGE DIMENSIONS UDFN6 1.0x1.0, 0.35P CASE 517BX ISSUE O PIN ONE REFERENCE 2X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.20 MM FROM TERMINAL TIP. 4. PACKAGE DIMENSIONS EXCLUSIVE OF BURRS AND MOLD FLASH. A B D ÉÉÉ ÉÉÉ ÉÉÉ E 0.10 C 2X 0.10 C DIM A A1 A3 b D E e L L1 TOP VIEW A3 0.05 C A MILLIMETERS MIN MAX 0.45 0.55 0.00 0.05 0.13 REF 0.12 0.22 1.00 BSC 1.00 BSC 0.35 BSC 0.25 0.35 0.30 0.40 0.05 C SIDE VIEW A1 C RECOMMENDED SOLDERING FOOTPRINT* SEATING PLANE 5X e 5X 0.48 L 6X 0.22 3 1 L1 1.18 6 4 BOTTOM VIEW 6X b 0.10 M C A B 0.05 M C 0.53 1 PKG OUTLINE NOTE 3 0.35 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 6 NLU1GT50 PACKAGE DIMENSIONS UDFN6, 1.2x1.0, 0.4P CASE 517AA ISSUE D EDGE OF PACKAGE PIN ONE REFERENCE 2X 0.10 C L1 ÉÉ ÉÉ E DETAIL A Bottom View (Optional) TOP VIEW 2X EXPOSED Cu 0.10 C (A3) 0.10 C A1 A 10X 0.08 C ÉÉÉ ÉÉÉ MOLD CMPD 5X DIM A A1 A3 b D E e L L1 L2 MILLIMETERS MIN MAX 0.45 0.55 0.00 0.05 0.127 REF 0.15 0.25 1.20 BSC 1.00 BSC 0.40 BSC 0.30 0.40 0.00 0.15 0.40 0.50 MOUNTING FOOTPRINT* 6X C A1 A3 DETAIL B Side View (Optional) SEATING PLANE SIDE VIEW 1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 mm FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. A B D 6X 0.42 0.22 L 3 L2 6X b 0.10 C A B 0.05 C 6 0.40 PITCH 4 e NOTE 3 BOTTOM VIEW 1.07 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 7 NLU1GT50 PACKAGE DIMENSIONS ULLGA6 1.0x1.0, 0.35P CASE 613AD ISSUE A PIN ONE REFERENCE 0.10 C ÉÉ ÉÉ 0.10 C NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM THE TERMINAL TIP. 4. A MAXIMUM OF 0.05 PULL BACK OF THE PLATED TERMINAL FROM THE EDGE OF THE PACKAGE IS ALLOWED. A B D E DIM A A1 b D E e L L1 TOP VIEW 0.05 C A 6X 0.05 C MOUNTING FOOTPRINT SOLDERMASK DEFINED* SEATING PLANE SIDE VIEW C A1 e 5X L MILLIMETERS MIN MAX −−− 0.40 0.00 0.05 0.12 0.22 1.00 BSC 1.00 BSC 0.35 BSC 0.25 0.35 0.30 0.40 5X 0.48 NOTE 4 3 1 6X 0.22 1.18 L1 0.53 6 4 6X b 0.35 PITCH DIMENSIONS: MILLIMETERS 0.10 C A B BOTTOM VIEW 1 PKG OUTLINE 0.05 C NOTE 3 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 8 NLU1GT50 PACKAGE DIMENSIONS ULLGA6 1.45x1.0, 0.5P CASE 613AF ISSUE A PIN ONE REFERENCE 0.10 C NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM THE TERMINAL TIP. 4. A MAXIMUM OF 0.05 PULL BACK OF THE PLATED TERMINAL FROM THE EDGE OF THE PACKAGE IS ALLOWED. A B D ÉÉÉ ÉÉÉ E DIM A A1 b D E e L L1 TOP VIEW 0.10 C 0.05 C A 6X 0.05 C MOUNTING FOOTPRINT SOLDERMASK DEFINED* SEATING PLANE SIDE VIEW 5X C A1 e 5X L MILLIMETERS MIN MAX −−− 0.40 0.00 0.05 0.15 0.25 1.45 BSC 1.00 BSC 0.50 BSC 0.25 0.35 0.30 0.40 0.49 NOTE 4 3 1 1.24 L1 0.53 6 4 BOTTOM VIEW 6X 0.30 6X b 0.10 C A B 0.05 C NOTE 3 1 PKG OUTLINE 0.50 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. MiniGate is a trademark of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 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