DATA SHEET
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Single 2-Input AND Gate
MARKING
DIAGRAMS
NL17SZ08
The NL17SZ08 is a single 2−input AND Gate in tiny footprint
packages.
SC−88A
DF SUFFIX
CASE 419A
XX MG
G
SC−74A
DBV SUFFIX
CASE 318BQ
XXX MG
G
SOT−553
XV5 SUFFIX
CASE 463B
XX MG
G
SOT−953
P5 SUFFIX
CASE 527AE
XM
Features
•
•
•
•
•
•
•
•
•
Designed for 1.65 V to 5.5 V VCC Operation
2.7 ns tPD at VCC = 5 V (typ)
Inputs/Outputs Overvoltage Tolerant up to 5.5 V
IOFF Supports Partial Power Down Protection
Source/Sink 24 mA at 3.0 V
Available in SC−88A, SC−74A, SOT−553, SOT−953 and UDFN6
Packages
Chip Complexity < 100 FETs
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
A
B
&
1
UDFN6
1.45 x 1.0
CASE 517AQ
1
Y
UDFN6
1.0 x 1.0
CASE 517BX
Figure 1. Logic Symbol
XX
M
G
XM
XM
1
= Specific Device Code
= Date Code*
= Pb−Free Package
*Date Code orientation and/or position may
vary depending upon manufacturing location.
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 7 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
May, 2022 − Rev. 27
1
Publication Order Number:
NL17SZ08/D
NL17SZ08
B
VCC
1
5
A
VCC
A
5
1
B
1
6
VCC
A
2
5
NC
GND
3
4
Y
GND
2
2
GND
4
3
Y
B
Y
4
3
SOT−953
(SC−88A/SOT−553/SC−74A)
UDFN6
Figure 2. Pinout (Top View)
PIN ASSIGNMENT
(SC−88A/SOT−553/SC−74A)
PIN ASSIGNMENT (SOT−953)
PIN ASSIGNMENT (UDFN)
Pin
Function
Pin
Function
Pin
Function
1
B
1
A
1
B
2
A
2
GND
2
A
3
GND
3
B
3
GND
4
Y
4
Y
4
Y
5
VCC
5
VCC
5
NC
6
VCC
FUNCTION TABLE
Output
Y = AB
Input
A
B
Y
L
L
L
L
H
L
H
L
L
H
H
H
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2
NL17SZ08
MAXIMUM RATINGS
Symbol
Value
Unit
VCC
DC Supply Voltage
(NLV)
−0.5 to +7.0
−0.5 to +6.5
V
VIN
DC Input Voltage
(NLV)
−0.5 to +7.0
−0.5 to +6.5
V
V
VOUT
Characteristics
DC Output Voltage
(NLV)
Active−Mode (High or Low State)
Tri−State Mode (Note 1)
Power−Down Mode (VCC = 0 V)
−0.5 to VCC + 0.5
−0.5 to +7.0
−0.5 to +7.0
DC Output Voltage
(NL17SZ08P5T5G−L22088 Only)
−0.5 to VCC + 0.5
DC Output Voltage
Active−Mode (High or Low State)
Tri−State Mode (Note 1)
Power−Down Mode (VCC = 0 V)
−0.5 to VCC + 0.5
−0.5 to +6.5
−0.5 to +6.5
IIK
DC Input Diode Current
IOK
IOUT
ICC or IGND
TSTG
VIN < GND
−50
mA
DC Output Diode Current
VOUT < GND
−50
mA
DC Output Diode Current
(NL17SZ08P5T5G−L22088 Only)
±50
DC Output Source/Sink Current
±50
mA
DC Supply Current per Supply Pin or Ground Pin
±100
mA
−65 to +150
°C
TL
Storage Temperature Range
Lead Temperature, 1 mm from Case for 10 secs
260
°C
TJ
Junction Temperature Under Bias
+150
°C
qJA
Thermal Resistance (Note 2)
SC−88A
SC−74A
SOT−553
SOT−953
UDFN6
377
320
324
254
154
°C/W
PD
Power Dissipation in Still Air
SC−88A
SC−74A
SOT−553
SOT−953
UDFN6
332
390
386
491
812
mW
Level 1
−
MSL
Moisture Sensitivity
FR
Flammability Rating
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
−
ESD Withstand Voltage (Note 3)
Human Body Model
Charged Device Model
2000
1000
V
$100
mA
VESD
ILatchup
Latchup Performance (Note 4)
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Applicable to devices with outputs that may be tri−stated.
2. Measured with minimum pad spacing on an FR4 board, using 10mm−by−1inch, 2 ounce copper trace no air flow per JESD51−7.
3. HBM tested to ANSI/ESDA/JEDEC JS−001−2017. CDM tested to EIA/JESD22−C101−F. JEDEC recommends that ESD qualification to
EIA/JESD22−A115−A (Machine Model) be discontinued per JEDEC/JEP172A.
4. Tested to EIA/JESD78 Class II.
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3
NL17SZ08
RECOMMENDED OPERATING CONDITIONS
Symbol
Characteristics
VCC
Positive DC Supply Voltage
VIN
DC Input Voltage
VOUT
TA
tr , tf
Min
Max
Unit
1.65
5.5
V
0
5.5
V
DC Output Voltage
Active−Mode (High or Low State)
Tri−State Mode (Note 1)
Power−Down Mode (VCC = 0 V)
0
0
0
VCC
5.5
5.5
V
DC Output Voltage
(NL17SZ08P5T5G−L22088 Only)
0
VCC
Operating Temperature Range
−55
+125
°C
Input Rise and Fall Time
(NLV)
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
0
0
100
20
ns/V
Input Rise and Fall Time
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
0
0
0
0
20
20
10
5
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
Symbol
VIH
VIL
TA = 255C
−555C 3 TA 3 1255C
VCC
(V)
Min
Typ
Max
Min
Max
Units
High−Level Input Voltage (NLV)
and NL17SZ08P5T5G−L22088
1.65 to 1.95
0.75 x VCC
−
−
0.75 x VCC
−
V
2.3 to 5.5
0.70 x VCC
−
−
0.70 x VCC
−
High−Level Input Voltage
1.65 to 1.95
0.65 x VCC
−
−
0.65 x VCC
−
2.3 to 5.5
0.70 x VCC
−
−
0.70 x VCC
−
Low−Level Input Voltage (NLV)
and NL17SZ08P5T5G−L22088
1.65 to 1.95
−
−
0.25 x VCC
−
0.25 x VCC
2.3 to 5.5
−
−
0.30 x VCC
−
0.30 x VCC
Low−Level Input Voltage
1.65 to 1.95
−
−
0.35 x VCC
−
0.35 x VCC
2.3 to 5.5
−
−
0.30 x VCC
−
0.30 x VCC
Parameter
Condition
V
V
V
VOH
High−Level Output
Voltage
VIN = VIH or VIL
IOH = −100 mA
IOH = −4 mA
IOH = −8 mA
IOH = −12 mA
IOH = −16 mA
IOH = −24 mA
IOH = −32 mA
1.65 to 5.5
1.65
2.3
2.7
3.0
3.0
4.5
VCC − 0.1
1.29
1.9
2.2
2.4
2.3
3.8
VCC
1.4
2.1
2.4
2.7
2.5
4.0
−
−
−
−
−
−
−
VCC − 0.1
1.29
1.9
2.2
2.4
2.3
3.8
−
−
−
−
−
−
−
VOL
Low−Level Output
Voltage
VIN = VIH or VIL
IOL = 100 mA
IOL = 4 mA
IOL = 8 mA
IOL = 12 mA
IOL = 16 mA
IOL = 24 mA
IOL = 32 mA
1.65 to 5.5
1.65
2.3
2.7
3.0
3.0
4.5
−
−
−
−
−
−
−
−
0.08
0.2
0.22
0.28
0.38
0.42
0.1
0.24
0.3
0.4
0.4
0.55
0.55
−
−
−
−
−
−
−
0.1
0.24
0.3
0.4
0.4
0.55
0.55
IIN
Input Leakage Current
VIN = 5.5 V or
GND
1.65 to 5.5
−
−
±0.1
−
±1.0
mA
IOFF
Power Off Leakage
Current
VIN = 5.5 V or
VOUT = 5.5 V
0
−
−
1.0
−
10
mA
Power Off Leakage
Current
(NL17SZ08P5T5G−
L22088 Only)
VIN = 5.5 V
0
−
−
1.0
−
10
mA
Quiescent Supply
Current
VIN = VCC or GND
5.5
−
−
1.0
−
10
mA
ICC
V
V
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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4
NL17SZ08
AC ELECTRICAL CHARACTERISTICS
Symbol
tPLH,
tPHL
−555C 3 TA 3 1255C
Min
Typ
Max
Min
Max
Units
RL = 1 MW, CL = 15 pF
1.65 to 1.95
−
6.3
12
−
12.7
ns
RL = 1 MW, CL = 15 pF
2.3 to 2.7
−
3.4
7.0
−
7.5
RL = 1 MW, CL = 15 pF
3.0 to 3.6
−
2.6
4.7
−
5.0
−
3.3
5.2
−
5.5
−
2.2
4.1
−
4.4
−
2.7
4.5
−
4.8
Parameter
Propagation Delay, A to Y
(Figures 3 and 4)
TA = 255C
VCC
(V)
Condition
RL = 500 W, CL = 50 pF
4.5 to 5.5
RL = 1 MW, CL = 15 pF
RL = 500 W, CL = 50 pF
CAPACITIVE CHARACTERISTICS
Symbol
CIN
Parameter
Condition
Typical
Units
Input Capacitance
VCC = 5.5 V, VIN = 0 V or VCC
2.5
pF
COUT
Output Capacitance
VCC = 5.5 V, VIN = 0 V or VCC
2.5
pF
CPD
Power Dissipation Capacitance
(Note 5)
10 MHz, VCC = 3.3 V, VIN = 0 V or VCC
10 MHz, VCC = 5.5 V, VIN = 0 V or VCC
9
11
pF
5. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no−load dynamic
power consumption; PD = CPD VCC2 fin + ICC VCC.
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5
NL17SZ08
OPEN
2 x VCC
Test
Switch
Position
tPLH / tPHL
Open
tPLZ / tPZL
2 x VCC
50
500
500
tPHZ / tPZH
GND
50
500
500
GND
R1
OUTPUT
DUT
RL
RT
CL, pF
RL, W
R1 , W
See AC Characteristics Table
X = Don’t Care
CL *
CL includes probe and jig capacitance
RT is ZOUT of pulse generator (typically 50 W)
f = 1 MHz
Figure 3. Test Circuit
tr = 3 ns
tf = 3 ns
90%
90%
Vmi
INPUT
Vmi
INPUT
Vmi
10%
10%
tPHL
Vmi
GND
GND
tPZL
tPLH
Vmo
OUTPUT
VCC
VCC
tPLZ
~VCC
VOH
Vmo
OUTPUT
Vmo
VOL + VY
VOL
VOL
tPLH
OUTPUT
tPHL
Vmo
tPZH
VOH
Vmo
tPHZ
VOH
VOH − VY
Vmo
OUTPUT
VOL
~0 V
Figure 4. Switching Waveforms
Vmo, V
VCC, V
Vmi, V
tPLH, tPHL
1.65 to 1.95
VCC/2
VCC/2
VCC/2
0.15
2.3 to 2.7
VCC/2
VCC/2
VCC/2
0.15
3.0 to 3.6
VCC/2
VCC/2
VCC/2
0.3
4.5 to 5.5
VCC/2
VCC/2
VCC/2
0.3
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6
tPZL, tPLZ, tPZH, tPHZ
VY, V
NL17SZ08
DEVICE ORDERING INFORMATION
Packages
Specific Device Code
Pin 1 Orientation
(See below)
Shipping†
NL17SZ08DFT2G
SC−88A
L2
Q4
3000 / Tape & Reel
NLV17SZ08DFT2G*
SC−88A
L2
Q4
3000 / Tape & Reel
NL17SZ08DFT2G−F22038**
SC−88A
L2
Q4
3000 / Tape & Reel
NL17SZ08DBVT1G
SC−74A
AH
Q4
3000 / Tape & Reel
NL17SZ08XV5T2G
SOT−553
L2
Q4
4000 / Tape & Reel
NL17SZ08XV5T2G−L22087**
SOT−553
L2
Q4
4000 / Tape & Reel
NL17SZ08P5T5G
SOT−953
E
(Rotated 180° CW)
Q2
8000 / Tape & Reel
NL17SZ08P5T5G−L22088
SOT−953
E
(Rotated 180° CW)
Q2
8000 / Tape & Reel
NL17SZ08MU1TCG
UDFN6, 1.45 x 1.0, 0.5P
D
(Rotated 180° CW)
Q4
3000 / Tape & Reel
NL17SZ08MU3TCG
UDFN6, 1.0 x 1.0, 0.35P
P
(Rotated 180° CW)
Q4
3000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.
** Please refer to NLV specifications for this device.
Pin 1 Orientation in Tape and Reel
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7
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−74A
CASE 318BQ
ISSUE B
5
1
SCALE 2:1
5X
DATE 18 JAN 2018
b
0.20 C A B
E1
5
M
4
1
2
E
3
B
0.05
A1
e
D
A
L
DETAIL A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT
EXCEED 0.15 PER SIDE.
DIM
A
A1
b
c
D
E
E1
e
L
M
TOP VIEW
A
SIDE VIEW
DETAIL A
C
c
SEATING
PLANE
END VIEW
RECOMMENDED
SOLDERING FOOTPRINT*
MILLIMETERS
MIN
MAX
0.90
1.10
0.01
0.10
0.25
0.50
0.10
0.26
2.85
3.15
2.50
3.00
1.35
1.65
0.95 BSC
0.20
0.60
0_
10 _
GENERIC
MARKING DIAGRAM*
0.95
PITCH
XXX MG
G
XXX
M
G
2.40
= Specific Device Code
= Date Code
= Pb−Free Package
(Note: Microdot may be in either location)
5X
1.00
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
5X
0.70
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON66279G
SC−74A
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−88A (SC−70−5/SOT−353)
CASE 419A−02
ISSUE L
SCALE 2:1
A
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
G
5
4
−B−
S
1
2
DATE 17 JAN 2013
DIM
A
B
C
D
G
H
J
K
N
S
3
D 5 PL
0.2 (0.008)
B
M
M
N
INCHES
MIN
MAX
0.071
0.087
0.045
0.053
0.031
0.043
0.004
0.012
0.026 BSC
--0.004
0.004
0.010
0.004
0.012
0.008 REF
0.079
0.087
MILLIMETERS
MIN
MAX
1.80
2.20
1.15
1.35
0.80
1.10
0.10
0.30
0.65 BSC
--0.10
0.10
0.25
0.10
0.30
0.20 REF
2.00
2.20
J
GENERIC MARKING
DIAGRAM*
C
K
H
XXXMG
G
SOLDER FOOTPRINT
0.50
0.0197
XXX = Specific Device Code
M
= Date Code
G
= Pb−Free Package
0.65
0.025
0.65
0.025
0.40
0.0157
1.9
0.0748
SCALE 20:1
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
mm Ǔ
ǒinches
STYLE 1:
PIN 1. BASE
2. EMITTER
3. BASE
4. COLLECTOR
5. COLLECTOR
STYLE 2:
PIN 1. ANODE
2. EMITTER
3. BASE
4. COLLECTOR
5. CATHODE
STYLE 3:
PIN 1. ANODE 1
2. N/C
3. ANODE 2
4. CATHODE 2
5. CATHODE 1
STYLE 4:
PIN 1. SOURCE 1
2. DRAIN 1/2
3. SOURCE 1
4. GATE 1
5. GATE 2
STYLE 6:
PIN 1. EMITTER 2
2. BASE 2
3. EMITTER 1
4. COLLECTOR
5. COLLECTOR 2/BASE 1
STYLE 7:
PIN 1. BASE
2. EMITTER
3. BASE
4. COLLECTOR
5. COLLECTOR
STYLE 8:
PIN 1. CATHODE
2. COLLECTOR
3. N/C
4. BASE
5. EMITTER
STYLE 9:
PIN 1. ANODE
2. CATHODE
3. ANODE
4. ANODE
5. ANODE
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42984B
STYLE 5:
PIN 1. CATHODE
2. COMMON ANODE
3. CATHODE 2
4. CATHODE 3
5. CATHODE 4
Note: Please refer to datasheet for
style callout. If style type is not called
out in the datasheet refer to the device
datasheet pinout or pin assignment.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
SC−88A (SC−70−5/SOT−353)
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT−553, 5 LEAD
CASE 463B
ISSUE C
SCALE 4:1
D
−X−
5
A
4
1
2
3
b
e
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
L
E
−Y−
DATE 20 MAR 2013
HE
DIM
A
b
c
D
E
e
L
HE
c
5 PL
0.08 (0.003)
M
X Y
RECOMMENDED
SOLDERING FOOTPRINT*
INCHES
NOM
0.022
0.009
0.005
0.063
0.047
0.020 BSC
0.004
0.008
0.061
0.063
MIN
0.020
0.007
0.003
0.061
0.045
MAX
0.024
0.011
0.007
0.065
0.049
0.012
0.065
GENERIC
MARKING DIAGRAM*
0.3
0.0118
XXMG
G
0.45
0.0177
XX = Specific Device Code
M = Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
1.0
0.0394
1.35
0.0531
MILLIMETERS
NOM
MAX
0.55
0.60
0.22
0.27
0.13
0.18
1.60
1.65
1.20
1.25
0.50 BSC
0.10
0.20
0.30
1.55
1.60
1.65
MIN
0.50
0.17
0.08
1.55
1.15
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
0.5
0.5
0.0197 0.0197
SCALE 20:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
STYLE 1:
PIN 1. BASE
2. EMITTER
3. BASE
4. COLLECTOR
5. COLLECTOR
STYLE 2:
PIN 1. CATHODE
2. COMMON ANODE
3. CATHODE 2
4. CATHODE 3
5. CATHODE 4
STYLE 3:
PIN 1. ANODE 1
2. N/C
3. ANODE 2
4. CATHODE 2
5. CATHODE 1
STYLE 4:
PIN 1. SOURCE 1
2. DRAIN 1/2
3. SOURCE 1
4. GATE 1
5. GATE 2
STYLE 6:
PIN 1. EMITTER 2
2. BASE 2
3. EMITTER 1
4. COLLECTOR 1
5. COLLECTOR 2/BASE 1
STYLE 7:
PIN 1. BASE
2. EMITTER
3. BASE
4. COLLECTOR
5. COLLECTOR
STYLE 8:
PIN 1. CATHODE
2. COLLECTOR
3. N/C
4. BASE
5. EMITTER
STYLE 9:
PIN 1. ANODE
2. CATHODE
3. ANODE
4. ANODE
5. ANODE
DOCUMENT NUMBER:
STATUS:
98AON11127D
ON SEMICONDUCTOR STANDARD
1
© Semiconductor Components Industries, LLC, 2002
January, 2002 − Rev. 01O
NEW STANDARD:
© Semiconductor Components Industries, LLC, 2002
October, DESCRIPTION:
2002 − Rev. 0
SOT−553, 5 LEAD
http://onsemi.com
1
STYLE 5:
PIN 1. ANODE
2. EMITTER
3. BASE
4. COLLECTOR
5. CATHODE
Electronic versions are uncontrolled except when
accessed directly from the Document Repository. Printed
versions are uncontrolled exceptCase
when
stamped
Outline
Number:
463B
“CONTROLLED COPY” in red.
Case Outline Number:
PAGE 1 OFXXX
2
DOCUMENT NUMBER:
98AON11127D
PAGE 2 OF 2
ISSUE
REVISION
DATE
A
ADDED STYLES 3−9. REQ. BY D. BARLOW
11 NOV 2003
B
ADDED NOMINAL VALUES AND UPDATED GENERIC MARKING DIAGRAM. REQ.
BY HONG XIAO
27 MAY 2005
C
UPDATED DIMENSIONS D, E, AND HE. REQ. BY J. LETTERMAN.
20 MAR 2013
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
© Semiconductor Components Industries, LLC, 2013
March, 2013 − Rev. C
Case Outline Number:
463B
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
UDFN6, 1.45x1.0, 0.5P
CASE 517AQ
ISSUE O
1
SCALE 4:1
A
B
D
DATE 15 MAY 2008
L
L
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30 mm FROM THE TERMINAL TIP.
L1
PIN ONE
REFERENCE
0.10 C
ÉÉÉ
ÉÉÉ
DETAIL A
E
OPTIONAL
CONSTRUCTIONS
ÉÉ
ÉÉ
EXPOSED Cu
TOP VIEW
0.10 C
DETAIL B
MOLD CMPD
DETAIL B
0.05 C
6X
DIM
A
A1
A2
b
D
E
e
L
L1
OPTIONAL
CONSTRUCTIONS
A
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.07 REF
0.20
0.30
1.45 BSC
1.00 BSC
0.50 BSC
0.30
0.40
−−−
0.15
MOUNTING FOOTPRINT
0.05 C
A1
SIDE VIEW
A2
e
6X
C
SEATING
PLANE
6X
0.30
PACKAGE
OUTLINE
L
1.24
3
1
DETAIL A
6X
0.53
6
4
6X
BOTTOM VIEW
b
0.10 C A B
0.05 C
NOTE 3
1
0.50
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
GENERIC
MARKING DIAGRAM*
XM
X
M
= Specific Device Code
= Date Code
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
DOCUMENT NUMBER:
DESCRIPTION:
98AON30313E
UDFN6, 1.45x1.0, 0.5P
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
UDFN6, 1x1, 0.35P
CASE 517BX
ISSUE O
SCALE 4:1
PIN ONE
REFERENCE
2X
0.10 C
2X
0.10 C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.20 MM FROM TERMINAL TIP.
4. PACKAGE DIMENSIONS EXCLUSIVE OF
BURRS AND MOLD FLASH.
A B
D
ÉÉ
ÉÉ
ÉÉ
DATE 18 MAY 2011
E
DIM
A
A1
A3
b
D
E
e
L
L1
TOP VIEW
A3
0.05 C
A
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.13 REF
0.12
0.22
1.00 BSC
1.00 BSC
0.35 BSC
0.25
0.35
0.30
0.40
0.05 C
SIDE VIEW
A1
C
SEATING
PLANE
RECOMMENDED
SOLDERING FOOTPRINT*
5X
e
5X
0.48
L
6X
0.22
3
1
L1
1.18
6
4
6X
BOTTOM VIEW
b
0.10
M
C A B
0.05
M
C
NOTE 3
0.53
1
PKG
OUTLINE
0.35
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
GENERIC
MARKING DIAGRAM*
XM
1
X = Specific Device Code
M = Date Code
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
DOCUMENT NUMBER:
DESCRIPTION:
98AON56787E
UDFN6, 1x1, 0.35P
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT−953
CASE 527AE
ISSUE E
DATE 02 AUG 2011
SCALE 4:1
X
Y
D
5
PIN ONE
INDICATOR
A
4
HE
E
1
2 3
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF THE BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
DIM
A
b
C
D
E
e
HE
L
L2
L3
C
TOP VIEW
SIDE VIEW
e
L
5X
5X
L3
5X
L2
MILLIMETERS
MIN
NOM
MAX
0.34
0.37
0.40
0.10
0.15
0.20
0.07
0.12
0.17
0.95
1.00
1.05
0.75
0.80
0.85
0.35 BSC
0.95
1.00
1.05
0.175 REF
0.05
0.10
0.15
−−−
−−−
0.15
GENERIC
MARKING DIAGRAM*
5X
BOTTOM VIEW
XM
b
1
0.08 X Y
X
M
SOLDERING FOOTPRINT*
*This information is generic. Please refer
to device data sheet for actual part
marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
5X
0.35
5X
0.20
= Specific Device Code
= Month Code
PACKAGE
OUTLINE
1.20
1
0.35
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON26457D
SOT−953
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems
or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should
Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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