NLVAS4599DFT2G

NLAS4599 Low Voltage Single Supply SPDT Analog Switch The NLAS4599 is an advanced high speed CMOS single pole − double throw analog switch fabricated with silicon gate CMOS technology. It achieves high speed propagation delays and low ON resistances while maintaining low power dissipation. This switch controls analog and digital voltages that may vary across the full power−supply range (from VCC to GND). The device has been designed so the ON resistance (RON) is much lower and more linear over input voltage than RON of typical CMOS analog switches. The channel select input is compatible with standard CMOS outputs. The channel select input structure provides protection when voltages between 0 V and 5.5 V are applied, regardless of the supply voltage. This input structure helps prevent device destruction caused by supply voltage − input/output voltage mismatch, battery backup, hot insertion, etc. http://onsemi.com MARKING DIAGRAMS TSOP−6 DT SUFFIX CASE 318G 1 6 SC−88 DF SUFFIX CASE 419B 1 A0 = Specific Device Code A = Assembly Location Y = Year W = Work Week M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) A0 MG G A0AYWG G 1 • • • • • • • • • • 1 Channel Select Input Over−Voltage Tolerant to 5.5 V Fast Switching and Propagation Speeds Break−Before−Make Circuitry Low Power Dissipation: ICC = 2 mA (Max) at TA = 25°C Diode Protection Provided on Channel Select Input Improved Linearity and Lower ON Resistance over Input Voltage Latch−up Performance Exceeds 300 mA ESD Performance: Human Body Model > 2000 V; Machine Model > 200 V Chip Complexity: 38 FETs Pb−Free Packages are Available SELECT 1 6 5 4 NO COM NC ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet. FUNCTION TABLE Select L H ON Channel NC NO V+ 2 GND 3 Figure 1. Pin Assignment COM Figure 2. Logic Symbol *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2006 June, 2006 − Rev. 9 U U CHANNEL SELECT U 2X0 2X1 NO NC 1 Publication Order Number: NLAS4599/D NLAS4599 ABSOLUTE MAXIMUM RATINGS Symbol VCC VIS VIN IIK PD TSTG TL TJ VESD Positive DC Supply Voltage Analog Input Voltage (VNO or VCOM) Digital Select Input Voltage DC Current, Into or Out of Any Pin Power Dissipation in Still Air Storage Temperature Range Lead Temperature, 1mm from Case for 10 seconds Junction Temperature Under Bias ESD Withstand Voltage Human Body Model (Note 1) Machine Model (Note 2) Charged Device Model (Note 3) Above VCC and Below GND at 125°C (Note 4) SC−88 TSOP−6 SC−88 TSOP−6 Parameter Value −0.5 to +7.0 −0.5 ≤ VIS ≤ VCC )0.5 −0.5 ≤ VI ≤ + 7.0 $50 200 200 −65 to +150 260 150 2000 200 N/A $300 333 333 Unit V V V mA mW °C °C °C V ILATCH−UP qJA Latch−Up Performance Thermal Resistance mA °C/W Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Tested to EIA/JESD22−A114−A 2. Tested to EIA/JESD22−A115−A 3. Tested to JESD22−C101−A 4. Tested to EIA/JESD78 RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN VIS TA tr, tf DC Supply Voltage Digital Select Input Voltage Analog Input Voltage (NC, NO, COM) Operating Temperature Range Input Rise or Fall Time, SELECT VCC = 3.3 V + 0.3 V VCC = 5.0 V + 0.5 V NORMALIZED FAILURE RATE Characteristics Min 2.0 GND GND −55 0 0 Max 5.5 5.5 VCC +125 100 20 Unit V V V °C ns/V DEVICE JUNCTION TEMPERATURE VERSUS TIME TO 0.1% BOND FAILURES Junction Temperature 5C 80 90 100 110 120 130 140 Time, Hours 1,032,200 419,300 178,700 79,600 37,000 17,800 8,900 Time, Years 117.8 47.9 20.4 9.4 4.2 2.0 1.0 FAILURE RATE OF PLASTIC = CERAMIC UNTIL INTERMETALLICS OCCUR TJ = 130°C TJ = 120°C TJ = 100°C TJ = 110°C TJ = 90°C TJ = 80°C 100 TIME, YEARS 1 1 10 1000 Figure 3. Failure Rate vs. Time Junction Temperature http://onsemi.com 2 NLAS4599 DC CHARACTERISTICS − Digital Section (Voltages Referenced to GND) Guaranteed Limit Symbol VIH Parameter Minimum High−Level Input Voltage, Select Input Condition VCC 2.0 2.5 3.0 4.5 5.5 2.0 2.5 3.0 4.5 5.5 VIN = 5.5 V or GND VIN = 5.5 V or GND Select and VIS = VCC or GND 5.5 0 5.5 −55 to 255C 1.5 1.9 2.1 3.15 3.85 0.5 0.6 0.9 1.35 1.65 +0.1 $10 1.0