NSBC115TD
Dual NPN Bias Resistor
Transistors
R1 = 100 kW, R2 = 8 kW
NPN Transistors with Monolithic Bias
Resistor Network
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MARKING
DIAGRAM
This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a
base−emitter resistor. The BRT eliminates these individual
components by integrating them into a single device. The use of a BRT
can reduce both system cost and board space.
Features
• S and NSV Prefix for Automotive and Other Applications
•
•
•
•
Requiring Unique Site and Control Change Requirements;
AEC-Q101 Qualified and PPAP Capable
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
SOT−963
CASE 527AD
AF
M
AFM
1
= Specific Device Code
= Date Code*
*Date Code orientation may vary depending upon
manufacturing location.
PIN CONNECTIONS
(3)
(2)
R1
(1)
R2
Q1
MAXIMUM RATINGS
(TA = 25°C, common for Q1 and Q2, unless otherwise noted)
Q2
Symbol
Max
Unit
Collector−Base Voltage
VCBO
50
Vdc
Collector−Emitter Voltage
VCEO
50
Vdc
IC
100
mAdc
Input Forward Voltage
VIN(fwd)
40
Vdc
Input Reverse Voltage
VIN(rev)
6
Vdc
Rating
Collector Current − Continuous
R2
(4)
R1
(5)
(6)
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
ORDERING INFORMATION
Device
NSBC115TDP6T5G
Package
Shipping†
SOT−963
8,000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and
tape sizes, please refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2013
June, 2017 − Rev. 2
1
Publication Order Number:
DTC115TD/D
NSBC115TD
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
231
269
1.9
2.2
mW
NSBC115TDP6 (SOT−963) One Junction Heated
Total Device Dissipation
TA = 25°C
(Note 1)
(Note 2)
Derate above 25°C
(Note 1)
(Note 2)
Thermal Resistance,
Junction to Ambient
PD
(Note 1)
(Note 2)
RqJA
mW/°C
540
464
°C/W
339
408
2.7
3.3
mW
NSBC115TDP6 (SOT−963) Both Junction Heated (Note 3)
Total Device Dissipation
TA = 25°C
(Note 1)
(Note 2)
Derate above 25°C
(Note 1)
(Note 2)
Thermal Resistance,
Junction to Ambient
PD
(Note 1)
(Note 2)
Junction and Storage Temperature Range
1. FR−4 @ 100 mm2, 1 oz. copper traces, still air.
2. FR−4 @ 500 mm2, 1 oz. copper traces, still air.
3. Both junction heated values assume total power is sum of two equally powered channels.
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2
mW/°C
RqJA
369
306
°C/W
TJ, Tstg
−55 to +150
°C
NSBC115TD
ELECTRICAL CHARACTERISTICS (TA = 25°C, common for Q1 and Q2, unless otherwise noted)
Symbol
Characteristic
Min
Typ
Max
−
−
100
−
−
500
−
−
0.1
50
−
−
50
−
−
160
350
−
−
−
0.25
−
0.6
−
−
1.0
−
−
−
0.2
4.9
−
−
Unit
OFF CHARACTERISTICS
Collector−Base Cutoff Current
(VCB = 50 V, IE = 0)
ICBO
Collector−Emitter Cutoff Current
(VCE = 50 V, IB = 0)
ICEO
Emitter−Base Cutoff Current
(VEB = 6.0 V, IC = 0)
IEBO
Collector−Base Breakdown Voltage
(IC = 10 mA, IE = 0)
V(BR)CBO
Collector−Emitter Breakdown Voltage (Note 4)
(IC = 2.0 mA, IB = 0)
V(BR)CEO
nAdc
nAdc
mAdc
Vdc
Vdc
ON CHARACTERISTICS
hFE
DC Current Gain (Note 4)
(IC = 5.0 mA, VCE = 10 V)
Collector−Emitter Saturation Voltage (Note 4)
(IC = 10 mA, IB = 5.0 mA)
VCE(sat)
Input Voltage (off)
(VCE = 5.0 V, IC = 100 mA)
Vi(off)
Input Voltage (on)
(VCE = 0.2 V, IC = 1.0 mA)
Vi(on)
Output Voltage (on)
(VCC = 5.0 V, VB = 2.5 V, RL = 1.0 kW)
VOL
Output Voltage (off)
(VCC = 5.0 V, VB = 0.25 V, RL = 1.0 kW)
VOH
Input Resistor
R1
70
100
130
Resistor Ratio
R1/R2
−
−
−
4. Pulsed Condition: Pulse Width = 300 msec, Duty Cycle ≤ 2%.
PD, POWER DISSIPATION (mW)
250
200
(1)
(1) SOT−963; 100 mm2, 1 oz. copper trace
150
100
50
0
−50
−25
0
25
50
75
100
125
150
AMBIENT TEMPERATURE (°C)
Figure 1. Derating Curve
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3
Vdc
Vdc
Vdc
Vdc
Vdc
kW
NSBC115TD
TYPICAL CHARACTERISTICS
NSBC115TDP6
1000
IC/IB = 10
150°C
hFE, DC CURRENT GAIN
VCE(sat), COLLECTOR−EMITTER
VOLTAGE (V)
10
150°C
25°C
1
−55°C
0.1
−55°C
100
VCE = 10 V
0.01
0
10
20
30
40
10
50
10
100
IC, COLLECTOR CURRENT (mA)
Figure 2. VCE(sat) vs. IC
Figure 3. DC Current Gain
100
IC, COLLECTOR CURRENT (mA)
f = 10 kHz
IE = 0 A
TA = 25°C
2.0
1.6
1.2
0.8
0.4
0
10
20
30
40
150°C
−55°C
10
1
0.1
VO = 5 V
0.01
50
25°C
0
4
8
12
16
20
24
VR, REVERSE VOLTAGE (V)
Vin, INPUT VOLTAGE (V)
Figure 4. Output Capacitance
Figure 5. Output Current vs. Input Voltage
100
Vin, INPUT VOLTAGE (V)
0
1
IC, COLLECTOR CURRENT (mA)
2.4
Cob, OUTPUT CAPACITANCE (pF)
25°C
−55°C
10
25°C
150°C
1
0.1
VO = 0.2 V
0
10
20
30
40
IC, COLLECTOR CURRENT (mA)
Figure 6. Input Voltage vs. Output Current
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4
50
28
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT−963
CASE 527AD−01
ISSUE E
DATE 09 FEB 2010
SCALE 4:1
D
X
Y
6
5
4
1
2
3
A
HE
E
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS OF
BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
DIM
A
b
C
D
E
e
HE
L
L2
C
SIDE VIEW
TOP VIEW
e
6X
6X L2
6X
BOTTOM VIEW
L
MILLIMETERS
MIN
NOM
MAX
0.34
0.37
0.40
0.10
0.15
0.20
0.07
0.12
0.17
0.95
1.00
1.05
0.75
0.80
0.85
0.35 BSC
0.95
1.00
1.05
0.19 REF
0.05
0.10
0.15
GENERIC
MARKING DIAGRAM*
b
0.08 X Y
XM
1
STYLE 1:
PIN 1. EMITTER 1
2. BASE 1
3. COLLECTOR 2
4. EMITTER 2
5. BASE 2
6. COLLECTOR 1
STYLE 2:
PIN 1. EMITTER 1
2. EMITTER2
3. BASE 2
4. COLLECTOR 2
5. BASE 1
6. COLLECTOR 1
STYLE 3:
PIN 1. CATHODE 1
2. CATHODE 1
3. ANODE/ANODE 2
4. CATHODE 2
5. CATHODE 2
6. ANODE/ANODE 1
STYLE 4:
PIN 1. COLLECTOR
2. COLLECTOR
3. BASE
4. EMITTER
5. COLLECTOR
6. COLLECTOR
STYLE 5:
PIN 1. CATHODE
2. CATHODE
3. ANODE
4. ANODE
5. CATHODE
6. CATHODE
STYLE 6:
PIN 1. CATHODE
2. ANODE
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
STYLE 7:
PIN 1. CATHODE
2. ANODE
3. CATHODE
4. CATHODE
5. ANODE
6. CATHODE
STYLE 8:
PIN 1. DRAIN
2. DRAIN
3. GATE
4. SOURCE
5. DRAIN
6. DRAIN
STYLE 9:
PIN 1. SOURCE 1
2. GATE 1
3. DRAIN 2
4. SOURCE 2
5. GATE 2
6. DRAIN 1
STYLE 10:
PIN 1. CATHODE 1
2. N/C
3. CATHODE 2
4. ANODE 2
5. N/C
6. ANODE 1
DOCUMENT NUMBER:
DESCRIPTION:
X
M
= Specific Device Code
= Month Code
*This information is generic. Please refer
to device data sheet for actual part
marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
RECOMMENDED
MOUNTING FOOTPRINT
6X
0.20
6X
0.35
PACKAGE
OUTLINE
1.20
0.35
PITCH
DIMENSIONS: MILLIMETERS
98AON26456D
SOT−963, 1X1, 0.35P
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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