NSL12AWT1G

NSL12AWT1G High Current Surface Mount PNP Silicon Low VCE(sat) Transistor for Battery Operated Applications http://onsemi.com Features • • • • • High Current Capability (3 A) High Power Handling (Up to 650 mW) Low VCE(s) (170 mV Typical @ 1 A) Small Size These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant 12 VOLTS 3.0 AMPS PNP TRANSISTOR COLLECTOR 1, 2, 5, 6 Benefits • High Specific Current and Power Capability Reduces Required PCB Area • Reduced Parasitic Losses Increases Battery Life MAXIMUM RATINGS (TA = 25°C) Rating Symbol Max Unit Collector-Emitter Voltage VCEO −12 Vdc Collector-Base Voltage VCBO −12 Vdc Emitter-Base Voltage VEBO −5.0 Vdc Collector Current − Continuous Collector Current − Peak IC ICM −2.0 −3.0 Adc Electrostatic Discharge ESD HBM Class 3 MM Class C 3 BASE 4 EMITTER SC−88/SOT−363 CASE 419B STYLE 20 1 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. THERMAL CHARACTERISTICS MARKING DIAGRAM Characteristic Symbol Max Unit Total Device Dissipation TA = 25°C Derate above 25°C PD (Note 1) 450 mW 3.6 mW/°C Thermal Resistance, Junction−to−Ambient RqJA (Note 1) 275 °C/W Total Device Dissipation TA = 25°C Derate above 25°C PD (Note 2) 650 mW 5.2 mW/°C Thermal Resistance, Junction−to−Ambient RqJA (Note 2) 192 °C/W RqJL 105 °C/W PD Single 1.4 W TJ, Tstg −55 to +150 °C Thermal Resistance, Junction−to−Lead 6 Total Device Dissipation (Single Pulse < 10 sec.) Junction and Storage Temperature Range 6 11 MG G 1 M G = Date Code = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. 1. FR−4, Minimum Pad, 1 oz Coverage 2. FR−4, 1″ Pad, 1 oz Coverage © Semiconductor Components Industries, LLC, 2009 October, 2009 − Rev. 3 1 Publication Order Number: NSL12AW/D NSL12AWT1G ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit Collector −Emitter Breakdown Voltage, (IC = −10 mAdc, IB = 0) V(BR)CEO −12 −15 − Vdc Collector −Base Breakdown Voltage, (IC = −0.1 mAdc, IE = 0) V(BR)CBO −12 −25 − Vdc Emitter −Base Breakdown Voltage, (IE = −0.1 mAdc, IC = 0) V(BR)EBO −5.0 −7.0 − Vdc Collector Cutoff Current, (VCB = −12 Vdc, IE = 0) ICBO − −0.02 −0.1 mAdc Collector−Emitter Cutoff Current, (VCES = −12 Vdc, IE = 0) ICES − −0.03 −0.1 mAdc Emitter Cutoff Current, (VCES = −5.0 Vdc, IE = 0) IEBO − −0.03 −0.1 mAdc 100 100 100 180 165 160 − 300 − − − − −0.10 −0.14 −0.17 −0.160 −0.235 −0.290 − −0.84 −0.95 − −0.81 −0.95 − 100 − − 50 65 OFF CHARACTERISTICS ON CHARACTERISTICS DC Current Gain (Note 3) (IC = −0.5 A, VCE = −1.5 V) (IC = −0.8 A, VCE = −1.5 V) (IC = −1.0 A, VCE = −1.5 V) hFE Collector −Emitter Saturation Voltage (Note 3) (IC = −0.5 A, IB = −10 mA) (IC = −0.8 A, IB = −16 mA) (IC = −1.0 A, IB = −20 mA) VCE(sat) Base −Emitter Saturation Voltage (Note 3) (IC = −1.0 A, IB = −20 mA) VBE(sat) Base −Emitter Turn−on Voltage (Note 3) (IC = −1.0 A, VCE = −1.5 V) VBE(on) Cutoff Frequency (IC = −100 mA, VCE = −5.0 V, f = 100 MHz) fT Output Capacitance (VCB = −1.5 V, f = 1.0 MHz) Cobo V V V MHz pF 3. Pulsed Condition: Pulse Width < 300 msec, Duty Cycle < 2% ORDERING INFORMATION Device NSL12AWT1G Package Shipping† SOT−363 (Pb−Free) 3000 Tape & Reel VCE, COLLECTOR EMITTER VOLTAGE (V) VCE, COLLECTOR EMITTER VOLTAGE (V) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 0.5 0.4 2A 0.3 0.2 1A 800 mA 0.1 IC = 100 mA 0 1 500 mA 10 IB, BASE CURRENT (mA) 100 Figure 1. Collector Emitter Voltage vs Base Current 0.5 0.4 0.3 0.2 IC/IB = 100 0.1 IC/IB = 10 0 0.001 0.1 0.01 IC, COLLECTOR CURRENT (AMPS) 1 Figure 2. Collector Emitter Voltage vs Collector Current http://onsemi.com 2 NSL12AWT1G 1.0 VCE = 1.5 V 125°C VBE, BASE EMITTER VOLTAGE (V) hFE, DC CURRENT GAIN 400 300 25°C 200 100 0 TA = −55°C 0.001 0.01 0.1 0.9 TA = −55°C 0.8 0.7 25°C 0.6 0.5 125°C 0.4 VCE = 1.5 V 0.3 0.001 1 0.01 Figure 3. DC Current Gain versus Collector Current Figure 4. Base Emitter Voltage versus Collector Current 1.0 10 0.9 IC/IB = 10 0.8 IC/IB = 100 0.7 0.6 0.001 0.01 10 ms 1 ms SINGLE PULSE TA = 25°C 0.1 IC, COLLECTOR CURRENT (AMPS) 1 100 ms 0.1 0.01 1 0.1 1s dc 1 1 10 VCE, COLLECTOR EMITTER VOLTAGE (VOLTS) Figure 5. Base Emitter Saturation Voltage versus Base Current r(t), MINIMUM PAD NORMALIZED TRANSIENT THERMAL RESISTANCE 1 IC, COLLECTOR CURRENT (AMPS) IC, COLLECTOR CURRENT (A) VBE(sat), BASE EMITTER SATURATION VOLTAGE (V) IC, COLLECTOR CURRENT (AMPS) 0.1 Figure 6. Safe Operating Area D = 0.50 D = 0.20 D = 0.10 0.1 D = 0.05 D = 0.02 0.01 D = 0.01 SINGLE PULSE 0.001 0.00001 0.0001 0.001 0.01 0.1 t, TIME (s) 1 Figure 7. Normalized Thermal Response http://onsemi.com 3 10 100 1000 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SC−88/SC70−6/SOT−363 CASE 419B−02 ISSUE Y 1 SCALE 2:1 DATE 11 DEC 2012 2X aaa H D D H A D 6 5 GAGE PLANE 4 1 2 L L2 E1 E DETAIL A 3 aaa C 2X bbb H D 2X 3 TIPS e B 6X b ddd TOP VIEW C A-B D M A2 DETAIL A A 6X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END. 4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY AND DATUM H. 5. DATUMS A AND B ARE DETERMINED AT DATUM H. 6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP. 7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDITION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OF THE FOOT. ccc C A1 SIDE VIEW C SEATING PLANE END VIEW c RECOMMENDED SOLDERING FOOTPRINT* 6X DIM A A1 A2 b C D E E1 e L L2 aaa bbb ccc ddd MILLIMETERS MIN NOM MAX −−− −−− 1.10 0.00 −−− 0.10 0.70 0.90 1.00 0.15 0.20 0.25 0.08 0.15 0.22 1.80 2.00 2.20 2.00 2.10 2.20 1.15 1.25 1.35 0.65 BSC 0.26 0.36 0.46 0.15 BSC 0.15 0.30 0.10 0.10 GENERIC MARKING DIAGRAM* 6 XXXMG G 6X 0.30 INCHES NOM MAX −−− 0.043 −−− 0.004 0.035 0.039 0.008 0.010 0.006 0.009 0.078 0.086 0.082 0.086 0.049 0.053 0.026 BSC 0.010 0.014 0.018 0.006 BSC 0.006 0.012 0.004 0.004 MIN −−− 0.000 0.027 0.006 0.003 0.070 0.078 0.045 0.66 1 2.50 0.65 PITCH XXX = Specific Device Code M = Date Code* G = Pb−Free Package (Note: Microdot may be in either location) DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. *Date Code orientation and/or position may vary depending upon manufacturing location. *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. STYLES ON PAGE 2 DOCUMENT NUMBER: DESCRIPTION: 98ASB42985B SC−88/SC70−6/SOT−363 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 2 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com SC−88/SC70−6/SOT−363 CASE 419B−02 ISSUE Y DATE 11 DEC 2012 STYLE 1: PIN 1. EMITTER 2 2. BASE 2 3. COLLECTOR 1 4. EMITTER 1 5. BASE 1 6. COLLECTOR 2 STYLE 2: CANCELLED STYLE 3: CANCELLED STYLE 4: PIN 1. CATHODE 2. CATHODE 3. COLLECTOR 4. EMITTER 5. BASE 6. ANODE STYLE 5: PIN 1. ANODE 2. ANODE 3. COLLECTOR 4. EMITTER 5. BASE 6. CATHODE STYLE 6: PIN 1. ANODE 2 2. N/C 3. CATHODE 1 4. ANODE 1 5. N/C 6. CATHODE 2 STYLE 7: PIN 1. SOURCE 2 2. DRAIN 2 3. GATE 1 4. SOURCE 1 5. DRAIN 1 6. GATE 2 STYLE 8: CANCELLED STYLE 9: PIN 1. EMITTER 2 2. EMITTER 1 3. COLLECTOR 1 4. BASE 1 5. BASE 2 6. COLLECTOR 2 STYLE 10: PIN 1. SOURCE 2 2. SOURCE 1 3. GATE 1 4. DRAIN 1 5. DRAIN 2 6. GATE 2 STYLE 11: PIN 1. CATHODE 2 2. CATHODE 2 3. ANODE 1 4. CATHODE 1 5. CATHODE 1 6. ANODE 2 STYLE 12: PIN 1. ANODE 2 2. ANODE 2 3. CATHODE 1 4. ANODE 1 5. ANODE 1 6. CATHODE 2 STYLE 13: PIN 1. ANODE 2. N/C 3. COLLECTOR 4. EMITTER 5. BASE 6. CATHODE STYLE 14: PIN 1. VREF 2. GND 3. GND 4. IOUT 5. VEN 6. VCC STYLE 15: PIN 1. ANODE 1 2. ANODE 2 3. ANODE 3 4. CATHODE 3 5. CATHODE 2 6. CATHODE 1 STYLE 16: PIN 1. BASE 1 2. EMITTER 2 3. COLLECTOR 2 4. BASE 2 5. EMITTER 1 6. COLLECTOR 1 STYLE 17: PIN 1. BASE 1 2. EMITTER 1 3. COLLECTOR 2 4. BASE 2 5. EMITTER 2 6. COLLECTOR 1 STYLE 18: PIN 1. VIN1 2. VCC 3. VOUT2 4. VIN2 5. GND 6. VOUT1 STYLE 19: PIN 1. I OUT 2. GND 3. GND 4. V CC 5. V EN 6. V REF STYLE 20: PIN 1. COLLECTOR 2. COLLECTOR 3. BASE 4. EMITTER 5. COLLECTOR 6. COLLECTOR STYLE 21: PIN 1. ANODE 1 2. N/C 3. ANODE 2 4. CATHODE 2 5. N/C 6. CATHODE 1 STYLE 22: PIN 1. D1 (i) 2. GND 3. D2 (i) 4. D2 (c) 5. VBUS 6. D1 (c) STYLE 23: PIN 1. Vn 2. CH1 3. Vp 4. N/C 5. CH2 6. N/C STYLE 24: PIN 1. CATHODE 2. ANODE 3. CATHODE 4. CATHODE 5. CATHODE 6. CATHODE STYLE 25: PIN 1. BASE 1 2. CATHODE 3. COLLECTOR 2 4. BASE 2 5. EMITTER 6. COLLECTOR 1 STYLE 26: PIN 1. SOURCE 1 2. GATE 1 3. DRAIN 2 4. SOURCE 2 5. GATE 2 6. DRAIN 1 STYLE 27: PIN 1. BASE 2 2. BASE 1 3. COLLECTOR 1 4. EMITTER 1 5. EMITTER 2 6. COLLECTOR 2 STYLE 28: PIN 1. DRAIN 2. DRAIN 3. GATE 4. SOURCE 5. DRAIN 6. DRAIN STYLE 29: PIN 1. ANODE 2. ANODE 3. COLLECTOR 4. EMITTER 5. BASE/ANODE 6. CATHODE STYLE 30: PIN 1. SOURCE 1 2. DRAIN 2 3. DRAIN 2 4. SOURCE 2 5. GATE 1 6. DRAIN 1 Note: Please refer to datasheet for style callout. If style type is not called out in the datasheet refer to the device datasheet pinout or pin assignment. DOCUMENT NUMBER: DESCRIPTION: 98ASB42985B SC−88/SC70−6/SOT−363 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 2 OF 2 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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