NST30010MXV6T1G

NST30010MXV6T1G Dual Matched General Purpose Transistor PNP Matched Pair These transistors are housed in an ultra−small SOT563 package ideally suited for portable products. They are assembled to create a pair of devices highly matched in all parameters, eliminating the need for costly trimming. Applications are Current Mirrors; Differential, Sense and Balanced Amplifiers; Mixers; Detectors and Limiters. Features http://onsemi.com (3) (2) (1) • • • • Current Gain Matching to 10% Base−Emitter Voltage Matched to 2 mV Drop−In Replacement for Standard Device These are Pb−Free Devices Q1 Q2 (4) (5) (6) MAXIMUM RATINGS Rating Collector −Emitter Voltage Collector −Base Voltage Emitter −Base Voltage Collector Current − Continuous Symbol VCEO VCBO VEBO IC Value −30 −30 −5.0 −100 Unit V 1 6 V V mAdc SOT−563 CASE 463A PLASTIC Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. MARKING DIAGRAMS UU M G G 1 UU = Device Code M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION Device Package Shipping† NST30010MXV6T1G SOT−563 4000/Tape & Reel (Pb−Free) † For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2007 1 January, 2007 − Rev. 0 Publication Order Number: NST30010MXV6/D NST30010MXV6T1G THERMAL CHARACTERISTICS Characteristic Total Device Dissipation, TA = 25°C (Note 1) Derate above 25°C (Note 1) TA = 25°C (Note 2) Derate above 25°C (Note 2) Thermal Resistance Junction-to-Ambient (Note 1) Junction-to-Ambient (Note 2) Thermal Resistance Junction-to-Ambient (Note 1) Junction-to-Ambient (Note 2) Thermal Resistance Junction-to-Lead (Note 1) Junction-to-Lead (Note 2) Thermal Resistance Junction-to-Lead (Note 1) Junction-to-Lead (Note 2) Junction and Storage Temperature Range Parameter Two Devices Heated Total Package Symbol PD 357 2.9 429 3.4 One Heated Device RqJA 350 291 149 88 128 152 224 222 −55 to +150 500 (250 ea) 4.0 661 (331 ea) 5.3 250 189 °C/W − − °C/W 76 85 °C/W − − °C mW mW/°C mW mW/°C °C/W One Device Heated Both Devices Heated Unit Unheated Device Heated by Heated Device Lead Attached to Heated Device YJA YJL Heated Device Heating Lead Attached to Unheated Device YJL TJ, Tstg 1. PCB with 51 square millimeter of 2 oz (0.070mm thick) copper heat spreading connected to package leads. Mounted on a FR4 PCB 76x76x1.5mm Single layer traces. Natural convection test according to JEDEC 51. 2. PCB with 250 square millimeter of 2 oz (0.070mm thick) copper heat spreading connected to package leads. Mounted on a FR4 PCB 76x76x1.5mm Single layer traces. Natural convection test according to JEDEC 51. ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Characteristic OFF CHARACTERISTICS Collector −Emitter Breakdown Voltage, (IC = −10 mA) Collector −Emitter Breakdown Voltage, (IC = −10 mA, VEB = 0) Collector −Base Breakdown Voltage, (IC = −10 mA) Emitter −Base Breakdown Voltage, (IE = −1.0 mA) Collector Cutoff Current (VCB = −30 V) Collector Cutoff Current (VCB = −30 V, TA = 150°C) ON CHARACTERISTICS DC Current Gain (IC = −10 mA, VCE = −5.0 V) (IC = −2.0 mA, VCE = −5.0 V) (IC = −2.0 mA, VCE = −5.0 V) (Note 3) Collector −Emitter Saturation Voltage (IC = −10 mA, IB = −0.5 mA) (IC = −100 mA, IB = −5.0 mA) Base −Emitter Saturation Voltage (IC = −10 mA, IB = −1.0 mA) (IC = −100 mA, IB = −10 mA) Base −Emitter On Voltage (IC = −2.0 mA, VCE = −5.0 V) (IC = −10 mA, VCE = −5.0 V) (IC = −2.0 mA, VCE = −5.0 V) (Note 4) SMALL−SIGNAL CHARACTERISTICS Current −Gain − Bandwidth Product, (IC = −10 mA, VCE = −5 Vdc, f = 100 MHz) Output Capacitance, (VCB = −10 V, f = 1.0 MHz) Noise Figure, (IC = −0.2 mA, VCE = −5 Vdc, RS = 2 kW, f = 1 kHz, BW = 200Hz) fT Cob NF 100 − − − − − − 4.5 10 MHz pF dB hFE hFE(1)/hFE(2) VCE(sat) − − VBE(sat) − − VBE(on) VBE(1) − VBE(2) −0.60 − − − − 1.0 −0.75 −0.82 2.0 −0.75 −0.90 − − V mV − − −0.30 −0.60 V 270 420 0.9 − 520 1.0 − 800 − V − V(BR)CEO V(BR)CES V(BR)CBO V(BR)EBO ICBO −30 −30 −30 −5.0 − − − − − − − − − − − − −15 −4.0 V V V V nA mA Symbol Min Typ Max Unit 3. hFE(1)/hFE(2) is the ratio of one transistor compared to the other transistor within the same package. The smaller hFE is used as numerator. 4. VBE(1) − VBE(2) is the absolute difference of one transistor compared to the other transistor within the same package. http://onsemi.com 2 NST30010MXV6T1G TYPICAL CHARACTERISTICS 0.25 VCE(sat), COLLECTOR EMITTER SATURATION VOLTAGE (V) VCE(sat), COLLECTOR EMITTER SATURATION VOLTAGE (V) IC/IB = 10 0.20 150°C 0.15 25°C 0.10 −55°C 0.05 0 0.1 1.0 10 100 IC, COLLECTOR CURRENT (mA) 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0.1 1.0 10 IC, COLLECTOR CURRENT (mA) −55°C 100 25°C IC/IB = 100 150°C Figure 1. Collector Emitter Saturation Voltage vs. Collector Current 1400 VBE(sat), BASE EMITTER SATURATION VOLTAGE (V) 1200 hFE, DC CURRENT GAIN 150°C (5.0 V) 1000 800 150°C (2.0 V) 600 400 200 0 0.1 25°C (5.0 V) 25°C (2.0 V) −55°C (5.0 V) −55°C (2.0 V) 1.2 Figure 2. Collector Emitter Saturation Voltage vs. Collector Current IC/IB = 10 1.0 0.8 25°C 0.6 150°C 0.4 0.2 0 0.1 −55°C 1.0 10 100 1.0 10 100 IC, COLLECTOR CURRENT (mA) IC, COLLECTOR CURRENT (mA) Figure 3. DC Current Gain vs. Collector Current 1.0 VBE(on), BASE EMITTER TURN−ON VOLTAGE (V) −55°C 25°C VCE, COLLECTOR−EMITTER VOLTAGE (V) 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0.1 1.0 10 VCE = −5.0 V 0 100 150°C 3.0 Figure 4. Base Emitter Saturation Voltage vs. Collector Current 50 mA 2.5 2.0 20 mA 1.5 10 mA 1.0 0.5 IC = 100 mA 0.01 0.1 1.0 10 100 IC, COLLECTOR CURRENT (mA) IB, BASE CURRENT (mA) Figure 5. Base Emitter Turn−On Voltage vs. Collector Current Figure 6. Saturation Region @ 255C http://onsemi.com 3 NST30010MXV6T1G TYPICAL CHARACTERISTICS 14 Cobo, OUTPUT CAPACITANCE (pF) Cibo, INPUT CAPACITANCE (pF) 12 10 8 6 4 2 0 0 1 2 3 4 5 6 VEB, EMITTER BASE VOLTAGE (V) Cibo (pF) 7 6 5 4 3 2 1 0 0 5 10 15 20 25 VCB, COLLECTOR BASE VOLTAGE (V) Cobo (pF) Figure 7. Input Capacitance Figure 8. Output Capacitance http://onsemi.com 4 NST30010MXV6T1G PACKAGE DIMENSIONS SOT−563, 6 LEAD CASE 463A−01 ISSUE F D −X− A L 4 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. DIM A b C D E e L HE MILLIMETERS MIN NOM MAX 0.50 0.55 0.60 0.17 0.22 0.27 0.08 0.12 0.18 1.50 1.60 1.70 1.10 1.20 1.30 0.5 BSC 0.10 0.20 0.30 1.50 1.60 1.70 INCHES NOM MAX 0.021 0.023 0.009 0.011 0.005 0.007 0.062 0.066 0.047 0.051 0.02 BSC 0.004 0.008 0.012 0.059 0.062 0.066 MIN 0.020 0.007 0.003 0.059 0.043 6 5 1 2 3 E −Y− HE b e 5 6 PL M C XY 0.08 (0.003) STYLE 1: PIN 1. EMITTER 1 2. BASE 1 3. COLLECTOR 2 4. EMITTER 2 5. BASE 2 6. COLLECTOR 1 SOLDERING FOOTPRINT* 0.3 0.0118 0.45 0.0177 1.0 0.0394 1.35 0.0531 0.5 0.5 0.0197 0.0197 SCALE 20:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative http://onsemi.com 5 NST30010MXV6/D