NSTB60BDW1T1G

NSTB60BDW1 PNP General Purpose and NPN Bias Resistor Transistor Combination • • • • • • • Simplifies Circuit Design Reduces Board Space Reduces Component Count Available in 8 mm, 7 inch/3000 Unit Tape and Reel ESD Rating − Human Body Model: Class 1B ESD Rating − Machine Model: Class B NSV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant www.onsemi.com (3) (2) Q2 Q1 R2 R1 (4) (5) MAXIMUM RATINGS 5 (TA = 25°C unless otherwise noted, common for Q1 and Q2) Rating Symbol Q1 Q2 VCEO −50 50 Vdc VCBO −50 50 Vdc Emitter−Base Voltage VEBO −6.0 5.0 Vdc IC −150 150 mAdc Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1 Symbol Max Unit PD 187 (Note 1) 256 (Note 2) 1.5 (Note 1) 2.0 (Note 2) mW mW/°C RθJA 670 (Note 1) 490 (Note 2) °C/W Symbol Max Unit PD 250 (Note 1) 385 (Note 2) 2.0 (Note 1) 3.0 (Note 2) mW Total Device Dissipation TA = 25°C Derate above 25°C MARKING DIAGRAM 6 mW/°C RθJA 493 (Note 1) 325 (Note 2) °C/W Thermal Resistance − Junction-to-Lead RθJL 188 (Note 1) 208 (Note 2) °C/W TJ, Tstg −55 to +150 °C 1. FR−4 @ Minimum Pad 2. FR−4 @ 1.0 x 1.0 inch Pad © Semiconductor Components Industries, LLC, 2015 March, 2015 − Rev. 4 1 71 = Device Code M = Date Code* G = Pb−Free Package (Note: Microdot may be in either location) *Date Code orientation may vary depending upon manufacturing location. Thermal Resistance − Junction-to-Ambient Junction and Storage Temperature 3 71 M G G Total Device Dissipation TA = 25°C Derate above 25°C Characteristic (Both Junctions Heated) 2 SOT−363 CASE 419B STYLE 1 THERMAL CHARACTERISTICS Thermal Resistance − Junction-to-Ambient 4 Unit Collector-Base Voltage Characteristic (One Junction Heated) (6) 6 Collector-Emitter Voltage Collector Current − Continuous (1) 1 ORDERING INFORMATION Package Shipping† NSTB60BDW1T1G SOT−363 (Pb−Free) 3000 / Tape & Reel NSVTB60BDW1T1G SOT−363 (Pb−Free) 3000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Publication Order Number: NSTB60BDW1T1/D NSTB60BDW1 ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Symbol Min Typ Max Unit Collector-Base Breakdown Voltage (IC = −50 μAdc, IE = 0) V(BR)CBO −50 − − Vdc Collector-Emitter Breakdown Voltage (IC = −1.0 mAdc, IB = 0) V(BR)CEO −50 − − Vdc Emitter−Base Breakdown Voltage (IE = −50 mAdc, IE = 0) V(BR)EBO −6.0 − − Vdc Collector−Base Cutoff Current (VCB = −50 Vdc, IE = 0) ICBO − − −0.1 mA Emitter−Base Cutoff Current (VEB = −6.0 Vdc, IB = 0) IEBO − − −0.1 mA VCE(sat) − − −0.5 Vdc hFE 120 − 560 − fT − 140 − MHz COB − 3.5 − pF Collector-Base Breakdown Voltage (IC = 50 μA, IE = 0) V(BR)CBO 50 − − Vdc Collector-Emitter Breakdown Voltage (IC = 1.0 mA, IB = 0) (Note 3) V(BR)CEO 50 − − Vdc Collector−Base Cutoff Current (VCB = 50 V, IE = 0) ICBO − − 100 nAdc Collector−Emitter Cutoff Current (VCE = 50 V, IB = 0) ICEO − − 500 nAdc Emitter−Base Cutoff Current (VEB = 6.0 V, IC = 0) IEBO − − 0.13 mAdc VCE(sat) − − 0.25 Vdc hFE 80 − − Characteristic Q1 Collector-Emitter Saturation Voltage (IC = −50 mAdc, IB = −5.0 mAdc) (Note 3) DC Current Gain (VCE = −10 V, IC = −5.0 mA) (Note 3) Transition Frequency (VCE = −12 Vdc, IC = −2.0 mAdc, f = 100 MHz) Output Capacitance (VCB = −12 Vdc, IE = 0 Adc, f = 1.0 MHz) Q2 Collector-Emitter Saturation Voltage (IC = 10 mA, IB = 5.0 mA) (Note 3) DC Current Gain (VCE = 10 V, IC = 5.0 mA) (Note 3) Output Voltage (on) (VCC = 5.0 V, VB = 4.0 V, RL = 1.0 kW) (Note 3) VOL − − 0.2 Vdc Output Voltage (off) (VCC = 5.0 V, VB = 0.25 V, RL = 1.0 kW) (Note 3) VOH 4.9 − − Vdc Input Resistor (Note 3) R1 15.4 22 28.6 kΩ Resistor Ratio (Note 3) R2/R1 1.70 2.13 2.55 Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 3. Pulse Test: Pulse Width < 300 μs, Duty Cycle < 2.0% www.onsemi.com 2 NSTB60BDW1 TYPICAL ELECTRICAL CHARACTERISTICS − PNP Transistor -1.0 VCE = -10 V TA = 25°C 1.5 -0.9 1.0 0.7 0.5 -0.7 VBE(on) @ VCE = -10 V -0.6 -0.5 -0.4 -0.3 VCE(sat) @ IC/IB = 10 -0.1 0 -0.1 -0.2 -0.5 -1.0 -2.0 -5.0 -10 -20 -50 -100 -200 IC, COLLECTOR CURRENT (mAdc) Figure 1. Normalized DC Current Gain -0.5 -1.0 -2.0 -5.0 -10 -20 IC, COLLECTOR CURRENT (mAdc) -50 -100 Figure 2. “Saturation” and “On” Voltages 10 400 300 Cib 7.0 200 C, CAPACITANCE (pF) f T, CURRENT-GAIN — BANDWIDTH PRODUCT (MHz) VBE(sat) @ IC/IB = 10 -0.2 0.3 0.2 -0.2 VCE = -10 V TA = 25°C 150 100 80 60 5.0 TA = 25°C 3.0 Cob 2.0 40 30 20 -0.5 -1.0 -2.0 -3.0 -5.0 -10 -20 -30 IC, COLLECTOR CURRENT (mAdc) 1.0 -0.4 -0.6 -50 Figure 3. Current−Gain − Bandwidth Product 0.3 r b′, BASE SPREADING RESISTANCE (OHMS) 0.5 VCE = -10 V f = 1.0 kHz TA = 25°C 0.1 0.05 0.03 0.01 -0.1 -0.2 -0.5 -1.0 -2.0 IC, COLLECTOR CURRENT (mAdc) -5.0 -1.0 -2.0 -4.0 -6.0 -10 VR, REVERSE VOLTAGE (VOLTS) -20 -30 -40 Figure 4. Capacitances 1.0 hob, OUTPUT ADMITTANCE (OHMS) TA = 25°C -0.8 V, VOLTAGE (VOLTS) hFE, NORMALIZED DC CURRENT GAIN 2.0 150 140 130 120 110 100 -0.1 -10 VCE = -10 V f = 1.0 kHz TA = 25°C Figure 5. Output Admittance -0.2 -0.3 -0.5 -1.0 -2.0 -3.0 IC, COLLECTOR CURRENT (mAdc) -5.0 Figure 6. Base Spreading Resistance www.onsemi.com 3 -10 NSTB60BDW1 1 1000 IC/IB = 10 VCE = 10 V TA = −40°C 25°C hFE, DC CURRENT GAIN VCE(sat) MAXIMUM COLLECTOR VOLTAGE (V) TYPICAL ELECTRICAL CHARACTERISTICS − NPN Transistor 85°C 0.1 100 25°C −40°C 10 0.01 1 0 10 20 30 40 50 60 IC, COLLECTOR CURRENT (mA) 70 80 10 IC, COLLECTOR CURRENT (mA) 1 Figure 7. Maximum Collector Voltage versus Collector Current 100 Figure 8. DC Current Gain 100 IC, COLLECTOR CURRENT (mA) 4 f = 1 MHz IE = 0 A TA = 25°C 3.5 3 2.5 2 1.5 1 0.5 25°C TA = 85°C −40°C 10 1 0.1 VO = 5 V 0.01 0 0 10 20 30 40 50 VR, REVERSE BIAS VOLTAGE (V) 0 60 2 Figure 9. Output Capacitance 4 6 8 10 Vin, INPUT VOLTAGE (V) TA = −40°C 10 25°C 85°C 1 VO = 0.2 V 0.1 0 10 12 Figure 10. Output Current versus Input Voltage 100 Vin, INPUT VOLTAGE (V) Cob, CAPACITANCE (pF) TA = 85°C 20 30 40 50 IC, COLLECTOR CURRENT (mA) 60 Figure 11. Input Voltage versus Output Current www.onsemi.com 4 14 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SC−88/SC70−6/SOT−363 CASE 419B−02 ISSUE Y 1 SCALE 2:1 DATE 11 DEC 2012 2X aaa H D D H A D 6 5 GAGE PLANE 4 1 2 L L2 E1 E DETAIL A 3 aaa C 2X bbb H D 2X 3 TIPS e B 6X b ddd TOP VIEW C A-B D M A2 DETAIL A A 6X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END. 4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY AND DATUM H. 5. DATUMS A AND B ARE DETERMINED AT DATUM H. 6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP. 7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDITION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OF THE FOOT. ccc C A1 SIDE VIEW C SEATING PLANE END VIEW c RECOMMENDED SOLDERING FOOTPRINT* 6X DIM A A1 A2 b C D E E1 e L L2 aaa bbb ccc ddd MILLIMETERS MIN NOM MAX −−− −−− 1.10 0.00 −−− 0.10 0.70 0.90 1.00 0.15 0.20 0.25 0.08 0.15 0.22 1.80 2.00 2.20 2.00 2.10 2.20 1.15 1.25 1.35 0.65 BSC 0.26 0.36 0.46 0.15 BSC 0.15 0.30 0.10 0.10 GENERIC MARKING DIAGRAM* 6 XXXMG G 6X 0.30 INCHES NOM MAX −−− 0.043 −−− 0.004 0.035 0.039 0.008 0.010 0.006 0.009 0.078 0.086 0.082 0.086 0.049 0.053 0.026 BSC 0.010 0.014 0.018 0.006 BSC 0.006 0.012 0.004 0.004 MIN −−− 0.000 0.027 0.006 0.003 0.070 0.078 0.045 0.66 1 2.50 0.65 PITCH XXX = Specific Device Code M = Date Code* G = Pb−Free Package (Note: Microdot may be in either location) DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. *Date Code orientation and/or position may vary depending upon manufacturing location. *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. STYLES ON PAGE 2 DOCUMENT NUMBER: DESCRIPTION: 98ASB42985B SC−88/SC70−6/SOT−363 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 2 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com SC−88/SC70−6/SOT−363 CASE 419B−02 ISSUE Y DATE 11 DEC 2012 STYLE 1: PIN 1. EMITTER 2 2. BASE 2 3. COLLECTOR 1 4. EMITTER 1 5. BASE 1 6. COLLECTOR 2 STYLE 2: CANCELLED STYLE 3: CANCELLED STYLE 4: PIN 1. CATHODE 2. CATHODE 3. COLLECTOR 4. EMITTER 5. BASE 6. ANODE STYLE 5: PIN 1. ANODE 2. ANODE 3. COLLECTOR 4. EMITTER 5. BASE 6. CATHODE STYLE 6: PIN 1. ANODE 2 2. N/C 3. CATHODE 1 4. ANODE 1 5. N/C 6. CATHODE 2 STYLE 7: PIN 1. SOURCE 2 2. DRAIN 2 3. GATE 1 4. SOURCE 1 5. DRAIN 1 6. GATE 2 STYLE 8: CANCELLED STYLE 9: PIN 1. EMITTER 2 2. EMITTER 1 3. COLLECTOR 1 4. BASE 1 5. BASE 2 6. COLLECTOR 2 STYLE 10: PIN 1. SOURCE 2 2. SOURCE 1 3. GATE 1 4. DRAIN 1 5. DRAIN 2 6. GATE 2 STYLE 11: PIN 1. CATHODE 2 2. CATHODE 2 3. ANODE 1 4. CATHODE 1 5. CATHODE 1 6. ANODE 2 STYLE 12: PIN 1. ANODE 2 2. ANODE 2 3. CATHODE 1 4. ANODE 1 5. ANODE 1 6. CATHODE 2 STYLE 13: PIN 1. ANODE 2. N/C 3. COLLECTOR 4. EMITTER 5. BASE 6. CATHODE STYLE 14: PIN 1. VREF 2. GND 3. GND 4. IOUT 5. VEN 6. VCC STYLE 15: PIN 1. ANODE 1 2. ANODE 2 3. ANODE 3 4. CATHODE 3 5. CATHODE 2 6. CATHODE 1 STYLE 16: PIN 1. BASE 1 2. EMITTER 2 3. COLLECTOR 2 4. BASE 2 5. EMITTER 1 6. COLLECTOR 1 STYLE 17: PIN 1. BASE 1 2. EMITTER 1 3. COLLECTOR 2 4. BASE 2 5. EMITTER 2 6. COLLECTOR 1 STYLE 18: PIN 1. VIN1 2. VCC 3. VOUT2 4. VIN2 5. GND 6. VOUT1 STYLE 19: PIN 1. I OUT 2. GND 3. GND 4. V CC 5. V EN 6. V REF STYLE 20: PIN 1. COLLECTOR 2. COLLECTOR 3. BASE 4. EMITTER 5. COLLECTOR 6. COLLECTOR STYLE 21: PIN 1. ANODE 1 2. N/C 3. ANODE 2 4. CATHODE 2 5. N/C 6. CATHODE 1 STYLE 22: PIN 1. D1 (i) 2. GND 3. D2 (i) 4. D2 (c) 5. VBUS 6. D1 (c) STYLE 23: PIN 1. Vn 2. CH1 3. Vp 4. N/C 5. CH2 6. N/C STYLE 24: PIN 1. CATHODE 2. ANODE 3. CATHODE 4. CATHODE 5. CATHODE 6. CATHODE STYLE 25: PIN 1. BASE 1 2. CATHODE 3. COLLECTOR 2 4. BASE 2 5. EMITTER 6. COLLECTOR 1 STYLE 26: PIN 1. SOURCE 1 2. GATE 1 3. DRAIN 2 4. SOURCE 2 5. GATE 2 6. DRAIN 1 STYLE 27: PIN 1. BASE 2 2. BASE 1 3. COLLECTOR 1 4. EMITTER 1 5. EMITTER 2 6. COLLECTOR 2 STYLE 28: PIN 1. DRAIN 2. DRAIN 3. GATE 4. SOURCE 5. DRAIN 6. DRAIN STYLE 29: PIN 1. ANODE 2. ANODE 3. COLLECTOR 4. EMITTER 5. BASE/ANODE 6. CATHODE STYLE 30: PIN 1. SOURCE 1 2. DRAIN 2 3. DRAIN 2 4. SOURCE 2 5. GATE 1 6. DRAIN 1 Note: Please refer to datasheet for style callout. If style type is not called out in the datasheet refer to the device datasheet pinout or pin assignment. DOCUMENT NUMBER: DESCRIPTION: 98ASB42985B SC−88/SC70−6/SOT−363 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 2 OF 2 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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