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Is Now
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onsemi and and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or
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notice. The information herein is provided “as-is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality,
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regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/
or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application
by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized
for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for
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subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal Opportunity/Affirmative
Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. Other names and brands may be claimed as the property of others.
NTD4863N
Power MOSFET
25 V, 49 A, Single N−Channel, DPAK/IPAK
Features
•
•
•
•
•
Trench Technology
Low RDS(on) to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
Optimized Gate Charge to Minimize Switching Losses
These are Pb−Free Devices
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V(BR)DSS
RDS(ON) MAX
ID MAX
9.3 mW @ 10 V
25 V
49 A
14 mW @ 4.5 V
Applications
• VCORE Applications
• DC−DC Converters
• High Side Switching
D
N−Channel
G
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Value
Unit
Drain−to−Source Voltage
VDSS
25
V
Gate−to−Source Voltage
VGS
±20
V
ID
11.3
A
Continuous Drain
Current RqJA
(Note 1)
TA = 25°C
Power Dissipation
RqJA (Note 1)
TA = 25°C
PD
1.95
W
Continuous Drain
Current RqJA
(Note 2)
TA = 25°C
ID
9.2
A
Steady
State
TA = 85°C
7.1
PD
1.27
W
Continuous Drain
Current RqJC
(Note 1)
TC = 25°C
ID
49
A
Power Dissipation
RqJC (Note 1)
TC = 25°C
PD
36.6
W
TA = 25°C
IDM
98
A
TA = 25°C
IDmaxPkg
35
A
TJ,
TSTG
−55 to
+175
°C
IS
30.5
A
Drain to Source dV/dt
dV/dt
6
V/ns
Single Pulse Drain−to−Source Avalanche
Energy (TJ = 25°C, VDD = 50 V, VGS = 10 V,
IL = 11 Apk, L = 1.0 mH, RG = 25 W)
EAS
60.5
mJ
TL
260
°C
TC = 85°C
tp=10ms
Current Limited by Package
Operating Junction and Storage
Temperature
Source Current (Body Diode)
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
4
8.8
TA = 25°C
Pulsed Drain
Current
4
4
1 2
1
3
DPAK
CASE 369AA
(Bent Lead)
STYLE 2
3 IPAK
CASE 369AC
(Straight Lead)
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
2
3
IPAK
CASE 369D
(Straight Lead
DPAK) STYLE 2
MARKING DIAGRAMS
& PIN ASSIGNMENTS
4
Drain
38
1
2 3
4
Drain
AYWW
48
63NG
Power Dissipation
RqJA (Note 2)
TA = 85°C
S
4
Drain
AYWW
48
63NG
Symbol
AYWW
48
63NG
Parameter
2
1 2 3
1 Drain 3
Gate Source Gate Drain Source 1 2 3
Gate Drain Source
A
Y
WW
4863N
G
= Assembly Location*
= Year
= Work Week
= Device Code
= Pb−Free Package
* The Assembly Location code (A) is front side
optional. In cases where the Assembly Location is
stamped in the package, the front side assembly
code may be blank.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
August, 2014 − Rev. 3
1
Publication Order Number:
NTD4863N/D
NTD4863N
THERMAL RESISTANCE MAXIMUM RATINGS
Symbol
Value
Unit
Junction−to−Case (Drain)
Parameter
RqJC
4.1
°C/W
Junction−to−TAB (Drain)
RqJC−TAB
3.5
Junction−to−Ambient – Steady State (Note 1)
RqJA
77
Junction−to−Ambient – Steady State (Note 2)
RqJA
118
1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
25
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/
TJ
Parameter
Typ
Max
Unit
OFF CHARACTERISTICS
V
23
Zero Gate Voltage Drain Current
IDSS
VGS = 0 V,
VDS = 20 V
Gate−to−Source Leakage Current
IGSS
VDS = 0 V, VGS = ±20 V
VGS(TH)
VGS = VDS, ID = 250 mA
TJ = 25°C
mV/°C
1.0
TJ = 125°C
mA
10
±100
nA
2.5
V
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
Negative Threshold Temperature
Coefficient
VGS(TH)/TJ
Drain−to−Source On Resistance
RDS(on)
Forward Transconductance
1.45
5.0
mV/°C
VGS = 10 V
ID = 30 A
8.4
9.3
VGS = 4.5 V
ID = 30 A
12.8
14
gFS
VDS = 1.5 V, ID = 15 A
Input Capacitance
CISS
VGS = 0 V, f = 1.0 MHz, VDS = 12 V
Output Capacitance
COSS
253
Reverse Transfer Capacitance
CRSS
144
mW
S
CHARGES AND CAPACITANCES
VGS = 4.5 V, VDS = 15 V, ID = 30 A
Total Gate Charge
QG(TOT)
Threshold Gate Charge
QG(TH)
1.0
Gate−to−Source Charge
QGS
3.4
Gate−to−Drain Charge
Total Gate Charge
QGD
pF
990
9.0
13.5
nC
4.1
QG(TOT)
VGS = 10 V, VDS = 15 V, ID = 30 A
17.8
nC
td(ON)
VGS = 4.5 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
11.5
ns
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
tr
19.7
td(OFF)
13.5
tf
3.6
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%.
4. Switching characteristics are independent of operating junction temperatures.
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2
NTD4863N
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) (continued)
Parameter
Symbol
Test Condition
td(ON)
VGS = 11.5 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
Min
Typ
Max
Unit
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
tr
ns
7.0
16.5
td(OFF)
20.2
tf
2.0
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
VSD
tRR
VGS = 0 V,
IS = 30 A
TJ = 25°C
0.96
TJ = 125°C
0.83
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 30 A
10.9
1.2
V
ns
Charge Time
ta
Discharge Time
tb
5.5
QRR
2.7
nC
2.49
nH
Reverse Recovery Charge
5.4
PACKAGE PARASITIC VALUES
TA = 25°C
Source Inductance
LS
Drain Inductance, DPAK
LD
0.0164
Drain Inductance, IPAK
LD
1.88
Gate Inductance
LG
3.46
Gate Resistance
RG
0.5
W
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%.
4. Switching characteristics are independent of operating junction temperatures.
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3
NTD4863N
TYPICAL PERFORMANCE CURVES
ID, DRAIN CURRENT (AMPS)
60
TJ = 25°C
4.2 V
10V
VDS ≥ 10 V
4V
50
ID, DRAIN CURRENT (AMPS)
60
3.8 V
40
3.6 V
30
3.4 V
20
3.2 V
10
3.0 V
50
40
30
20
TJ = 125°C
10
TJ = 25°C
2.8 V
0
1
2
3
4
0
5
4
0.01
3
4
5
6
7
8
9
10
11
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
Figure 2. Transfer Characteristics
0.02
5
0.020
TJ = 25°C
0.018
0.016
VGS = 4.5 V
0.014
0.012
0.010
VGS = 11.5 V
0.008
0.006
0.004
0.002
0
10
20
30
40
50
60
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
ID, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
1.8
10000
VGS = 0 V
ID = 30 A
VGS = 10 V
IDSS, LEAKAGE (nA)
1.6
3
Figure 1. On−Region Characteristics
0.03
2
2
1
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
ID = 30 A
TJ = 25°C
0
TJ = −55°C
0
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
0.04
RDS(on), DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
0
1.4
1.2
1.0
TJ = 150°C
1000
TJ = 125°C
100
0.8
0.6
−50
10
−25
0
25
50
75
100
125
150
175
5
10
15
20
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Drain Voltage
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4
25
NTD4863N
TYPICAL PERFORMANCE CURVES
Ciss
VGS = 0 V
TJ = 25°C
1000
C, CAPACITANCE (pF)
VGS , GATE−TO−SOURCE VOLTAGE (VOLTS)
1200
800
600
Coss
400
200
Crss
0
0
5
10
15
20
25
DRAIN−TO−SOURCE VOLTAGE (VOLTS)
10
QT
8
6
2
ID = 30 A
TJ = 25°C
0
0
IS, SOURCE CURRENT (AMPS)
t, TIME (ns)
100
tr
td(off)
td(on)
tf
10
RG, GATE RESISTANCE (OHMS)
8
10
12
14
16
20
VGS = 0 V
25
20
15
10
5
1 ms
10 ms
dc
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
10
100
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
EAS, SINGLE PULSE DRAIN−TO−SOURCE
AVALANCHE ENERGY (mJ)
100 ms
1
0.6
0.8
1.0
Figure 10. Diode Forward Voltage vs. Current
10 ms
VGS = 20 V
SINGLE PULSE
TC = 25°C
0.4
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
100
10
TJ = 25°C
0
0.2
100
1000
I D, DRAIN CURRENT (AMPS)
6
QG, TOTAL GATE CHARGE (nC)
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
0.1
0.1
4
30
VDD = 15 V
ID = 30 A
VGS = 11.5 V
1
2
Figure 8. Gate−To−Source and Drain−To−Source
Voltage vs. Total Charge
1000
1
1
Q2
4
Figure 7. Capacitance Variation
10
VGS
Q1
60
ID = 11 A
50
40
30
20
10
0
25
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
50
75
100
125
150
TJ, JUNCTION TEMPERATURE (°C)
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
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5
175
NTD4863N
r(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE
(NORMALIZED)
TYPICAL PERFORMANCE CURVES
1.0
D = 0.5
0.2
0.1
0.1
0.05
P(pk)
0.02
0.01
SINGLE PULSE
0.01
1.0E-05
1.0E-04
t1
t2
DUTY CYCLE, D = t1/t2
1.0E-03
1.0E-02
t, TIME (ms)
RqJC(t) = r(t) RqJC
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) − TC = P(pk) RqJC(t)
1.0E-01
1.0E+00
1.0E+01
Figure 13. Thermal Response
ORDERING INFORMATION
Package
Shipping†
NTD4863NT4G
DPAK
(Pb−Free)
2500 / Tape & Reel
NTD4863N−1G
IPAK
(Pb−Free)
75 Units / Rail
NTD4863N−35G
IPAK Trimmed Lead
(3.5 ± 0.15 mm)
(Pb−Free)
75 Units / Rail
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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6
NTD4863N
PACKAGE DIMENSIONS
DPAK (SINGLE GUAGE)
CASE 369AA
ISSUE B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
C
A
A
E
b3
c2
B
4
L3
Z
D
1
2
H
DETAIL A
3
DIM
A
A1
b
b2
b3
c
c2
D
E
e
H
L
L1
L2
L3
L4
Z
L4
b2
e
c
b
0.005 (0.13)
M
C
H
L2
GAUGE
PLANE
C
L
SEATING
PLANE
A1
L1
DETAIL A
ROTATED 905 CW
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
SOLDERING FOOTPRINT*
6.20
0.244
2.58
0.102
5.80
0.228
3.00
0.118
1.60
0.063
INCHES
MIN
MAX
0.086 0.094
0.000 0.005
0.025 0.035
0.030 0.045
0.180 0.215
0.018 0.024
0.018 0.024
0.235 0.245
0.250 0.265
0.090 BSC
0.370 0.410
0.055 0.070
0.108 REF
0.020 BSC
0.035 0.050
−−− 0.040
0.155
−−−
6.17
0.243
SCALE 3:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
7
MILLIMETERS
MIN
MAX
2.18
2.38
0.00
0.13
0.63
0.89
0.76
1.14
4.57
5.46
0.46
0.61
0.46
0.61
5.97
6.22
6.35
6.73
2.29 BSC
9.40 10.41
1.40
1.78
2.74 REF
0.51 BSC
0.89
1.27
−−−
1.01
3.93
−−−
NTD4863N
PACKAGE DIMENSIONS
3 IPAK, STRAIGHT LEAD
CASE 369AC
ISSUE O
B
V
NOTES:
1.. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2.. CONTROLLING DIMENSION: INCH.
3. SEATING PLANE IS ON TOP OF
DAMBAR POSITION.
4. DIMENSION A DOES NOT INCLUDE
DAMBAR POSITION OR MOLD GATE.
C
E
R
DIM
A
B
C
D
E
F
G
H
J
K
R
V
W
A
SEATING PLANE
K
W
F
J
G
H
D
3 PL
0.13 (0.005) W
INCHES
MIN
MAX
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.043
0.090 BSC
0.034 0.040
0.018 0.023
0.134 0.142
0.180 0.215
0.035 0.050
0.000 0.010
MILLIMETERS
MIN
MAX
5.97
6.22
6.35
6.73
2.19
2.38
0.69
0.88
0.46
0.58
0.94
1.09
2.29 BSC
0.87
1.01
0.46
0.58
3.40
3.60
4.57
5.46
0.89
1.27
0.000
0.25
IPAK
CASE 369D
ISSUE C
C
B
V
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
E
R
4
Z
A
S
1
2
3
−T−
SEATING
PLANE
K
J
F
H
D
G
DIM
A
B
C
D
E
F
G
H
J
K
R
S
V
Z
INCHES
MIN
MAX
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.045
0.090 BSC
0.034 0.040
0.018 0.023
0.350 0.380
0.180 0.215
0.025 0.040
0.035 0.050
0.155
−−−
MILLIMETERS
MIN
MAX
5.97
6.35
6.35
6.73
2.19
2.38
0.69
0.88
0.46
0.58
0.94
1.14
2.29 BSC
0.87
1.01
0.46
0.58
8.89
9.65
4.45
5.45
0.63
1.01
0.89
1.27
3.93
−−−
3 PL
0.13 (0.005)
M
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
T
ON Semiconductor and the
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended,
or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which
the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or
unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable
copyright laws and is not for resale in any manner.
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LITERATURE FULFILLMENT:
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8
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For additional information, please contact your local
Sales Representative
NTD4863N/D