NTF3055L108,
NVF3055L108
MOSFET – Power,
N-Channel, Logic Level,
SOT-223
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3.0 A, 60 V
3.0 A, 60 V
RDS(on) = 120 mW
Designed for low voltage, high speed switching applications in power
supplies, converters and power motor controls and bridge circuits.
Features
• NVF Prefix for Automotive and Other Applications Requiring
•
N−Channel
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
These Devices are Pb−Free and are RoHS Compliant
D
Applications
•
•
•
•
G
Power Supplies
Converters
Power Motor Controls
Bridge Circuits
S
4
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
60
Vdc
Drain−to−Gate Voltage (RGS = 1.0 MW)
VDGR
60
Vdc
VGS
± 15
± 20
Vdc
Vpk
ID
ID
3.0
1.4
9.0
Apk
PD
2.1
1.3
0.014
Watts
Watts
W/°C
TJ, Tstg
−55
to 175
°C
EAS
74
mJ
Gate−to−Source Voltage
− Continuous
− Non−repetitive (tp ≤ 10 ms)
Drain Current
− Continuous @ TA = 25°C (Note 1)
− Continuous @ TA = 100°C (Note 2)
− Single Pulse (tp ≤ 10 ms)
Total Power Dissipation @ TA = 25°C (Note 1)
Total Power Dissipation @ TA = 25°C (Note 2)
Derate above 25°C
Operating and Storage Temperature Range
Single Pulse Drain−to−Source Avalanche
Energy − Starting TJ = 25°C
(VDD = 25 Vdc, VGS = 5.0 Vdc,
IL(pk) = 7.0 Apk, L = 3.0 mH, VDS = 60 Vdc)
Thermal Resistance
−Junction−to−Ambient (Note 1)
−Junction−to−Ambient (Note 2)
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from case for 10 seconds
Adc
IDM
RqJA
RqJA
72.3
114
TL
260
°C/W
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
© Semiconductor Components Industries, LLC, 2016
May, 2019 − Rev. 9
1
1
2
SOT−223
CASE 318E
STYLE 3
3
MARKING DIAGRAM
AYW
3055L = Device Code
3055LG
A
= Assembly Location
G
Y
= Year
W
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
PIN ASSIGNMENT
4 Drain
1
Gate
2
3
Drain
Source
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
Publication Order Number:
NTF3055L108/D
NTF3055L108, NVF3055L108
1. When surface mounted to an FR4 board using 1″ pad size, 1 oz.
(Cu. Area 1 in2).
2. When surface mounted to an FR4 board using minimum recommended pad
size, 2 oz. (Cu. Area 0.272 in2).
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2
NTF3055L108, NVF3055L108
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Symbol
Characteristic
Min
Typ
Max
Unit
60
−
68
68
−
−
−
−
−
−
1.0
10
−
−
± 100
1.0
−
1.68
4.6
2.0
−
−
92
120
−
0.290
0.250
0.43
−
gfs
−
5.7
−
Mhos
Ciss
−
313
440
pF
Coss
−
112
160
Crss
−
40
60
td(on)
−
11
25
tr
−
35
70
td(off)
−
22
45
tf
−
27
60
QT
−
7.6
15
Q1
−
1.4
−
Q2
−
4.0
−
−
−
0.87
0.72
1.0
−
trr
−
35
−
ta
−
21
−
tb
−
14
−
QRR
−
0.044
−
OFF CHARACTERISTICS
V(BR)DSS
Drain−to−Source Breakdown Voltage (Note 3)
(VGS = 0 Vdc, ID = 250 mAdc)
Temperature Coefficient (Positive)
Zero Gate Voltage Drain Current
(VDS = 60 Vdc, VGS = 0 Vdc)
(VDS = 60 Vdc, VGS = 0 Vdc, TJ = 150°C)
IDSS
Gate−Body Leakage Current
IGSS
(VGS = ± 15 Vdc, VDS = 0 Vdc)
Vdc
mV/°C
mAdc
nAdc
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage (Note 3)
(VDS = VGS, ID = 250 mAdc)
Threshold Temperature Coefficient (Negative)
VGS(th)
Static Drain−to−Source On−Resistance (Note 3)
(VGS = 5.0 Vdc, ID = 1.5 Adc)
RDS(on)
Static Drain−to−Source On−Resistance (Note 3)
(VGS = 5.0 Vdc, ID = 3.0 Adc)
(VGS = 5.0 Vdc, ID = 1.5 Adc, TJ = 150°C)
VDS(on)
Forward Transconductance (Note 3)
(VDS = 7.0 Vdc, ID = 3.0 Adc)
Vdc
mV/°C
mW
Vdc
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
(VDS = 25 Vdc, VGS = 0 V,
f = 1.0 MHz)
Transfer Capacitance
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
(VDD = 30 Vdc, ID = 3.0 Adc,
VGS = 5.0 Vdc,
RG = 9.1 W) (Note 3)
Fall Time
Gate Charge
(VDS = 48 Vdc, ID = 3.0 Adc,
VGS = 5.0 Vdc) (Note 3)
ns
nC
SOURCE−DRAIN DIODE CHARACTERISTICS
Forward On−Voltage
(IS = 3.0 Adc, VGS = 0 Vdc)
(IS = 3.0 Adc, VGS = 0 Vdc,
TJ = 150°C) (Note 3)
Reverse Recovery Time
(IS = 3.0 Adc, VGS = 0 Vdc,
dIS/dt = 100 A/ms) (Note 3)
Reverse Recovery Stored Charge
VSD
Vdc
ns
mC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2.0%.
4. Switching characteristics are independent of operating junction temperatures.
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3
NTF3055L108, NVF3055L108
TYPICAL ELECTRICAL CHARACTERISTICS
5
VDS > = 10 V
VGS = 3.5 V
VGS = 4.5 V
4
3
VGS = 6 V
2
VGS = 10 V
VGS = 3.2 V
VGS = 3 V
VGS = 2.8 V
1
0
6
VGS = 3.4 V
ID, DRAIN CURRENT (AMPS)
ID, DRAIN CURRENT (AMPS)
6
VGS = 2.5 V
0.5
0
1.5
1
2
2.5
5
4
3
TJ = 100°C
2
TJ = 25°C
1
TJ = −55°C
0
3
1
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
TJ = 100°C
0.14
0.12
TJ = 25°C
0.1
0.08
TJ = −55°C
0.06
0.04
0.02
0
2
1
3
4
5
6
ID, DRAIN CURRENT (AMPS)
0.16
3.5
4
4.5
5
0.14
TJ = 100°C
0.12
0.1
TJ = 25°C
0.08
0.06
TJ = −55°C
0.04
0.02
0
1
2
3
4
5
6
ID, DRAIN CURRENT (AMPS)
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
10000
VGS = 0 V
ID = 1.5 A
VGS = 5 V
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
1.8
3
VGS = 10 V
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
2
2.5
Figure 2. Transfer Characteristics
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
VGS = 5 V
2
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics
0.16
1.5
1.6
1.4
1.2
1
TJ = 150°C
1000
100
TJ = 100°C
10
0.8
0.6
−50
−25
0
25
50
75
100
125
150
175
1
0
10
20
30
40
50
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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4
60
NTF3055L108, NVF3055L108
1000
C, CAPACITANCE (pF)
VGS = 0 V
VDS = 0 V
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
TYPICAL ELECTRICAL CHARACTERISTICS
TJ = 25°C
Ciss
800
600
Crss
400
Ciss
Coss
200
Crss
0
10
5 VGS 0 VDS 5
10
15
20
25
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE
(VOLTS)
6
QT
5
VGS
4
Q1
2
1
ID = 3 A
TJ = 25°C
0
0
1
IS, SOURCE CURRENT (AMPS)
tf
td(off)
td(on)
1
10
100
8
VGS = 0 V
TJ = 25°C
2.8
2.4
2
1.6
1.2
0.8
0.4
0
0.54
0.58
0.62 0.66
0.7
0.74 0.78 0.82 0.86 0.9
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
100 ms
ID, DRAIN CURRENT (AMPS)
7
6
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
10
1 ms
1
10 ms
0.1
0.001
0.1
5
RG, GATE RESISTANCE (W)
VGS = 20 V
SINGLE PULSE
TC = 25°C
dc
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
1
10
EAS, SINGLE PULSE DRAIN−TO−SOURCE
AVALANCHE ENERGY (mJ)
t, TIME (ns)
tr
0.01
4
3.2
100
1
3
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
VDS = 30 V
ID = 3 A
VGS = 5 V
10
2
Qg, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
1000
Q2
3
1000
100
80
ID = 7 A
70
60
50
40
30
20
10
0
25
50
75
100
125
150
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
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5
175
NTF3055L108, NVF3055L108
r(t), EFFECTIVE TRANSIENT THERMAL
RESPONSE RESISTANCE
TYPICAL ELECTRICAL CHARACTERISTICS
100
10
D = 0.5
0.2
0.1
0.05
0.02
1
0.01
0.1
Single Pulse
0.01
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
t, TIME (s)
Figure 13. Thermal Response
ORDERING INFORMATION
Package
Shipping†
NTF3055L108T1G
SOT−223 (TO−261)
(Pb−Free)
1000 / Tape & Reel
NVF3055L108T1G
SOT−223 (TO−261)
(Pb−Free)
Device
1000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT−223 (TO−261)
CASE 318E−04
ISSUE R
DATE 02 OCT 2018
SCALE 1:1
q
q
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42680B
SOT−223 (TO−261)
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
SOT−223 (TO−261)
CASE 318E−04
ISSUE R
STYLE 1:
PIN 1.
2.
3.
4.
BASE
COLLECTOR
EMITTER
COLLECTOR
STYLE 2:
PIN 1.
2.
3.
4.
ANODE
CATHODE
NC
CATHODE
STYLE 6:
PIN 1.
2.
3.
4.
RETURN
INPUT
OUTPUT
INPUT
STYLE 7:
PIN 1.
2.
3.
4.
ANODE 1
CATHODE
ANODE 2
CATHODE
STYLE 11:
PIN 1. MT 1
2. MT 2
3. GATE
4. MT 2
STYLE 3:
PIN 1.
2.
3.
4.
GATE
DRAIN
SOURCE
DRAIN
STYLE 8:
STYLE 12:
PIN 1. INPUT
2. OUTPUT
3. NC
4. OUTPUT
CANCELLED
DATE 02 OCT 2018
STYLE 4:
PIN 1.
2.
3.
4.
SOURCE
DRAIN
GATE
DRAIN
STYLE 5:
PIN 1.
2.
3.
4.
STYLE 9:
PIN 1.
2.
3.
4.
INPUT
GROUND
LOGIC
GROUND
STYLE 10:
PIN 1. CATHODE
2. ANODE
3. GATE
4. ANODE
DRAIN
GATE
SOURCE
GATE
STYLE 13:
PIN 1. GATE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
GENERIC
MARKING DIAGRAM*
AYW
XXXXXG
G
1
A
= Assembly Location
Y
= Year
W
= Work Week
XXXXX = Specific Device Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42680B
SOT−223 (TO−261)
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 2 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
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