NTGS3136P

NTGS3136P Power MOSFET -20 V, -5.8 A, Single P-Channel, TSOP-6 Features • • • • Low RDS(on) in TSOP-6 Package 1.8 V Gate Rating Fast Switching This is a Pb-Free Device http://onsemi.com V(BR)DSS RDS(ON) TYP 25 mW @ -4.5 V -20 V 32 mW @ -2.5 V 41 mW @ -1.8 V P-Channel ID MAX -5.1 A -4.5 A -2.5 A Applications • Optimized for Battery and Load Management Applications in • • Portable Equipment High Side Load Switch Switching Circuits for Game Consoles, Camera Phone, etc. MAXIMUM RATINGS (TJ = 25°C unless otherwise stated) Parameter Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current (Note 1) Steady State tv5s Power Dissipation (Note 1) Steady State tv5s Continuous Drain Current (Note 2) Power Dissipation (Note 2) Pulsed Drain Current Steady State TA = 25°C TA = 85°C TA = 25°C tp = 10 ms PD IDM TJ, TSTG TL ID TA = 25°C TA = 85°C TA = 25°C PD TA = 25°C 1.6 -3.7 -2.7 0.7 -20 -55 to 150 260 A W A °C °C 1 Symbol VDSS VGS ID Value -20 $8.0 -5.1 -3.6 -5.8 1.25 W A 4 Unit V V 3 1256 MARKING DIAGRAM TSOP-6 CASE 318G STYLE 1 1 SD = Device Code M = Date Code G = Pb-Free Package (Note: Microdot may be in either location) SD MG G Operating Junction and Storage Temperature Lead Temperature for Soldering Purposes (1/8” from case for 10 s) PIN ASSIGNMENT Drain Drain Source 654 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface-mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces) 2. Surface-mounted on FR4 board using the minimum recommended pad size (Cu area = 0.0775 in sq). 1 2 3 Drain Drain Gate ORDERING INFORMATION Device NTGS3136PT1G Package TSOP-6 (Pb-Free) Shipping† 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2007 1 August, 2007 - Rev. 0 Publication Order Number: NTGS3136P/D NTGS3136P THERMAL RESISTANCE MAXIMUM RATINGS Parameter Junction-to-Ambient – Steady State (Note 3) Junction-to-Ambient – t = 5 s (Note 3) Junction-to-Ambient – Steady State (Note 4) Symbol RqJA RqJA RqJA Value 100 77 185 °C/W Unit 3. Surface-mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces) 4. Surface-mounted on FR4 board using the minimum recommended pad size (Cu area = 0.0775 in sq). ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage Drain-to-Source Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current V(BR)DSS V(BR)DSS/TJ IDSS IGSS VGS = 0 V, ID = -250 mA ID = -250 mA, Reference 25°C VGS = 0 V, VDS = -20 V TJ = 25°C TJ = 85°C -20 -13 -1.0 -5.0 $0.1 mA V mV/°C mA Symbol Test Condition Min Typ Max Unit Gate-to-Source Leakage Current ON CHARACTERISTICS (Note 5) Gate Threshold Voltage Negative Threshold Temperature Coefficient Drain-to-Source On Resistance VDS = 0 V, VGS = ±8.0 V VGS = VDS, ID = -250 mA VGS(TH) VGS(TH)/TJ RDS(on) -0.4 3 -1.0 V mV/°C VGS = -4.5 V, ID = -5.1 A VGS = -2.5 V, ID = -4.5 A VGS = -1.8 V, ID = -2.5 A 25 32 41 22 33 40 51 mW Forward Transconductance gFS VDS = -5.0 V, ID = -5.1 A S CHARGES, CAPACITANCES AND GATE RESISTANCE Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Threshold Gate Charge Gate-to-Source Charge Gate-to-Drain Charge Gate Resistance SWITCHING CHARACTERISTICS (Note 6) Turn-On Delay Time Rise Time Turn-Of f Delay Time Fall Time DRAIN-SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD tRR VGS = 0 V, IS = -1.7 A TJ = 25°C TJ = 125°C -0.7 -0.6 37 60 ns -1.2 V td(ON) Tr td(OFF) Tf VGS = *4.5 V, VDD = -10 V, ID = -1.0 A, RG = 6.0 W 9 9 99 48 19 19 160 79 ns CISS COSS CRSS QG(TOT) QG(TH) QGS QGD RG VGS = -4.5 V, VDS = -10 V; ID = -5.1 A VGS = 0 V, f = 1 MHz, VDS = -10 V 1901 274 175 18 0.7 2.4 4.3 7.6 W 29 nC pF Reverse Recovery Time VGS = 0 V, dIS/dt = 100 A/ms, IS = -1.7 A 5. Pulse Test: pulse width v 300 ms, duty cycle v 2% 6. Switching characteristics are independent of operating junction temperatures http://onsemi.com 2 NTGS3136P TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted) 20 VGS = -4.5 V -I D, DRAIN CURRENT (A) 16 -2 V -1.8 V 20 VDS = -5 V -I D, DRAIN CURRENT (A) 15 TJ = 25°C 12 -2.5 V -1.5 V 10 TJ = 25°C 5 TJ = 125°C 0 TJ = -55°C 8.0 4.0 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 -V DS, DRAIN-TO-SOURCE VOLTAGE (V) -V GS, GATE-T O-SOURCE VOLTAGE (V) Figure 1. On-Region Characteristics RDS(on), DRAIN-T O-SOURCE RESISTANCE (W) 0.14 ID = -5.1 A 0.12 0.10 0.08 0.06 0.04 0.02 0 1.0 TJ = 125°C TJ = 25°C 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 RDS(on), DRAIN-T O-SOURCE RESISTANCE (W) 0.10 0.09 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0 0 Figure 2. Transfer Characteristics TJ = 25°C -1.8 V -2 V -2.5 V VGS = -4.5 V 4.0 8.0 12 16 20 -V GS, GATE-T O-SOURCE VOLTAGE (V) -I D, DRAIN CURRENT (A) Figure 3. On-Resistance vs. Gate-to-Source Voltage 1.5 RDS(on), DRAIN-T O-SOURCE RESISTANCE (NORMALIZED) 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 -50 -25 0 25 50 75 100 125 150 ID = -4.5 A VGS = -5.1 V C, CAPACITANCE (pF) 2800 2600 2400 2200 2000 1800 1600 1400 1200 1000 800 600 400 200 0 Figure 4. On-Resistance vs. Drain Current and Gate Voltage Ciss VGS = 0 V TJ = 25°C f = 1 MHz Coss Crss 0 2 4 6 8 10 12 TJ, JUNCTION TEMPERATURE (°C) DRAIN-T O-SOURCE VOLTAGE (V) Figure 5. On-Resistance Variation with Temperature Figure 6. Capacitance Variation http://onsemi.com 3 NTGS3136P TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted) -V GS, GATE-T O-SOURCE VOLTAGE (V) 5 QT 4 -V DS 10 8 3 -V GS 6 2 QGS QGD 4 1 VDS = -10 V ID = -5.1 A TJ = 25°C 0 2 4 6 8 10 12 14 16 2 0 18 12 100 VGS = 0 V -I S, SOURCE CURRENT (A) -V DS, DRAIN-TO-SOURCE VOLTAGE (V) 10 TJ = 150°C TJ = 25°C 0 QG, TOTAL GATE CHARGE (nC) 1.0 0 0.2 0.4 0.6 0.8 1.0 -V SD, SOURCE-TO-DRAIN VOLTAGE (V) 1.2 Figure 7. Gate-to-Source and Drain-to-Source Voltage vs. Total Charge Figure 8. Diode Forward Voltage vs. Current 0.8 ID = -250 mA 0.7 0.6 -V GS(th) (V) 0.5 0.4 0.3 0.2 -50 80 70 60 POWER (W) -25 0 25 50 75 100 125 150 50 40 30 20 10 0 1E-3 1E-2 1E-1 1 1E+1 1E+2 1E+3 TJ, JUNCTION TEMPERATURE (°C) SINGLE PULSE TIME (s) Figure 9. Threshold Voltage Figure 10. Single Pulse Maximum Power Dissipation R(t), EFFECTIVE TRANSIENT THERMAL RESPONSE (NORMALIZED) 1 100 -I D, DRAIN CURRENT (A) 10 100 ms 1 ms Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.01 0.02 0.01 1E-04 1E-03 1E-02 1E-01 1 1E+01 1E+02 1E+03 1 10 ms VGS = -8.0 V SINGLE PULSE 0.1 TC = 25°C RDS(on) LIMIT Thermal Limit Package Limit 0.01 0.1 1 dc 10 100 -V DS, DRAIN-TO-SOURCE VOLTAGE (V) t, TIME (s) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. FET Thermal Response http://onsemi.com 4 NTGS3136P PACKAGE DIMENSIONS TSOP-6 CASE 318G-02 ISSUE S D NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MILLIMETERS NOM MAX 1.00 1.10 0.06 0.10 0.38 0.50 0.18 0.26 3.00 3.10 1.50 1.70 0.95 1.05 0.40 0.60 2.75 3.00 10° INCHES NOM 0.039 0.002 0.014 0.007 0.118 0.059 0.037 0.016 0.108 - 6 5 1 2 4 HE E 3 b e q 0.05 (0.002) A1 A L c DIM A A1 b c D E e L HE q MIN 0.90 0.01 0.25 0.10 2.90 1.30 0.85 0.20 2.50 0° MIN 0.035 0.001 0.010 0.004 0.114 0.051 0.034 0.008 0.099 0° MAX 0.043 0.004 0.020 0.010 0.122 0.067 0.041 0.024 0.118 10° SOLDERING FOOTPRINT* 2.4 0.094 STYLE 1: PIN 1. DRAIN 2. DRAIN 3. GATE 4. SOURCE 5. DRAIN 6. DRAIN 1.9 0.075 0.95 0.037 0.95 0.037 0.7 0.028 1.0 0.039 SCALE 10:1 mm inches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. 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