NTHD4N02F
Power MOSFET and
Schottky Diode
20 V, 3.9 A, N−Channel, with 3.7 A
Schottky Barrier Diode, ChipFETt
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Features
•
•
•
•
•
Leadless SMD Package Featuring a MOSFET and Schottky Diode
40% Smaller than TSOP−6 Package with Better Thermals
Super Low Gate Charge MOSFET
Ultra Low VF Schottky
Pb−Free Package is Available
MOSFET
V(BR)DSS
RDS(on) TYP
60 mW @ 4.5 V
20 V
SCHOTTKY DIODE
• Fast Switching, low Gate Charge for DC−to−DC Buck and Boost
•
3.9 A
80 mW @ 2.5 V
Applications
•
ID MAX
VR MAX
VF TYP
IF MAX
20 V
0.35 V
3.7 A
Converters
Li−Ion Battery Applications in Cell Phones, PDAs, DSCs,
and Media Players
Load Side Switching
D1
A
MOSFET MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
20
V
Gate−to−Source Voltage
VGS
±12
V
ID
2.9
A
Continuous Drain
Current
Steady
State
TJ = 25°C
TJ = 85°C
2.1
tv5s
TJ = 25°C
3.9
tp=10 ms
Pulsed Drain Current
Power Dissipation
IDM
12
A
PD
0.91
W
Steady
State
TJ = 25°C
TJ = 85°C
0.36
tv5s
TJ = 25°C
2.1
Continuous Source Current (Body Diode)
S1
ChipFET]
CASE 1206A
STYLE 3
MARKING
DIAGRAM
PIN CONNECTIONS
A
1
8
C
2
7
6
C
2
D
3
IS
2.6
TJ, TSTG
−55 to 150
°C
A
TL
260
°C
S
3
G
4
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
C
SCHOTTKY DIODE
N−Channel MOSFET
1
A
5
C2 M
G
Operating Junction and Storage
Temperature
G1
4
D
SCHOTTKY DIODE MAXIMUM RATINGS
(TJ = 25°C unless otherwise noted)
Parameter
Peak Repetitive Reverse Voltage
DC Blocking Voltage
Average Rectified
Forward Current
Steady
State
Symbol
Value
Unit
VRRM
20
V
VR
20
V
IF
2.2
A
3.7
A
TJ = 25°C
tv5s
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
© Semiconductor Components Industries, LLC, 2005
November, 2005 − Rev. 8
1
C2 = Specific Device Code
M = Month Code
G
= Pb−Free Package
ORDERING INFORMATION
Package
Shipping †
NTHD4N02FT1
ChipFET
3000/Tape & Reel
NTHD4N02FT1G
ChipFET
(Pb−Free)
3000/Tape & Reel
Device
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Publication Order Number:
NTHD4N02F/D
NTHD4N02F
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Max
Unit
Junction−to−Ambient – Steady State (Note 1)
RqJA
110
°C/W
Junction−to−Ambient – t v 5 s
RqJA
60
°C/W
1. Surface Mounted on FR4 Board using 1 in sq. pad size (Cu area = 1.27 in sq. [1 oz] including traces).
MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
Test Conditions
Min
Typ
VGS = 0 V, ID = 250 mA
20
28
Max
Units
1.0
mA
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V
VDS = 16 V
V
Zero Gate Voltage Drain Current
IDSS
Gate−to−Source Leakage Current
IGSS
VDS = 0 V, VGS = "12 V
Gate Threshold Voltage
VGS(TH)
VGS = VDS, ID = 250 mA
1.2
V
Drain−to−Source On−Resistance
RDS(on)
VGS = 4.5, ID = 2.9 A
0.058
0.080
W
VGS = 2.5, ID = 2.3 A
0.077
0.115
VDS = 10 V, ID = 2.9 A
6.0
TJ = 25°C
TJ = 85°C
5.0
"100
nA
ON CHARACTERISTICS (Note 2)
Forward Transconductance
gFS
0.6
S
CHARGES AND CAPACITANCES
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
Total Gate Charge
VGS = 0 V, f = 1.0 MHz,
VDS = 10 V
QG(TOT)
VGS = 4.5 V, VDS = 10 V,
ID = 2.9 A
pF
180
300
80
130
30
50
2.6
4.0
nC
ns
Gate−to−Source Charge
QGS
0.6
Gate−to−Drain Charge
QGD
0.7
td(ON)
5.0
10
9.0
18
SWITCHING CHARACTERISTICS (Note 3)
Turn−On Delay Time
Rise Time
tr
Turn−Off Delay Time
Fall Time
td(OFF)
VGS = 4.5 V, VDD = 16 V,
ID = 2.9 A, RG = 2.5 W
tf
10
20
3.0
6.0
0.8
1.15
DRAIN−SOURCE DIODE CHARACTERISTICS (Note 2)
Forward Diode Voltage
VSD
Reverse Recovery Time
tRR
Charge Time
ta
Discharge Time
tb
Reverse Recovery Charge
VGS = 0 V, IS = 2.6 A
V
ns
12.5
9.0
VGS = 0 V, IS = 2.6 A,
dIS/dt = 100 A/ms
3.5
QRR
6.0
nC
SCHOTTKY DIODE ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
Test Conditions
Max
Units
Maximum Instantaneous Forward Voltage
VF
IF = 0.1 A
0.31
V
IF = 1.0 A
0.365
Maximum Instantaneous Reverse Current
IR
VR = 10 V
0.75
VR = 20 V
2.5
Halfwave, Single Pulse, 60 Hz
23
Non−Repetitive Peak Surge Current
IFSM
2. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.
3. Switching characteristics are independent of operating junction temperatures.
http://onsemi.com
2
Min
Typ
mA
A
NTHD4N02F
TYPICAL MOSFET PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
8
VGS = 5 V to 3 V
VDS ≥ 10 V
TJ = 25°C
VGS = 2.4 V
2V
2.2 V
6
ID, DRAIN CURRENT (AMPS)
ID, DRAIN CURRENT (AMPS)
8
4
1.8 V
2
1.6 V
1.4 V
4
2
100°C
0
1
2
3
4
5
6
7
8
9
10
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
0
0.5
1
1.5
2
2.5
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
0
0.15
ID = 2.9 A
TJ = 25°C
0.1
0.05
0
1
3
5
2
4
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
0
6
3
0.1
TJ = 25°C
VGS = 2.5 V
0.07
VGS = 4.5 V
0.04
3
1
5
7
ID, DRAIN CURRENT (AMPS)
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
1.7
100
ID = 2.9 A
VGS = 4.5 V
VGS = 0 V
1.5
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
TC = −55°C
25°C
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
6
1.3
1.1
TJ = 100°C
10
0.9
0.7
−50
1
−25
0
25
50
75
100
125
150
2
4
6
8
10
12
14
16
18
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
http://onsemi.com
3
20
NTHD4N02F
TYPICAL MOSFET PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
VDS = 0 V
5
VGS = 0 V
TJ = 25°C
20
QT
4.5
300
4
16
3.5
CRSS
3
12
2.5
200
2
ID = 2.9 A
TJ = 25°C
QGD
QGS
1.5
100
COSS
8
1
4
0.5
0
10
5
VGS
0
VDS
5
10
15
20
0
0
0
0.5
1.5
2
2.5
3
QG, TOTAL GATE CHARGE (nC)
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
Figure 7. Capacitance Variation
100
7
IS, SOURCE CURRENT (AMPS)
VDD = 16 V
ID = 2.9 A
VGS = 4.5 V
t, TIME (ns)
1
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
C, CAPACITANCE (pF)
CISS
VGS, GATE−TO−SOURCE VOLTAGE (V)
400
tr
10
td(off)
td(on)
tf
1
1
10
RG, GATE RESISTANCE (W)
100
VGS = 0 V
TJ = 25°C
6
5
4
3
2
1
0
0.3
0.45
0.6
0.75
0.9
1.05
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
http://onsemi.com
4
1.2
NTHD4N02F
TYPICAL SCHOTTKY PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
10
IF, INSTANTANEOUS FORWARD
CURRENT (AMPS)
IF, INSTANTANEOUS FORWARD
CURRENT (AMPS)
10
TJ = 150°C
1
TJ = 25°C
TJ = −55°C
0.1
0.00
0.40
0.20
0.60
TJ = 150°C
1
TJ = 25°C
0.1
0.00
0.80
VF, INSTANTANEOUS FORWARD VOLTAGE (VOLTS)
100E−3
IR, REVERSE CURRENT (AMPS)
0.60
0.80
Figure 12. Maximum Forward Voltage
IR, MAXIMUM REVERSE CURRENT (AMPS)
Figure 11. Typical Forward Voltage
100E−3
TJ = 150°C
10E−3
TJ = 100°C
1E−3
100E−6
TJ = 150°C
10E−3
TJ = 100°C
1E−3
100E−6
TJ = 25°C
10E−6
0
10
VR, REVERSE VOLTAGE (VOLTS)
TJ = 25°C
10E−6
20
0
PFO, AVERAGE POWER DISSIPATION (WATTS)
3.5
freq = 20 kHz
3
dc
2.5
square wave
2
Ipk/Io = p
1.5
Ipk/Io = 5
1
Ipk/Io = 10
0.5
Ipk/Io = 20
0
25
45
65
85
105
125
10
VR, REVERSE VOLTAGE (VOLTS)
20
Figure 14. Maximum Reverse Current
Figure 13. Typical Reverse Current
IO, AVERAGE FORWARD CURRENT (AMPS)
0.40
0.20
VF, MAXIMUM INSTANTANEOUS FORWARD
VOLTAGE (VOLTS)
145
165
TL, LEAD TEMPERATURE (°C)
1.4
Ipk/Io = p
1.2
square wave
dc
Ipk/Io = 5
1
Ipk/Io = 10
0.8
Ipk/Io = 20
0.6
0.4
0.2
0
0
Figure 15. Current Derating
0.5
1
1.5
2
2.5
3
IO, AVERAGE FORWARD CURRENT (AMPS)
Figure 16. Forward Power Dissipation
ChipFET is a trademark of Vishay Siliconix.
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5
3.5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
ChipFETt
CASE1206A−03
ISSUE K
8
DATE 19 MAY 2009
1
SCALE 1:1
D
8
7
q
6
L
5
HE
5
6
7
8
4
3
2
1
E
1
2
3
e1
4
b
e
DIM
A
b
c
D
E
e
e1
L
HE
q
c
RESET
A
0.05 (0.002)
STYLE 1:
PIN 1. DRAIN
2. DRAIN
3. DRAIN
4. GATE
5. SOURCE
6. DRAIN
7. DRAIN
8. DRAIN
STYLE 2:
PIN 1. SOURCE 1
2. GATE 1
3. SOURCE 2
4. GATE 2
5. DRAIN 2
6. DRAIN 2
7. DRAIN 1
8. DRAIN 1
STYLE 3:
PIN 1. ANODE
2. ANODE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
7. CATHODE
8. CATHODE
STYLE 4:
PIN 1. COLLECTOR
2. COLLECTOR
3. COLLECTOR
4. BASE
5. EMITTER
6. COLLECTOR
7. COLLECTOR
8. COLLECTOR
MILLIMETERS
NOM
MAX
1.05
1.10
0.30
0.35
0.15
0.20
3.05
3.10
1.65
1.70
0.65 BSC
0.55 BSC
0.28
0.35
0.42
1.80
1.90
2.00
5° NOM
MIN
1.00
0.25
0.10
2.95
1.55
INCHES
NOM
0.041
0.012
0.006
0.120
0.065
0.025 BSC
0.022 BSC
0.014
0.011
0.071
0.075
5° NOM
MIN
0.039
0.010
0.004
0.116
0.061
MAX
0.043
0.014
0.008
0.122
0.067
0.017
0.079
STYLE 6:
STYLE 5:
PIN 1. ANODE
PIN 1. ANODE
2. DRAIN
2. ANODE
3. DRAIN
3. DRAIN
4. DRAIN
4. GATE
5. SOURCE
5. SOURCE
6. DRAIN
6. GATE
7. CATHODE
7. DRAIN
8. CATHODE
8. CATHODE / DRAIN
GENERIC
MARKING DIAGRAM*
SOLDERING FOOTPRINT
1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MOLD GATE BURRS SHALL NOT EXCEED 0.13 MM PER SIDE.
4. LEADFRAME TO MOLDED BODY OFFSET IN HORIZONTAL
AND VERTICAL SHALL NOT EXCEED 0.08 MM.
5. DIMENSIONS A AND B EXCLUSIVE OF MOLD GATE BURRS.
6. NO MOLD FLASH ALLOWED ON THE TOP AND BOTTOM LEAD
SURFACE.
2.032
0.08
xxx MG
G
2.362
0.093
0.65
0.025
PITCH
xxx
= Specific Device Code
M
= Month Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
8X
8X
0.66
0.026
0.457
0.018
mm Ǔ
ǒinches
Basic Style
OPTIONAL SOLDERING FOOTPRINTS ON PAGE 2
DOCUMENT NUMBER:
DESCRIPTION:
98AON03078D
ChipFET
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
ChipFETt
CASE 1206A−03
ISSUE K
DATE 19 MAY 2009
ADDITIONAL SOLDERING FOOTPRINTS*
1
2.032
0.08
2.032
0.08
1
4X
0.457
0.018
2X
1.092
0.043
1.727
0.068
2.362
0.093
2.362
0.093
0.65
0.025
PITCH
4X
2X
2X
0.457
0.018
0.66
0.026
mm Ǔ
ǒinches
Styles 1 and 4
2.032
0.08
1.118
0.044
mm Ǔ
ǒinches
Style 2
2.032
0.08
2X
0.66
0.026
1
2X
0.66
0.026
1
1.092
0.043
2X
0.66
0.026
1.092
0.043
2.362
0.093
2.362
0.093
0.65
0.025
PITCH
2X
0.65
0.025
PITCH
1.118
0.044
0.457
0.018
1.118
0.044
ǒ
mm
inches
2X
Ǔ
0.457
0.018
mm Ǔ
ǒinches
Style 5
Style 3
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON03078D
ChipFET
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 2 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
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