NTJD1155L
MOSFET – Power,
P-Channel, High Side Load
Switch with Level-Shift,
SC-88
8 V, +1.3 A
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The NTJD1155L integrates a P and N−Channel MOSFET in a single
package. This device is particularly suited for portable electronic
equipment where low control signals, low battery voltages and high
load currents are needed. The P−Channel device is specifically
designed as a load switch using ON Semiconductor state−of−the−art
trench technology. The N−Channel, with an external resistor (R1),
functions as a level−shift to drive the P−Channel. The N−Channel
MOSFET has internal ESD protection and can be driven by logic
signals as low as 1.5 V. The NTJD1155L operates on supply lines from
1.8 to 8.0 V and can drive loads up to 1.3 A with 8.0 V applied to both
VIN and VON/OFF.
V(BR)DSS
RDS(on) TYP
ID MAX
130 mW @ −4.5 V
8.0 V
±1.3 A
170 mW @ −2.5 V
260 mW @ −1.8 V
SIMPLIFIED SCHEMATIC
4
2,3
Q2
6
Features
•
•
•
•
•
•
Extremely Low RDS(on) P−Channel Load Switch MOSFET
Level Shift MOSFET is ESD Protected
Low Profile, Small Footprint Package
VIN Range 1.8 to 8.0 V
ON/OFF Range 1.5 to 8.0 V
These Devices are Pb−Free and are RoHS Compliant
1
Rating
1
ON/OFF Voltage (VGS, N−Ch)
Continuous Load Current Steady
(Note 1)
State
TA = 25°C
Power Dissipation
(Note 1)
TA = 25°C
Steady
State
Pulsed Load Current
Symbol
Value
Unit
VIN
8.0
V
VON/OFF
8.0
V
IL
±1.3
A
TA = 85°C
TA = 85°C
PIN ASSIGNMENT
0.20
±3.9
A
TJ,
TSTG
−55 to
150
°C
Source Current (Body Diode)
IS
−0.4
A
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
TL
260
°C
Operating Junction and Storage Temperature
Characteristic
Symbol
Max
Unit
Junction−to−Ambient – Steady State (Note 1)
RqJA
320
°C/W
Junction−to−Foot – Steady State (Note 1)
RqJF
220
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
May, 2019 − Rev. 6
1
S1
G1
5
S2
4
2 3
D2 D2
ORDERING INFORMATION
THERMAL CHARACTERISTICS
© Semiconductor Components Industries, LLC, 2012
D1/G2
6
W
0.40
ILM
tp = 10 ms
TB M G
G
TB = Device Code
M
= Date Code
1
G
= Pb−Free Package
(Note: Microdot may be in either location)
±0.9
PD
MARKING
DIAGRAM
SC−88
(SOT−363)
CASE 419B
STYLE 30
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Input Voltage (VDSS, P−Ch)
Q1
5
1
Device
NTJD1155LT1G,
NTJD1155LT2G
Package
Shipping†
SC−88
(Pb−Free)
3000/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Publication Order Number:
NTJD1155L/D
NTJD1155L
1. Surface−mounted on FR4 board using 1 inch sq pad size
(Cu area = 1.127 in sq [1 oz] including traces).
www.onsemi.com
2
NTJD1155L
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Characteristic
Symbol
Test Condition
Min
Q2 Drain−to−Source Breakdown Voltage
VIN
VGS2 = 0 V, ID2 = 250 mA
−8.0
Forward Leakage Current
IFL
Typ
Max
Unit
OFF CHARACTERISTICS
VGS1 = 0 V,
VDS2 = −8.0 V
V
TJ = 25°C
1.0
TJ = 125°C
10
Q1 Gate−to−Source Leakage Current
IGSS
VDS1 = 0 V, VGS1 = ±8.0 V
Q1 Diode Forward On−Voltage
VSD
IS = −0.4 A, VGS1 = 0 V
mA
±100
nA
−1.1
V
1.5
8.0
V
−0.8
ON CHARACTERISTICS
ON/OFF Voltage
VON/OFF
Q1 Gate Threshold Voltage
VGS1(th)
VGS1 = VDS1, ID = 250 mA
0.4
1.0
V
VIN
VGS1 = VDS1, ID = 250 mA
1.8
8.0
V
mW
Input Voltage
Q2 Drain−to−Source On Resistance
RDS(on)
Load Current
VON/OFF = 1.5 V
IL
175
VIN = 2.5 V
IL = 1.0 A
170
220
VIN = 1.8 V
IL = 0.7 A
260
320
1.0
VDROP ≤ 0.3 V, VIN = 2.5 V,
VON/OFF = 1.5 V
1.0
2,3
Q2
R1
A
VOUT
C1
6
ON/OFF
130
VDROP ≤ 0.2 V, VIN = 5.0 V,
VON/OFF = 1.5 V
4
VIN
VIN = 4.5 V
IL = 1.2 A
6
5
CO
LOAD
Q1
1
CI
R2
R2
GND
Figure 1. Load Switch Application
Components
Description
Values
R1
Pullup Resistor
Typical 10 kW to 1.0 MW*
R2
Optional Slew−Rate Control
Typical 0 to 100 kW*
Output Capacitance
Usually < 1.0 mF
Optional In−Rush Current Control
Typical ≤ 1000 pF
CO, CI
C1
*Minimum R1 value should be at least 10 x R2 to ensure Q1 turn−on.
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3
NTJD1155L
0.70
0.65
0.60
0.55
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
0
0.50
0.45
0.40
0.35
TJ = 125°C
VDROP (V)
VDROP (V)
TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
TJ = 25°C
TJ = 125°C
0.30
0.25
0.20
TJ = 25°C
0.15
0.10
0.05
0.5
1.0
1.5
2.5
2.0
0
0
3.0
1.0
0.5
1.5
IL (AMPS)
0.8
IL = 1 A
VON/OFF = 1.5 to 8 V
0.6
0.5
0.4
0.3
0.2
TJ = 125°C
0.1
TJ = 25°C
0.0
1.0
2.0
3.0
4.0
5.0
VIN (VOLTS)
6.0
7.0
8.0
0.31
IL = 1 A
VON/OFF = 1.5 to 8 V
0.26
0.16
0.11
Vin = 5 V
0.06
0.01
−50
0
25
50
75
100
125
TJ, JUNCTION TEMPERATURE (°C)
150
44
IL = 1 A
VON/OFF = 1.5 to 8 V
IL = 1 A
VON/OFF = 1.5 V
Ci = 10 mF
Co = 1 mF
40
36
32
1.3
Vin = 5 V
1.1
Vin = 1.8 V
tr
28
24
td(off)
20
16
tf
12
0.9
0.7
−50
−25
Figure 5. On−Resistance Variation with
Temperature
TIME (ms)
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
1.5
Vin = 1.8 V
0.21
Figure 4. On−Resistance vs. Input Voltage
1.7
3.0
Figure 3. Vdrop vs. IL @ Vin = 4.5 V
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
Figure 2. Vdrop vs. IL @ Vin = 2.5 V
0.7
2.5
2.0
IL (AMPS)
8
−25
0
25
50
75
100
125
150
4
0
td(on)
0
TJ, JUNCTION TEMPERATURE (°C)
1
2
3
4
5
6
R2 (kW)
Figure 6. Normalized On−Resistance Variation
with Temperature
Figure 7. Switching Variation
R2 @ Vin = 4.5 V, R1 = 20 kW
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4
7
8
NTJD1155L
TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
40
22
20
18
32
28
tf
14
12
10
IL = 1 A
Von/off = 3 V
Ci = 10 mF
Co = 1 mF
8
6
4
2
0
20
16
12
tr
1
2
4
3
5
6
td(on)
tf
8
4
td(on)
0
tr
24
TIME (ms)
TIME (ms)
16
IL = 1 A
VON/OFF = 1.5 V
Ci = 10 mF
Co = 1 mF
36
td(off)
0
8
7
td(off)
1
0
2
3
4
5
6
8
7
R2 (kW)
R2 (kW)
Figure 8. Switching Variation
R2 @ Vin = 4.5 V, R1 = 20 kW
Figure 9. Switching Variation
R2 @ Vin = 2.5 V, R1 = 20 kW
12
tf
10
TIME (ms)
8
td(off)
IL = 1 A
Von/off = 3 V
Ci = 10 mF
Co = 1 mF
6
4
tr
2
0
td(on)
0
1
2
3
5
4
7
6
8
r(t), EFFECTIVE TRANSIENT THERMAL RESPONSE
R2 (kW)
Figure 10. Switching Variation
R2 @ Vin = 2.5 V, R1 = 20 kW
10
Normalized to RqJA at Steady State ( 1 inch pad)
1
D = 0.5
0.2
P(pk)
0.1
0.1
0.01
SINGLE PULSE
0.01
0.001
0.02
0.05
t1
t2
DUTY CYCLE, D = t1/t2
0.01
0.1
1
10
SQUARE WAVE PULSE DURATION TIME t, (s)
Figure 11. FET Thermal Response
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5
RqJC(t) = r(t) RqJC
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) − TC = P(pk) RqJC(t)
100
1000
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE Y
1
SCALE 2:1
DATE 11 DEC 2012
2X
aaa H D
D
H
A
D
6
5
GAGE
PLANE
4
1
2
L
L2
E1
E
DETAIL A
3
aaa C
2X
bbb H D
2X 3 TIPS
e
B
6X
b
ddd
TOP VIEW
C A-B D
M
A2
DETAIL A
A
6X
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.
4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF
THE PLASTIC BODY AND DATUM H.
5. DATUMS A AND B ARE DETERMINED AT DATUM H.
6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE
LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP.
7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN
EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDITION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OF THE FOOT.
ccc C
A1
SIDE VIEW
C
SEATING
PLANE
END VIEW
c
RECOMMENDED
SOLDERING FOOTPRINT*
6X
DIM
A
A1
A2
b
C
D
E
E1
e
L
L2
aaa
bbb
ccc
ddd
MILLIMETERS
MIN
NOM MAX
−−−
−−−
1.10
0.00
−−−
0.10
0.70
0.90
1.00
0.15
0.20
0.25
0.08
0.15
0.22
1.80
2.00
2.20
2.00
2.10
2.20
1.15
1.25
1.35
0.65 BSC
0.26
0.36
0.46
0.15 BSC
0.15
0.30
0.10
0.10
GENERIC
MARKING DIAGRAM*
6
XXXMG
G
6X
0.30
INCHES
NOM MAX
−−− 0.043
−−− 0.004
0.035 0.039
0.008 0.010
0.006 0.009
0.078 0.086
0.082 0.086
0.049 0.053
0.026 BSC
0.010 0.014 0.018
0.006 BSC
0.006
0.012
0.004
0.004
MIN
−−−
0.000
0.027
0.006
0.003
0.070
0.078
0.045
0.66
1
2.50
0.65
PITCH
XXX = Specific Device Code
M
= Date Code*
G
= Pb−Free Package
(Note: Microdot may be in either location)
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
*Date Code orientation and/or position may
vary depending upon manufacturing location.
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
STYLES ON PAGE 2
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42985B
SC−88/SC70−6/SOT−363
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE Y
DATE 11 DEC 2012
STYLE 1:
PIN 1. EMITTER 2
2. BASE 2
3. COLLECTOR 1
4. EMITTER 1
5. BASE 1
6. COLLECTOR 2
STYLE 2:
CANCELLED
STYLE 3:
CANCELLED
STYLE 4:
PIN 1. CATHODE
2. CATHODE
3. COLLECTOR
4. EMITTER
5. BASE
6. ANODE
STYLE 5:
PIN 1. ANODE
2. ANODE
3. COLLECTOR
4. EMITTER
5. BASE
6. CATHODE
STYLE 6:
PIN 1. ANODE 2
2. N/C
3. CATHODE 1
4. ANODE 1
5. N/C
6. CATHODE 2
STYLE 7:
PIN 1. SOURCE 2
2. DRAIN 2
3. GATE 1
4. SOURCE 1
5. DRAIN 1
6. GATE 2
STYLE 8:
CANCELLED
STYLE 9:
PIN 1. EMITTER 2
2. EMITTER 1
3. COLLECTOR 1
4. BASE 1
5. BASE 2
6. COLLECTOR 2
STYLE 10:
PIN 1. SOURCE 2
2. SOURCE 1
3. GATE 1
4. DRAIN 1
5. DRAIN 2
6. GATE 2
STYLE 11:
PIN 1. CATHODE 2
2. CATHODE 2
3. ANODE 1
4. CATHODE 1
5. CATHODE 1
6. ANODE 2
STYLE 12:
PIN 1. ANODE 2
2. ANODE 2
3. CATHODE 1
4. ANODE 1
5. ANODE 1
6. CATHODE 2
STYLE 13:
PIN 1. ANODE
2. N/C
3. COLLECTOR
4. EMITTER
5. BASE
6. CATHODE
STYLE 14:
PIN 1. VREF
2. GND
3. GND
4. IOUT
5. VEN
6. VCC
STYLE 15:
PIN 1. ANODE 1
2. ANODE 2
3. ANODE 3
4. CATHODE 3
5. CATHODE 2
6. CATHODE 1
STYLE 16:
PIN 1. BASE 1
2. EMITTER 2
3. COLLECTOR 2
4. BASE 2
5. EMITTER 1
6. COLLECTOR 1
STYLE 17:
PIN 1. BASE 1
2. EMITTER 1
3. COLLECTOR 2
4. BASE 2
5. EMITTER 2
6. COLLECTOR 1
STYLE 18:
PIN 1. VIN1
2. VCC
3. VOUT2
4. VIN2
5. GND
6. VOUT1
STYLE 19:
PIN 1. I OUT
2. GND
3. GND
4. V CC
5. V EN
6. V REF
STYLE 20:
PIN 1. COLLECTOR
2. COLLECTOR
3. BASE
4. EMITTER
5. COLLECTOR
6. COLLECTOR
STYLE 21:
PIN 1. ANODE 1
2. N/C
3. ANODE 2
4. CATHODE 2
5. N/C
6. CATHODE 1
STYLE 22:
PIN 1. D1 (i)
2. GND
3. D2 (i)
4. D2 (c)
5. VBUS
6. D1 (c)
STYLE 23:
PIN 1. Vn
2. CH1
3. Vp
4. N/C
5. CH2
6. N/C
STYLE 24:
PIN 1. CATHODE
2. ANODE
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
STYLE 25:
PIN 1. BASE 1
2. CATHODE
3. COLLECTOR 2
4. BASE 2
5. EMITTER
6. COLLECTOR 1
STYLE 26:
PIN 1. SOURCE 1
2. GATE 1
3. DRAIN 2
4. SOURCE 2
5. GATE 2
6. DRAIN 1
STYLE 27:
PIN 1. BASE 2
2. BASE 1
3. COLLECTOR 1
4. EMITTER 1
5. EMITTER 2
6. COLLECTOR 2
STYLE 28:
PIN 1. DRAIN
2. DRAIN
3. GATE
4. SOURCE
5. DRAIN
6. DRAIN
STYLE 29:
PIN 1. ANODE
2. ANODE
3. COLLECTOR
4. EMITTER
5. BASE/ANODE
6. CATHODE
STYLE 30:
PIN 1. SOURCE 1
2. DRAIN 2
3. DRAIN 2
4. SOURCE 2
5. GATE 1
6. DRAIN 1
Note: Please refer to datasheet for
style callout. If style type is not called
out in the datasheet refer to the device
datasheet pinout or pin assignment.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42985B
SC−88/SC70−6/SOT−363
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 2 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
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