NTMFS4833N

NTMFS4833N Power MOSFET 30 V, 191 A, Single N−Channel, SO−8 FL Features • • • • Low RDS(on) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses Optimized Gate Charge to Minimize Switching Losses These are Pb−Free Devices* V(BR)DSS 30 V http://onsemi.com Applications • CPU Power Delivery • DC−DC Converters • Low Side Switching MAXIMUM RATINGS (TJ = 25°C unless otherwise stated) Parameter Drain−to−Source Voltage Gate−to−Source Voltage Continuous Drain Current RqJA (Note 1) Power Dissipation RqJA (Note 1) Continuous Drain Current RqJA (Note 2) Power Dissipation RqJA (Note 2) Continuous Drain Current RqJC (Note 1) Power Dissipation RqJC (Note 1) Pulsed Drain Current TA = 25°C TA = 85°C TA = 25°C TA = 25°C Steady State TA = 85°C TA = 25°C TC = 25°C TC = 85°C TC = 25°C TA = 25°C, tp = 10 ms PD IDM TJ, TSTG IS dV/dt EAS PD ID PD ID Symbol VDSS VGS ID Value 30 ±20 26 19 2.35 16 12 0.91 191 138 125 288 −55 to +150 104 6 612.5 W A °C A V/ns mJ W A W A Unit V V A RDS(ON) MAX 2.0 mW @ 10 V 3.0 mW @ 4.5 V D (5,6) ID MAX 191 A G (4) S (1,2,3) N−CHANNEL MOSFET MARKING DIAGRAM D 1 SO−8 FLAT LEAD CASE 488AA STYLE 1 S S S G D 4833N AYWWG G D D Operating Junction and Storage Temperature Source Current (Body Diode) Drain to Source dV/dt Single Pulse Drain−to−Source Avalanche Energy (TJ = 25°C, VDD = 30 V, VGS = 10 V, IL = 35 Apk, L = 1.0 mH, RG = 25 W) Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) A = Assembly Location Y = Year WW = Work Week G = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION TL 260 °C Device NTMFS4833NT1G Package Shipping† Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu. 2. Surface−mounted on FR4 board using the minimum recommended pad size. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. SO−8 FL 1500/Tape & Reel (Pb−Free) SO−8 FL 5000/Tape & Reel (Pb−Free) NTMFS4833NT3G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2006 1 November, 2006 − Rev. 2 Publication Order Number: NTMFS4833N/D NTMFS4833N THERMAL RESISTANCE MAXIMUM RATINGS Parameter Junction−to−Case (Drain) Junction−to−Ambient – Steady State (Note 3) Junction−to−Ambient – Steady State (Note 4) Symbol RqJC RqJA RqJA Value 1.0 53.2 137.8 °C/W Unit 3. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu. 4. Surface−mounted on FR4 board using the minimum recommended pad size. ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage Drain−to−Source Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current V(BR)DSS V(BR)DSS/ TJ IDSS VGS = 0 V, VDS = 24 V TJ = 25 °C TJ = 125°C VGS = 0 V, ID = 250 mA 30 17 1 10 ±100 V mV/°C mA nA Symbol Test Condition Min Typ Max Unit Gate−to−Source Leakage Current ON CHARACTERISTICS (Note 5) Gate Threshold Voltage Negative Threshold Temperature Coefficient Drain−to−Source On Resistance IGSS VDS = 0 V, VGS = ±20 V VGS(TH) VGS(TH)/TJ RDS(on) VGS = VDS, ID = 250 mA 1.5 7.12 2.5 V mV/°C VGS = 10 V to 11.5 V VGS = 4.5 V ID = 30 A ID = 15 A ID = 30 A ID = 15 A 1.3 1.3 2.3 2.3 30 2.0 mW 3.0 Forward Transconductance gFS VDS = 15 V, ID = 15 A S CHARGES, CAPACITANCES & GATE RESISTANCE Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Threshold Gate Charge Gate−to−Source Charge Gate−to−Drain Charge Total Gate Charge SWITCHING CHARACTERISTICS (Note 6) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(ON) tr td(OFF) tf td(ON) tr td(OFF) tf VGS = 11.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 W VGS = 4.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 W 25 34 35 17 14 19 50 10 ns ns CISS COSS CRSS QG(TOT) QG(TH) QGS QGD QG(TOT) VGS = 11.5 V, VDS = 15 V; ID = 30 A VGS = 4.5 V, VDS = 15 V; ID = 30 A VGS = 0 V, f = 1 MHz, VDS = 12 V 5600 1200 650 39 6.0 16 17 88 nC nC 58 pF 5. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 6. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 NTMFS4833N ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD VGS = 0 V, IS = 30 A TJ = 25°C TJ = 125°C − − − VGS = 0 V, dIS/dt = 100 A/ms, IS = 30 A − − − 0.8 0.68 38 19 19 36 1.0 − − − − − nC ns V Symbol Test Condition Min Typ Max Unit Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge PACKAGE PARASITIC VALUES Source Inductance Drain Inductance Gate Inductance Gate Resistance tRR ta tb QRR LS LD LG RG TA = 25°C − − − − 0.50 0.005 1.84 1.0 − − − − nH nH nH W 5. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 6. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 3 NTMFS4833N TYPICAL PERFORMANCE CURVES 200 ID, DRAIN CURRENT (AMPS) 175 150 125 100 75 50 25 0 0 1 2 3 4 3.4 V 3.2 V 3.0 V 2.8 V 5 200 ID, DRAIN CURRENT (AMPS) VGS = 4.0 V TJ = 25°C 3.8 V 3.6 V VDS ≥ 10 V 175 150 125 100 75 50 25 0 0 1 2 3 4 5 VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) TJ = 25°C TJ = −55°C TJ = 125°C 4.2 V thru 10 V Figure 1. On−Region Characteristics RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) Figure 2. Transfer Characteristics 0.010 ID = 30 A TJ = 25°C 0.004 TJ = 25°C 0.008 0.003 VGS = 4.5 V 0.002 VGS = 11.5 V 0.001 0.006 0.004 0.002 0 2 4 6 8 10 12 VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) 0 25 50 75 100 125 150 175 200 ID, DRAIN CURRENT (AMPS) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) Figure 3. On−Resistance vs. Gate−to−Source Voltage 1.75 1.5 1.25 1.0 0.75 0.5 0.25 0 −50 100 −25 0 25 50 75 100 125 150 ID = 30 A VGS = 10 V IDSS, LEAKAGE (nA) 10,000 100,000 Figure 4. On−Resistance vs. Drain Current and Gate Voltage VGS = 0 V TJ = 150°C TJ = 125°C 1,000 0 5 10 15 20 25 30 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 4 NTMFS4833N TYPICAL PERFORMANCE CURVES 8000 7000 C, CAPACITANCE (pF) 6000 5000 4000 Crss 3000 2000 1000 0 −10 VDS = 0 V −5 VGS 0 VDS VGS = 0 V 5 10 15 20 25 Coss Ciss 12 10 8 6 4 2 0 0 10 50 20 30 60 70 40 QG, TOTAL GATE CHARGE (nC) 80 90 Q1 Q2 VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) TJ = 25°C QT VGS Ciss ID = 30 A TJ = 25°C GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 7. Capacitance Variation 1000 td(off) IS, SOURCE CURRENT (AMPS) VDD = 15 V ID = 15 A VGS = 11.5 V t, TIME (ns) Figure 8. Gate−To−Source and Drain−To−Source Voltage vs. Total Charge 30 VGS = 0 V 25 TJ = 25°C 20 15 10 5 0 tf 100 tr td(on) 10 1 10 RG, GATE RESISTANCE (W) 100 0 0.2 0.4 0.6 0.8 1.0 VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS) Figure 9. Resistive Switching Time Variation vs. Gate Resistance EAS, SINGLE PULSE DRAIN−TO−SOURCE AVALANCHE ENERGY (mJ) 1000 I D, DRAIN CURRENT (AMPS) 10 ms 100 100 ms 1 ms 10 ms dc 650 600 550 500 450 400 350 300 250 200 150 100 50 0 Figure 10. Diode Forward Voltage vs. Current ID = 35 A 10 VGS = 20 V SINGLE PULSE TC = 25°C RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.1 1 0.1 0.01 10 1 VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) 100 25 50 75 100 125 150 TJ, STARTING JUNCTION TEMPERATURE (°C) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature http://onsemi.com 5 NTMFS4833N TYPICAL PERFORMANCE CURVES 1000 I D, DRAIN CURRENT (AMPS) 100 25°C 10 100°C 125°C 1 1 10 1,000 100 PULSE WIDTH (ms) 10,000 Figure 13. Avalanche Characteristics http://onsemi.com 6 NTMFS4833N PACKAGE DIMENSIONS SO−8 FLAT LEAD (DFN6) CASE 488AA−01 ISSUE B 2X 0.20 C D 2 D1 6 5 A B 2X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS. 0.20 C 4X E1 2 E c 1 2 3 4 q A1 TOP VIEW 3X C SEATING PLANE 0.10 C A 0.10 C SIDE VIEW 8X e DETAIL A DIM A A1 b c D D1 D2 E E1 E2 e G K L L1 M q MILLIMETERS MIN NOM MAX 0.90 0.99 1.20 0.00 −−− 0.05 0.33 0.41 0.51 0.23 0.28 0.33 5.15 BSC 4.50 4.90 5.10 3.50 −−− 4.22 6.15 BSC 5.50 5.80 6.10 3.45 −−− 4.30 1.27 BSC 0.51 0.61 0.71 0.51 −−− −−− 0.51 0.61 0.71 0.05 0.17 0.20 3.00 3.40 3.80 0_ −−− 12 _ DETAIL A b e/2 1 4 STYLE 1: PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN 6. DRAIN 0.10 0.05 CAB c L K E2 L1 6 5 M G D2 BOTTOM VIEW ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). 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