NTMFS4833N
Power MOSFET
30 V, 191 A, Single N-Channel, SO-8 FL
Features
•Low RDS(on) to Minimize Conduction Losses
•Low Capacitance to Minimize Driver Losses
•Optimized Gate Charge to Minimize Switching Losses
•These are Pb-Free Devices*
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Applications
•CPU Power Delivery
•DC-DC Converters
•Low Side Switching
V(BR)DSS
RDS(ON) MAX
ID MAX
2.0 mW @ 10 V
30 V
191 A
3.0 mW @ 4.5 V
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Symbol
Value
Unit
Drain-to-Source Voltage
VDSS
30
V
Gate-to-Source Voltage
VGS
±20
V
ID
26
A
Parameter
Continuous Drain
Current RqJA
(Note 1)
TA = 25°C
Power Dissipation
RqJA (Note 1)
TA = 25°C
PD
2.35
W
Continuous Drain
Current RqJA
(Note 2)
TA = 25°C
ID
16
A
Power Dissipation
RqJA (Note 2)
TA = 85°C
Steady
State
19
TA = 85°C
TA = 25°C
S (1,2,3)
12
PD
0.91
MARKING
DIAGRAM
W
D
TC = 25°C
Power Dissipation
RqJC (Note 1)
TC = 25°C
ID
TC = 85°C
138
125
W
IDM
288
A
TJ, TSTG
-55 to
+150
°C
IS
104
A
Drain to Source dV/dt
dV/dt
6
V/ns
Single Pulse Drain-to-Source Avalanche
Energy (TJ = 25°C, VDD = 30 V, VGS = 10 V,
IL = 35 Apk, L = 1.0 mH, RG = 25 W)
EAS
612.5
mJ
TA = 25°C,
tp = 10 ms
Operating Junction and Storage
Temperature
Source Current (Body Diode)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
SO-8 FLAT LEAD
CASE 488AA
STYLE 1
D
4833N
AYWWG
G
D
D
A
= Assembly Location
Y
= Year
WW
= Work Week
G
= Pb-Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
TL
°C
260
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface-mounted on FR4 board using 1 sq-in pad, 1 oz Cu.
2. Surface-mounted on FR4 board using the minimum recommended pad size.
*For additional information on our Pb-Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2007
S
S
S
G
1
A
191
PD
July, 2007 - Rev. 3
G (4)
N-CHANNEL MOSFET
Continuous Drain
Current RqJC
(Note 1)
Pulsed Drain
Current
D (5,6)
1
Device
Package
Shipping†
NTMFS4833NT1G
SO-8 FL 1500/Tape & Reel
(Pb-Free)
NTMFS4833NT3G
SO-8 FL 5000/Tape & Reel
(Pb-Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Publication Order Number:
NTMFS4833N/D
NTMFS4833N
THERMAL RESISTANCE MAXIMUM RATINGS
Symbol
Value
Junction-to-Case (Drain)
Parameter
RqJC
1.0
Junction-to-Ambient – Steady State (Note 3)
RqJA
53.2
Junction-to-Ambient – Steady State (Note 4)
RqJA
137.8
Unit
°C/W
3. Surface-mounted on FR4 board using 1 sq-in pad, 1 oz Cu.
4. Surface-mounted on FR4 board using the minimum recommended pad size.
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Drain-to-Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
30
Drain-to-Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/
TJ
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate-to-Source Leakage Current
IDSS
V
17
VGS = 0 V,
VDS = 24 V
mV/°C
TJ = 25 °C
1
TJ = 125°C
10
IGSS
VDS = 0 V, VGS = ±20 V
VGS(TH)
VGS = VDS, ID = 250 mA
mA
±100
nA
2.5
V
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
Negative Threshold Temperature Coefficient
Drain-to-Source On Resistance
Forward Transconductance
VGS(TH)/TJ
RDS(on)
1.5
7.12
VGS = 10 V to
11.5 V
ID = 30 A
1.3
ID = 15 A
1.3
VGS = 4.5 V
ID = 30 A
2.3
ID = 15 A
2.3
gFS
VDS = 15 V, ID = 15 A
mV/°C
2.0
3.0
30
mW
S
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
5600
VGS = 0 V, f = 1 MHz, VDS = 12 V
1200
CRSS
650
Total Gate Charge
QG(TOT)
39
Threshold Gate Charge
QG(TH)
Gate-to-Source Charge
QGS
Gate-to-Drain Charge
QGD
Total Gate Charge
pF
58
6.0
VGS = 4.5 V, VDS = 15 V; ID = 30 A
16
nC
17
QG(TOT)
VGS = 11.5 V, VDS = 15 V;
ID = 30 A
88
nC
SWITCHING CHARACTERISTICS (Note 6)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
td(ON)
tr
td(OFF)
25
VGS = 4.5 V, VDS = 15 V, ID = 15 A,
RG = 3.0 W
34
35
tf
17
td(ON)
14
tr
td(OFF)
VGS = 11.5 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
tf
19
50
10
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
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2
ns
ns
NTMFS4833N
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Typ
Max
TJ = 25°C
-
0.8
1.0
TJ = 125°C
-
0.68
-
-
38
-
-
19
-
Unit
DRAIN-SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
Charge Time
Discharge Time
VSD
VGS = 0 V,
IS = 30 A
tRR
ta
ns
-
19
-
QRR
-
36
-
nC
Source Inductance
LS
-
0.50
-
nH
Drain Inductance
LD
-
0.005
-
nH
-
1.84
-
nH
-
1.0
-
W
Reverse Recovery Charge
tb
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 30 A
V
PACKAGE PARASITIC VALUES
Gate Inductance
LG
Gate Resistance
RG
TA = 25°C
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
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3
NTMFS4833N
TYPICAL PERFORMANCE CURVES
200
4.2 V thru 10 V
TJ = 25°C
3.8 V
150
125
3.6 V
100
3.4 V
75
50
3.2 V
25
3.0 V
2.8 V
175
150
125
100
TJ = 125°C
75
50
TJ = 25°C
25
TJ = -55°C
0
0
1
2
3
5
4
2
3
4
5
VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
0.010
ID = 30 A
TJ = 25°C
0.008
0.006
0.004
0.002
0
2
4
8
6
10
12
0.004
TJ = 25°C
0.003
VGS = 4.5 V
0.002
VGS = 11.5 V
0.001
0
25
50
100
75
125
150
175
200
VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)
ID, DRAIN CURRENT (AMPS)
Figure 3. On-Resistance vs. Gate-to-Source
Voltage
Figure 4. On-Resistance vs. Drain Current and
Gate Voltage
100,000
1.75
1.5
1
0
VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
ID = 30 A
VGS = 10 V
VGS = 0 V
IDSS, LEAKAGE (nA)
RDS(on), DRAIN-TO-SOURCE RESISTANCE (W)
ID, DRAIN CURRENT (AMPS)
175
0
RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED)
VDS ≥ 10 V
VGS = 4.0 V
RDS(on), DRAIN-TO-SOURCE RESISTANCE (W)
ID, DRAIN CURRENT (AMPS)
200
1.25
TJ = 150°C
10,000
1.0
0.75
0.5
TJ = 125°C
1,000
0.25
0
-50
100
-25
0
25
50
75
100
125
150
0
5
10
15
20
25
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
Figure 5. On-Resistance Variation with
Temperature
Figure 6. Drain-to-Source Leakage Current
vs. Voltage
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4
30
NTMFS4833N
TYPICAL PERFORMANCE CURVES
12
C, CAPACITANCE (pF)
TJ = 25°C
Ciss
7000
VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)
8000
VGS
10
6000
Ciss
5000
4000
Crss
3000
2000
Coss
1000
0
-10
VDS = 0 V
-5
VGS = 0 V
0
VGS
5
10
15
20
25
VDS
GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (VOLTS)
8
6
Q1
4
2
ID = 30 A
TJ = 25°C
0
0
IS, SOURCE CURRENT (AMPS)
VDD = 15 V
ID = 15 A
VGS = 11.5 V
td(off)
tf
100
tr
td(on)
20
30
40
50
60
70
QG, TOTAL GATE CHARGE (nC)
80
90
VGS = 0 V
25
TJ = 25°C
20
15
10
5
0
10
1
10
RG, GATE RESISTANCE (W)
100
0
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
100
100 ms
VGS = 20 V
SINGLE PULSE
TC = 25°C
0.1
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
0.01
0.1
1 ms
10 ms
dc
1
10
VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
100
EAS, SINGLE PULSE DRAIN-TO-SOURCE
AVALANCHE ENERGY (mJ)
10 ms
10
0.2
0.4
0.6
0.8
VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS)
1.0
Figure 10. Diode Forward Voltage vs. Current
1000
I D, DRAIN CURRENT (AMPS)
10
30
1000
1
Q2
Figure 8. Gate-To-Source and Drain-To-Source
Voltage vs. Total Charge
Figure 7. Capacitance Variation
t, TIME (ns)
QT
650
600
550
500
450
400
350
300
250
200
150
100
50
0
ID = 35 A
25
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
50
75
100
125
150
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
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5
NTMFS4833N
TYPICAL PERFORMANCE CURVES
I D, DRAIN CURRENT (AMPS)
1000
100
25°C
100°C
10
125°C
1
1
10
100
1,000
PULSE WIDTH (ms)
Figure 13. Avalanche Characteristics
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6
10,000
NTMFS4833N
PACKAGE DIMENSIONS
DFN6 5x6, 1.27P (SO8 FL)
CASE 488AA-01
ISSUE C
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
0.20 C
D
A
2
B
D1
6
2X
0.20 C
5
4X
E1
q
E
2
c
1
2
3
A1
4
TOP VIEW
0.10 C
3X
C
e
SEATING
PLANE
DETAIL A
A
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
q
MILLIMETERS
MIN
NOM
MAX
0.90
1.00
1.10
0.00
--0.05
0.33
0.41
0.51
0.23
0.28
0.33
5.15 BSC
4.50
4.90
5.10
3.50
--4.22
6.15 BSC
5.50
5.80
6.10
3.45
--4.30
1.27 BSC
0.51
0.61
0.71
0.51
----0.51
0.61
0.71
0.05
0.17
0.20
3.00
3.40
3.80
0_
--12 _
0.10 C
SOLDERING FOOTPRINT*
SIDE VIEW
8X
DETAIL A
b
0.10
C A B
0.05
c
3X
4X
1.270
0.750
4X
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
e/2
L
1
4
K
1.000
0.965
1.330
2X
0.905
2X
0.495
E2
L1
6
G
M
4.530
3.200
0.475
5
D2
2X
1.530
BOTTOM VIEW
4.560
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
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NTMFS4833N/D
