NTMFS4836N
Power MOSFET
30 V, 90 A, Single N−Channel, SO−8FL
Features
•
•
•
•
Low RDS(on) to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
Optimized Gate Charge to Minimize Switching Losses
These are Pb−Free Devices
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V(BR)DSS
Applications
•
•
•
•
RDS(ON) MAX
ID MAX
4.0 mW @ 10 V
Refer to Application Note AND8195/D
CPU Power Delivery
DC−DC Converters
Low Side Switching
30 V
90 A
6.0 mW @ 4.5 V
D (5,6)
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Symbol
Parameter
Value
Unit
G (4)
Drain−to−Source Voltage
VDSS
30
V
Gate−to−Source Voltage
VGS
±20
V
S (1,2,3)
ID
18
A
N−CHANNEL MOSFET
Continuous Drain
Current RqJA
(Note 1)
TA = 25°C
Power Dissipation
RqJA (Note 1)
TA = 25°C
PD
2.25
W
Continuous Drain
Current RqJA
(Note 2)
TA = 25°C
ID
11
A
Power Dissipation
RqJA (Note 2)
TA = 85°C
Steady
State
13
TA = 85°C
TA = 25°C
Continuous Drain
Current RqJC
(Note 1)
TC = 25°C
Power Dissipation
RqJC (Note 1)
TC = 25°C
8
PD
ID
TC = 85°C
0.89
W
65
55.6
W
IDM
180
A
TJ,
TSTG
−55 to
+150
°C
IS
46
A
Drain to Source DV/DT
dV/dt
6
V/ns
Single Pulse Drain−to−Source Avalanche
Energy (TJ = 25°C, VDD = 50 V, VGS = 10 V,
IL = 22 Apk, L = 1.0 mH, RG = 25 W)
EAS
242
mJ
TL
260
°C
TA = 25°C,
tp = 10 ms
Operating Junction and Storage
Temperature
Source Current (Body Diode)
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
© Semiconductor Components Industries, LLC, 2012
May, 2012 − Rev. 7
D
1
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
S
S
S
G
4836N
AYWZZ
D
D
D
A
90
PD
Pulsed Drain
Current
MARKING
DIAGRAM
1
A
Y
W
ZZ
= Assembly Location
= Year
= Work Week
= Lot Traceability
ORDERING INFORMATION
Device
Package
Shipping†
NTMFS4836NT1G
SO−8FL
(Pb−Free)
1500 /
Tape & Reel
NTMFS4836NT3G
SO−8FL
(Pb−Free)
5000 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Publication Order Number:
NTMFS4836N/D
NTMFS4836N
THERMAL RESISTANCE MAXIMUM RATINGS
Symbol
Value
Junction−to−Case (Drain)
Parameter
RqJC
2.25
Junction−to−Ambient – Steady State (Note 3)
RqJA
55.6
Junction−to−Ambient – Steady State (Note 4)
RqJA
140.8
Unit
°C/W
3. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
4. Surface−mounted on FR4 board using the minimum recommended pad size.
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
30
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/TJ
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate−to−Source Leakage Current
IDSS
V
25
VGS = 0 V,
VDS = 24 V
mV/°C
TJ = 25 °C
1
TJ = 125°C
10
IGSS
VDS = 0 V, VGS = ±20 V
VGS(TH)
VGS = VDS, ID = 250 mA
mA
±100
nA
2.5
V
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
Negative Threshold Temperature Coefficient
Drain−to−Source On Resistance
Forward Transconductance
VGS(TH)/TJ
RDS(on)
1.5
6.0
VGS = 10 V to
11.5 V
ID = 30 A
2.8
ID = 15 A
2.8
VGS = 4.5 V
ID = 30 A
4.8
ID = 15 A
4.8
gFS
VDS = 15 V, ID = 15 A
mV/°C
4.0
6.0
24
mW
S
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
2677
VGS = 0 V, f = 1 MHz, VDS = 12 V
565
307
Total Gate Charge
QG(TOT)
20
Threshold Gate Charge
QG(TH)
3.2
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
Total Gate Charge
pF
VGS = 4.5 V, VDS = 15 V;
ID = 30 A
8.0
28
nC
8.0
QG(TOT)
VGS = 11.5 V, VDS = 15 V;
ID = 30 A
45
nC
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
14
tr
VGS = 4.5 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
td(OFF)
30
20
tf
12
td(ON)
8.0
tr
td(OFF)
VGS = 11.5 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
tf
27
31
7.0
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
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2
ns
ns
NTMFS4836N
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Typ
Max
TJ = 25°C
0.83
1.2
TJ = 125°C
0.7
Unit
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
Charge Time
Discharge Time
Reverse Recovery Charge
VSD
VGS = 0 V,
IS = 30 A
tRR
V
27.1
ta
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 30 A
tb
13.8
ns
13.3
QRR
16
nC
Source Inductance
LS
0.65
nH
Drain Inductance
LD
0.005
nH
Gate Inductance
LG
1.84
nH
Gate Resistance
RG
1.2
W
PACKAGE PARASITIC VALUES
TA = 25°C
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3
NTMFS4836N
TYPICAL PERFORMANCE CURVES
110
120
4.0 V
3.8 V
90
80
3.6 V
70
60
3.4 V
50
40
3.2 V
30
20
3.0 V
10
0
2.8 V
1
2
3
4
5
6
7
8
9
70
60
50
40
30
TJ = 25°C
20
TJ = 125°C
0
10
0
TJ = −55°C
2
1
3
5
4
6
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
ID = 30 A
TJ = 25°C
0.025
0.020
0.015
0.010
0.005
2
4
6
8
10
12
0.008
TJ = 25°C
0.007
0.006
VGS = 4.5 V
0.005
0.004
0.003
VGS = 11.5 V
0.002
0.001
0
10
15
20
25
35
30
40
45
50
55
60
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
ID, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
100,000
1.80
1.60
80
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
0.030
0
90
10
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
0
VDS ≥ 10 V
100
ID, DRAIN CURRENT (AMPS)
TJ = 25°C
VGS = 4.5 to 5.0 V
100
ID = 30 A
VGS = 10 V & 4.5 V
VGS = 0 V
10,000
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
ID, DRAIN CURRENT (AMPS)
110
1.40
1.20
1.00
TJ = 150°C
1,000
TJ = 125°C
100
0.80
0.60
−50
10
−25
0
25
50
75
100
125
150
4
8
12
16
20
24
28
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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4
30
NTMFS4836N
TYPICAL PERFORMANCE CURVES
C, CAPACITANCE (pF)
TJ = 25°C
Ciss
3500
3000
Ciss
2500
Crss
1500
1000
Coss
500
0
15
10
5
0
5
VGS
VDS
10
15
25
20
30
16
14
8
VDS
tf
tr
1
td(on)
1
10
RG, GATE RESISTANCE (W)
2
0
ID = 30 A
TJ = 25°C
0
5
TJ = 25°C
20
15
10
5
0.4
I D, DRAIN CURRENT (AMPS)
1 ms
10 ms
dc
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
0.1
10
1
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
100
EAS, SINGLE PULSE DRAIN−TO−SOURCE
AVALANCHE ENERGY (mJ)
0.1
0.5
0.6
0.7
0.8
0.9
1.0
1.1
Figure 10. Diode Forward Voltage vs. Current
100 ms
1
0
45
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
10 ms
VGS = 20 V
SINGLE PULSE
TC = 25°C
40
2
VGS = 0 V
25
0
100
1000
10
15
35
10
20
25
30
QG, TOTAL GATE CHARGE (nC)
4
Figure 8. Gate−To−Source and Drain−To−Source
Voltage vs. Total Charge
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
100
6
30
td(off)
10
8
Qgd
Qgs
4
IS, SOURCE CURRENT (AMPS)
t, TIME (ns)
100
12
10
Figure 7. Capacitance Variation
VDS = 15 V
ID = 15 A
VGS = 11.5 V
VGS
6
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
1000
18
10
4000
2000
20
QT
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
4500
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
12
5000
260
240
220
200
180
160
140
120
100
80
60
40
20
0
ID = 22 A
25
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
50
75
100
125
150
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
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5
NTMFS4836N
TYPICAL PERFORMANCE CURVES
I D, DRAIN CURRENT (AMPS)
100
125°C
10
100°C
125°C
1
1
10
100
1000
PULSE WIDTH (ms)
Figure 13. Avalanche Characteristics
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6
10000
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE N
1
DATE 25 JUN 2018
SCALE 2:1
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
0.20 C
D
A
2
B
D1
2X
0.20 C
4X
E1
2
q
E
c
1
2
3
A1
4
TOP VIEW
C
DETAIL A
0.10 C
SEATING
PLANE
A
0.10 C
SIDE VIEW
MILLIMETERS
MIN
NOM
MAX
0.90
1.00
1.10
0.00
−−−
0.05
0.33
0.41
0.51
0.23
0.28
0.33
5.00
5.15
5.30
4.70
4.90
5.10
3.80
4.00
4.20
6.00
6.30
6.15
5.70
5.90
6.10
3.45
3.65
3.85
1.27 BSC
0.51
0.575
0.71
1.20
1.35
1.50
0.51
0.575
0.71
0.125 REF
3.00
3.40
3.80
0_
−−−
12 _
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
q
GENERIC
MARKING DIAGRAM*
DETAIL A
1
0.10
b
C A B
0.05
c
8X
XXXXXX
AYWZZ
e/2
e
L
1
4
K
RECOMMENDED
SOLDERING FOOTPRINT*
E2
PIN 5
(EXPOSED PAD)
L1
M
2X
0.495
4.560
2X
1.530
G
D2
2X
BOTTOM VIEW
XXXXXX = Specific Device Code
A
= Assembly Location
Y
= Year
W
= Work Week
ZZ
= Lot Traceability
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
0.475
3.200
4.530
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
1.330
STYLE 2:
2X
PIN 1. ANODE
0.905
2. ANODE
3. ANODE
4. NO CONNECT
0.965
5. CATHODE
1
4X
1.000
4X 0.750
1.270
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON14036D
DFN5 5x6, 1.27P (SO−8FL)
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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