NTMFS4837N
Power MOSFET
30 V, 74 A, Single N−Channel, SO−8FL
Features
•
•
•
•
Low RDS(on) to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
Optimized Gate Charge to Minimize Switching Losses
These are Pb−Free Devices
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Applications
•
•
•
•
V(BR)DSS
Refer to Application Note AND8195/D
CPU Power Delivery
DC−DC Converters
Low Side Switching
RDS(ON) MAX
30 V
D (5,6)
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
30
V
Gate−to−Source Voltage
VGS
±20
V
ID
16
A
Continuous Drain
Current RqJA
(Note 1)
TA = 25°C
Power Dissipation
RqJA (Note 1)
TA = 25°C
PD
2.2
W
Continuous Drain
Current RqJA
(Note 2)
TA = 25°C
ID
10
A
Power Dissipation
RqJA (Note 2)
TA = 85°C
Steady
State
Continuous Drain
Current RqJC
(Note 1)
TA = 25°C
TC = 25°C
S (1,2,3)
PD
ID
0.88
53
47.2
W
TA = 25°C
IDM
148
A
TJ,
TSTG
−55 to
+150
°C
IS
39
A
Drain to Source dV/dt
dV/dt
6
V/ns
Single Pulse Drain−to−Source Avalanche
Energy (VDD = 30 V, VGS = 10 V,
IL = 22 Apk, L = 1.0 mH, RG = 25 W)
EAS
242
mJ
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
TL
Operating Junction and Storage Temperature
Source Current (Body Diode)
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
© Semiconductor Components Industries, LLC, 2012
May, 2012 − Rev. 6
D
1
S
S
S
G
1
A
74
PD
tp=10ms
MARKING
DIAGRAM
W
TC = 25°C
Pulsed Drain
Current
N−CHANNEL MOSFET
7
TC = 85°C
Power Dissipation
RqJC (Note 1)
G (4)
11.5
TA = 85°C
74 A
7.5 mW @ 4.5 V
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter
ID MAX
5.0 mW @ 10 V
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
A
Y
W
ZZ
4837N
AYWZZ
D
D
D
= Assembly Location
= Year
= Work Week
= Lot Traceability
ORDERING INFORMATION
Device
Package
Shipping†
NTMFS4837NT1G
SO−8FL
(Pb−Free)
1500 /
Tape & Reel
NTMFS4837NT3G
SO−8FL
(Pb−Free)
5000 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Publication Order Number:
NTMFS4837N/D
NTMFS4837N
THERMAL RESISTANCE MAXIMUM RATINGS
Symbol
Value
Junction−to−Case (Drain)
Parameter
RqJC
2.65
Junction−to−Ambient – Steady State (Note 1)
RqJA
56.75
Junction−to−Ambient – Steady State (Note 2)
RqJA
142.2
Unit
°C/W
1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
30
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/
TJ
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate−to−Source Leakage Current
IDSS
V
25
VGS = 0 V,
VDS = 24 V
mV/°C
TJ = 25 °C
1
TJ = 125°C
10
IGSS
VDS = 0 V, VGS = ±20 V
VGS(TH)
VGS = VDS, ID = 250 mA
mA
±100
nA
2.5
V
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
Negative Threshold Temperature Coefficient
Drain−to−Source On Resistance
Forward Transconductance
VGS(TH)/TJ
RDS(on)
1.5
5.7
VGS = 10 V to
11.5 V
ID = 30 A
3.5
ID = 15 A
3.5
VGS = 4.5 V
ID = 30 A
5.9
ID = 15 A
5.9
gFS
VDS = 15 V, ID = 15 A
mV/°C
5.0
7.5
15
mW
S
CHARGES AND CAPACITANCES
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
239
Total Gate Charge
QG(TOT)
14.2
Threshold Gate Charge
QG(TH)
2.98
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
Total Gate Charge
2048
VGS = 0 V, f = 1 MHz, VDS = 12 V
VGS = 4.5 V, VDS = 15 V; ID = 30 A
444
5.7
pF
22
nC
6.7
QG(TOT)
VGS = 11.5 V, VDS = 15 V;
ID = 15 A
34.2
nC
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
14.2
tr
td(OFF)
VGS = 4.5 V, VDS = 15 V, ID = 15 A,
RG = 3.0 W
55
19
tf
10
td(ON)
8.5
tr
td(OFF)
VGS = 11.5 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
tf
25.6
25.2
9.2
3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
4. Switching characteristics are independent of operating junction temperatures.
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2
ns
ns
NTMFS4837N
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Typ
Max
TJ = 25°C
0.85
1.2
TJ = 125°C
0.72
Unit
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
VSD
Reverse Recovery Time
Charge Time
VGS = 0 V,
IS = 30 A
tRR
24
ta
Discharge Time
13
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 30 A
tb
Reverse Recovery Charge
V
ns
11
QRR
14
nC
Source Inductance
LS
0.93
nH
Drain Inductance
LD
Gate Inductance
LG
Gate Resistance
RG
PACKAGE PARASITIC VALUES
0.005
TA = 25°C
1.84
2.8
W
3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
4. Switching characteristics are independent of operating junction temperatures.
100
VGS = 10 V to 4.5 V
100
TJ = 25°C
80
4V
70
3.8 V
60
50
3.6 V
40
30
3.4 V
20
3.2 V
10
0
0
1
2
3
4
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
VDS ≥ 10 V
90
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
90
80
70
60
TJ = −55°C
50
40
TJ = 25°C
30
TJ = 125°C
20
10
0
5
1
2
T = 25°C
ID = 30 A
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
0.014
0.013
0.012
0.011
0.010
0.009
0.008
0.007
0.006
0.005
0.004
0.003
3.0
8
Figure 2. Transfer Characteristics
Figure 1. On−Region Characteristics
0.016
0.015
3
4
5
6
7
VGS, GATE−TO−SOURCE VOLTAGE (V)
0.01
TJ = 25°C
0.009
0.008
VGS = 4.5 V
0.007
0.006
0.005
VGS = 11.5 V
0.004
0.003
0.002
0.001
4.0
5.0
6.0
7.0
8.0
9.0
10
VGS, GATE−TO−SOURCE VOLTAGE (V)
11 11.5
0
10
Figure 3. On−Resistance vs. VGS
20
40
60
30
50
70
ID, DRAIN CURRENT (A)
80
90
Figure 4. On−Resistance vs. Drain Current &
Gate Voltage
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3
1.80
100000
ID = 30 A
VGS = 10 V & 4.5 V
1.60
VGS = 0 V
TJ = 150°C
10000
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
NTMFS4837N
1.40
1.20
1.00
1000
TJ = 125°C
100
10
1
0.80
0.60
−50
−25
0
25
50
75
100
0
150
125
TJ = 25°C
5
10
20
30
25
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. On−Resistance Variation with
Temperature
3000
15
Figure 6. Drain−to−Source Leakage Current vs.
Voltage
12
VGS, GATE−TO−SOURCE VOLTAGE (V)
TJ = 25°C
QT
C, CAPACITANCE (pF)
10
CISS
2000
1000
COSS
CRSS
0
10
5
0
5
10
15
20
8
6
Qgd
4
2
0
25
0
5
Figure 7. Capacitance Variation
IS, SOURCE CURRENT (A)
t, TIME (ns)
td(off)
tr
tf
td(on)
1
20
25
30
30
100
1
15
Figure 8. Gate−to−Source & Drain−to−Source
Voltage vs. Total Charge
VDD = 15 V
ID = 15 A
VGS = 11.5 V
10
10
QG, TOTAL GATE CHARGE (nC)
VGS
VDS
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
1000
VDD = 15.0 V
VGS = 11.5 V
ID = 30 A
TJ = 25°C
Qgs
10
VGS = 0 V
TJ = 25°C
25
20
15
10
5
0
0.50
100
RG, GATE RESISTANCE (W)
0.60
0.80
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 10. Diode Forward Voltage vs. Current
Figure 9. Resistive Switching Time Variation vs.
Gate Resistance
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4
35
ID, DRAIN CURRENT (A)
1000
EAS, SINGLE PULSE DRAIN−TO−
SOURCE AVALANCHE ENERGY (mJ)
NTMFS4837N
VGS = 20 V
Single Pulse
TC = 25°C
100
10 ms
100 ms
10
RDS(on) Limit
Thermal Limit
Package Limit
1
0.1
10 ms
dc
100 ms
1
10
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
100
250
ID = 22 A
225
200
175
150
125
100
75
50
25
0
25
50
75
Figure 11. Maximum Rated Forward−Biased
Safe Operating Range
25°C
100°C
ID (A)
125°C
10
1
125
Figure 12. Maximum Avalanche Energy vs,
Starting Junction Temperature
100
1
100
TJ, STARTING JUNCTION TEMPERATURE (°C)
10
100
PULSE WIDTH (ms)
Figure 13. EAS vs. Pulse Width
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5
1000
150
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE N
1
DATE 25 JUN 2018
SCALE 2:1
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
0.20 C
D
A
2
B
D1
2X
0.20 C
4X
E1
2
q
E
c
1
2
3
A1
4
TOP VIEW
C
DETAIL A
0.10 C
SEATING
PLANE
A
0.10 C
SIDE VIEW
MILLIMETERS
MIN
NOM
MAX
0.90
1.00
1.10
0.00
−−−
0.05
0.33
0.41
0.51
0.23
0.28
0.33
5.00
5.15
5.30
4.70
4.90
5.10
3.80
4.00
4.20
6.00
6.30
6.15
5.70
5.90
6.10
3.45
3.65
3.85
1.27 BSC
0.51
0.575
0.71
1.20
1.35
1.50
0.51
0.575
0.71
0.125 REF
3.00
3.40
3.80
0_
−−−
12 _
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
q
GENERIC
MARKING DIAGRAM*
DETAIL A
1
0.10
b
C A B
0.05
c
8X
XXXXXX
AYWZZ
e/2
e
L
1
4
K
RECOMMENDED
SOLDERING FOOTPRINT*
E2
PIN 5
(EXPOSED PAD)
L1
M
2X
0.495
4.560
2X
1.530
G
D2
2X
BOTTOM VIEW
XXXXXX = Specific Device Code
A
= Assembly Location
Y
= Year
W
= Work Week
ZZ
= Lot Traceability
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
0.475
3.200
4.530
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
1.330
STYLE 2:
2X
PIN 1. ANODE
0.905
2. ANODE
3. ANODE
4. NO CONNECT
0.965
5. CATHODE
1
4X
1.000
4X 0.750
1.270
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON14036D
DFN5 5x6, 1.27P (SO−8FL)
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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