NTMFS4845N
MOSFET – Power, Single,
N-Channel, SO-8FL
30 V, 115 A
Features
•
•
•
•
•
Low RDS(on) to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
Optimized Gate Charge to Minimize Switching Losses
Thermally Enhanced SO−8 Package
These are Pb−Free Devices
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V(BR)DSS
RDS(ON) MAX
2.9 mW @ 10 V
30 V
115 A
4.4 mW @ 4.5 V
Applications
•
•
•
•
ID MAX
Refer to Application Note AND8195/D
CPU Power Delivery
DC−DC Converters
Low Side Switching
D (5,6)
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter
Symbol
Value
Unit
G (4)
Drain−to−Source Voltage
VDSS
30
V
Gate−to−Source Voltage
VGS
±16
V
S (1,2,3)
ID
22
A
N−CHANNEL MOSFET
Continuous Drain
Current RqJA
(Note 1)
TA = 25°C
Power Dissipation
RqJA (Note 1)
TA = 25°C
PD
2.27
W
Continuous Drain
Current RqJA v
10 sec
TA = 25°C
ID
35.5
A
Power Dissipation
RqJA, t v 10 sec
Continuous Drain
Current RqJA
(Note 2)
TA = 85°C
15.8
TA = 85°C
Steady
State
25.6
PD
5.95
W
TA = 25°C
ID
13.7
A
9.9
Power Dissipation
RqJA (Note 2)
TA = 25°C
PD
0.89
W
Continuous Drain
Current RqJC
(Note 1)
TC = 25°C
ID
115
A
Power Dissipation
RqJC (Note 1)
TC = 25°C
PD
62.5
W
TA = 25°C
IDM
230
A
TA = 25°C
IDmaxpkg
100
A
TJ,
TSTG
−55 to
+150
°C
IS
62
A
dV/dt
6
V/ns
Pulsed Drain
Current
TC = 85°C
tp=10ms
Current limited by package
Operating Junction and Storage
Temperature
Source Current (Body Diode)
Drain to Source dV/dt
© Semiconductor Components Industries, LLC, 2012
May, 2019 − Rev. 3
D
1
TA = 25°C
TA = 85°C
MARKING
DIAGRAM
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
A
Y
W
ZZ
S
S
S
G
4845N
AYWZZ
D
D
D
= Assembly Location
= Year
= Work Week
= Lot Traceability
83
1
ORDERING INFORMATION
Device
Package
Shipping†
NTMFS4845NT1G
SO−8FL
(Pb−Free)
1500 /
Tape & Reel
NTMFS4845NT3G
SO−8FL
(Pb−Free)
5000 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Publication Order Number:
NTMFS4845N/D
NTMFS4845N
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter
Symbol
Value
Unit
Single Pulse Drain−to−Source Avalanche
Energy (VDD = 50 V, VGS = 10 V,
IL = 39 Apk, L = 0.3 mH, RG = 25 W)
EAS
228
mJ
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
TL
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
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2
NTMFS4845N
THERMAL RESISTANCE MAXIMUM RATINGS
Symbol
Value
Junction−to−Case (Drain)
Parameter
RqJC
2.0
Junction−to−Ambient – Steady State (Note 1)
RqJA
55.1
Junction−to−Ambient – Steady State (Note 2)
RqJA
140.1
Junction−to−Ambient − t v 10 sec
RqJA
21
Unit
°C/W
1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
30
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/
TJ
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate−to−Source Leakage Current
IDSS
V
25
VGS = 0 V,
VDS = 24 V
mV/°C
TJ = 25 °C
1
TJ = 125°C
10
IGSS
VDS = 0 V, VGS = ±16 V
VGS(TH)
VGS = VDS, ID = 250 mA
mA
±100
nA
2.5
V
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
Negative Threshold Temperature Coefficient
Drain−to−Source On Resistance
Forward Transconductance
VGS(TH)/TJ
RDS(on)
1.45
1.8
5.2
VGS = 10 V to
11.5 V
ID = 30 A
2.2
ID = 15 A
2.2
VGS = 4.5 V
ID = 30 A
3.4
ID = 15 A
3.4
gFS
VDS = 1.5 V, ID = 30 A
mV/°C
2.9
4.4
87
mW
S
CHARGES AND CAPACITANCES
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
335
Total Gate Charge
QG(TOT)
25.6
Threshold Gate Charge
QG(TH)
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
Total Gate Charge
3720
VGS = 0 V, f = 1 MHz, VDS = 12 V
VGS = 4.5 V, VDS = 15 V; ID = 30 A
650
3.2
9.4
pF
39
nC
8.6
QG(TOT)
VGS = 11.5 V, VDS = 15 V,
ID = 30 A
62
nC
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
20.5
tr
td(OFF)
VGS = 4.5 V, VDS = 15 V, ID = 15 A,
RG = 3.0 W
tf
48.4
28.9
12.2
3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
4. Switching characteristics are independent of operating junction temperatures.
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3
ns
NTMFS4845N
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
SWITCHING CHARACTERISTICS (Note 4)
td(ON)
Turn−On Delay Time
Rise Time
12.5
tr
Turn−Off Delay Time
td(OFF)
Fall Time
27.1
VGS = 11.5 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
ns
37.7
tf
9.7
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
VSD
Reverse Recovery Time
VGS = 0 V,
IS = 30 A
TJ = 25°C
0.8
TJ = 125°C
0.7
tRR
Charge Time
ta
Discharge Time
tb
Reverse Recovery Charge
1.0
V
20.8
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 30 A
12.6
ns
8.2
QRR
9.0
nC
Source Inductance
LS
0.65
nH
Drain Inductance
LD
Gate Inductance
LG
Gate Resistance
RG
PACKAGE PARASITIC VALUES
0.005
TA = 25°C
1.84
1.3
2.5
W
3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
4. Switching characteristics are independent of operating junction temperatures.
TYPICAL CHARACTERISTICS
ID, DRAIN CURRENT (A)
180
10 V
VGS = 4.2 V
160
TJ = 25°C
4.0 V
5.0 V
140
3.8 V
3.6 V
4.5 V
120
3.4 V
100
80
3.2 V
60
3.0 V
40
20
0
ID, DRAIN CURRENT (A)
200
2.8 V
2.6 V
0
1
2
3
4
5
6
150
140
130
120
110
100
90
80
70
60
50
40
30
20
10
0
VDS ≥ 10 V
TJ = 125°C
TJ = 25°C
TJ = −55°C
1
2
3
4
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
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4
NTMFS4845N
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
TYPICAL CHARACTERISTICS
0.016
ID = 30 A
TJ = 25°C
0.014
0.012
0.010
0.008
0.006
0.004
0.002
0
2
3
4
6
5
7
8
9
11
10
VGS, GATE−TO−SOURCE VOLTAGE (V)
0.006
TJ = 25°C
0.005
0.003
0.001
10
25
1.4
1.3
1.2
1.0
0.9
0.8
−25
0
25
50
75
100
125
100
150
2
VGS, GATE−TO−SOURCE VOLTAGE (V)
3000
2500
2000
Coss
Crss
4
8
12
16
20
24
6
12
TJ = 25°C
8
10
12
14
16
18
20
28
32
16
QT
14
10
0
4
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
3500
0
60
55
VDS
VGS
12
8
10
6
8
Qgs
4
Qgd
6
ID = 30 A
TJ = 25°C
2
0
0
5
Qg, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
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4
2
0
10 15 20 25 30 35 40 45 50 55 60 65
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
5
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Ciss
500
50
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
1000
45
TJ = 125°C
TJ, JUNCTION TEMPERATURE (°C)
1500
40
TJ = 150°C
0.7
4000
35
1000
1.1
4500
30
VGS = 0 V
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
20
ID, DRAIN CURRENT (A)
10,000
ID = 30 A
VGS = 10 V
0.6
−50
C, CAPACITANCE (pF)
15
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
1.7
1.5
VGS = 11.5 V
0.002
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
1.6
VGS = 4.5 V
0.004
NTMFS4845N
TYPICAL CHARACTERISTICS
30
VDS = 15 V
ID = 15 A
VGS = 11.5 V
IS, SOURCE CURRENT (A)
1000
tf
t, TIME (ns)
100
td(off)
tr
td(on)
10
1
1
10
5
0.4
0.5
0.6
0.7
0.8
0.9
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
EAS, SINGLE PULSE DRAIN−TO−
SOURCE AVALANCHE ENERGY (mJ)
ID, DRAIN CURRENT (A)
10
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
10 ms
100
100 ms
10
0.1
15
RG, GATE RESISTANCE (W)
1000
1 ms
VGS = 20 V
Single Pulse
TC = 25°C
RDS(on) Limit
Thermal Limit
Package Limit
1
20
0
100
VGS = 0 V
TJ = 25°C
25
0.1
10 ms
dc
1
10
100
240
220
200
180
ID = 39 A
160
140
120
100
80
60
40
20
0
25
50
75
100
125
150
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
TJ, STARTING JUNCTION TEMPERATURE(°C)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
160
1000
140
120
100
Id (A)
gFS (S)
100
80
60
100°C
125°C
10
25°C
40
20
0
VDS = 1.5 V
0
15
30
45
60
75
90
105
1
120
1
10
100
1000
DRAIN CURRENT (A)
PULSE WIDTH (ms)
Figure 13. gFS vs. Drain Current
Figure 14. Id vs. Pulse Width
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6
10,000
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE N
1
DATE 25 JUN 2018
SCALE 2:1
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
0.20 C
D
A
2
B
D1
2X
0.20 C
4X
E1
2
q
E
c
1
2
3
A1
4
TOP VIEW
C
DETAIL A
0.10 C
SEATING
PLANE
A
0.10 C
SIDE VIEW
MILLIMETERS
MIN
NOM
MAX
0.90
1.00
1.10
0.00
−−−
0.05
0.33
0.41
0.51
0.23
0.28
0.33
5.00
5.15
5.30
4.70
4.90
5.10
3.80
4.00
4.20
6.00
6.30
6.15
5.70
5.90
6.10
3.45
3.65
3.85
1.27 BSC
0.51
0.575
0.71
1.20
1.35
1.50
0.51
0.575
0.71
0.125 REF
3.00
3.40
3.80
0_
−−−
12 _
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
q
GENERIC
MARKING DIAGRAM*
DETAIL A
1
0.10
b
C A B
0.05
c
8X
XXXXXX
AYWZZ
e/2
e
L
1
4
K
RECOMMENDED
SOLDERING FOOTPRINT*
E2
PIN 5
(EXPOSED PAD)
L1
M
2X
0.495
4.560
2X
1.530
G
D2
2X
BOTTOM VIEW
XXXXXX = Specific Device Code
A
= Assembly Location
Y
= Year
W
= Work Week
ZZ
= Lot Traceability
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
0.475
3.200
4.530
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
1.330
STYLE 2:
2X
PIN 1. ANODE
0.905
2. ANODE
3. ANODE
4. NO CONNECT
0.965
5. CATHODE
1
4X
1.000
4X 0.750
1.270
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON14036D
DFN5 5x6, 1.27P (SO−8FL)
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
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