NTMKB4895NT1G

NTMKB4895N Power MOSFET 30 V, 82 A, Single N−Channel, ICEPAK Features • • • • • • • Low Package Inductance Low RDS(on) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses Optimized Gate Charge to Minimize Switching Losses Dual Sided Cooling Capability Compatible with SQ Footprint and Outline These are Pb−Free Devices http://onsemi.com V(BR)DSS 6.0 mW @ 10 V 30 V 9.0 mW @ 4.5 V Applications • CPU Power Delivery • DC−DC Converters • Optimized for both Synch FET and Control FET ÍÍ ÍÍ MAXIMUM RATINGS (TJ = 25°C unless otherwise stated) Parameter Symbol Value Unit Drain−to−Source Voltage VDSS 30 V Gate−to−Source Voltage VGS ±20 V ID 15.0 A Continuous Drain Current RqJA (Note 1) TA = 25°C Power Dissipation RqJA (Note 1) TA = 25°C PD 2.2 W Continuous Drain Current RqJ−PCB (Note 2) TA = 25°C ID 82 A Power Dissipation RqJ−PCB (Note 2) TA = 70°C Steady State PD 65 W Continuous Drain Current RqJC (Note 1) TC = 25°C ID 66 A Power Dissipation RqJC (Note 1) TC = 25°C TC = 70°C 42 W IDM 120 A 50 A TJ, Tstg −55 to 150 °C IS 51 A Drain to Source DV/DT dV/dt 6.0 V/ns Single Pulse Drain−to−Source Avalanche Energy (TJ = 25°C, VDD = 30 V, VGS = 10 V, IL = 23.1 Apk, L = 0.3 mH, RG = 25 W) EAS 80 mJ TL 270 °C TA = 25°C Operating Junction and Storage Temperature Source Current (Body Diode) (Note 1) Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surfacemounted on FR4 board using 1 sq−in pad, 1 oz Cu. 2. Measured with a TJ of approximately 90°C using 1 oz Cu board. © Semiconductor Components Industries, LLC, 2011 January, 2011 − Rev. 1 B4895 AYWWG G B4895= Specific Device Code A = Assembly Location Y = Year WW = Work Week G = Pb−Free Package (Note: Microdot may be in either location) D 53 PD IDmax TA = 25°C, tp = 10 ms Current Limited by Package 82 A 46 TA = 25°C Pulsed Drain Current ID MAX MARKING DIAGRAM ICEPAK B1 PAD CASE 145AD 12.0 TA = 70°C RDS(ON) MAX 1 G S N−CHANNEL MOSFET ORDERING INFORMATION Device Package Shipping† NTMKB4895NT1G ICEPAK 1500/Tape & Reel (Pb−Free) NTMKB4895NT3G ICEPAK 5000/Tape & Reel (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Publication Order Number: NTMKB4895N/D NTMKB4895N THERMAL RESISTANCE MAXIMUM RATINGS Parameter Symbol Value Unit RqJC 3.0 °C/W Junction−to−Case (Drain) (Note 1) Junction−to−Ambient – Steady State (Note 1) Junction−to−PCB (Note 2) RqJA 58 RqJ−PCB 1.0 ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter Symbol Test Condition Min Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 30 Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/TJ Typ Max Unit OFF CHARACTERISTICS Zero Gate Voltage Drain Current IDSS Gate−to−Source Leakage Current V 23 VGS = 0 V, VDS = 24 V mV/°C TJ = 25°C 1.0 TJ = 125°C 10 IGSS VDS = 0 V, VGS = ±20 V VGS(TH) VGS = VDS, ID = 250 mA ±100 mA nA ON CHARACTERISTICS (Note 3) Gate Threshold Voltage Negative Threshold Temperature Coefficient VGS(TH)/TJ Drain−to−Source On Resistance RDS(on) Forward Transconductance 1.6 2.4 5.7 gFS V mV/°C mW VGS = 10 V, ID = 15 A 4.8 6.0 VGS = 4.5 V, ID = 12 A 7.5 9.0 VDS = 15 V, ID = 10 A 40 S 1644 pF CHARGES, CAPACITANCES AND GATE RESISTANCE Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss 184 Total Gate Charge QG(TOT) 12.9 Threshold Gate Charge QG(TH) 1.8 Gate−to−Source Charge QGS Gate−to−Drain Charge Total Gate Charge VGS = 0 V, f = 1.0 MHz, VDS = 15 V VGS = 4.5 V, VDS = 15 V, ID = 12 A QGD QG(TOT) 341 nC 5.0 4.6 VGS = 10 V, VDS = 15 V, ID = 12 A 25 nC 10.5 ns SWITCHING CHARACTERISTICS (Note 4) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(on) tr td(off) VGS = 4.5 V, VDS = 15 V, ID = 12 A, RG = 1.8 W tf 21.6 16.8 4.1 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time VSD TJ = 25°C 0.81 TJ = 125°C 0.66 tRR Charge Time ta Discharge Time tb Reverse Recovery Charge VGS = 0 V, IS = 12 A 1.0 ns 22.6 VGS = 0 V, dIS/dt = 100 A/ms, IS = 12 A QRR V 7.5 15.1 15.1 nC PACKAGE PARASITIC VALUES Gate Resistance RG TA = 25°C 3. Pulse Test: pulse width = 300 ms, duty cycle v 2%. 4. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 1.9 3.0 W NTMKB4895N TYPICAL CHARACTERISTICS 4.8 V 4.6 V 5.0 V 4.2 V TJ = 25°C 80 VDS ≥ 10 V 4.4 V ID, DRAIN CURRENT (A) 100 4.0 V 60 3.8 V 3.6 V 40 3.4 V 20 0 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 120 10 V 7.0 V 3.2 V 0.5 0 1.5 1 2.5 2 3 3.5 3.0 V 4.5 5 4 60 40 0.0120 0.0105 0.0090 0.0075 0.0060 0.0045 1 1.5 2 4 5 6 7 8 9 10 VGS, GATE−TO−SOURCE VOLTAGE (V) 4 3.5 4.5 TJ = 25°C 0.009 0.008 0.007 VGS = 4.5 V 0.006 0.005 VGS = 10 V 0.004 0.003 0.002 10 20 30 40 50 60 70 80 ID, DRAIN CURRENT (A) 1.0E−5 ID = 15 A VGS = 10 V VGS = 0 V TJ = 150°C 1.0E−6 TJ = 125°C IDSS, LEAKAGE (A) 1.3 5 Figure 4. On−Resistance vs. Drain Current and Gate Voltage 1.6 1.0E−7 1.2 1.1 1.0 1.0E−8 0.9 1.0E−9 0.8 TJ = 25°C 0.7 0.6 −50 3 2.5 0.010 Figure 3. On−Resistance vs. Gate−to−Source Voltage RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) TJ = −55°C Figure 2. Transfer Characteristics 0.0135 1.4 TJ = 25°C 20 Figure 1. On−Region Characteristics 0.0150 1.5 TJ = 125°C VGS, GATE−TO−SOURCE VOLTAGE (V) ID = 12 A TJ = 25°C 3 80 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 0.0165 0.0030 100 0 RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW) ID, DRAIN CURRENT (A) 120 −25 0 25 50 75 100 125 1.0E−10 150 10 TJ, JUNCTION TEMPERATURE (°C) 15 20 VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 3 25 NTMKB4895N TYPICAL CHARACTERISTICS 2000 C, CAPACITANCE (pF) TJ = 25°C VGS = 0 V Ciss 1800 VGS, GATE−TO−SOURCE VOLTAGE (V) 2200 1600 1400 1200 1000 800 600 Coss 400 200 0 Crss 0 10 5 15 20 25 30 6 5 4 3 2 1 0 Qgs 0 Qgd 5 TJ = 25°C VDD = 15 V VGS = 10 V ID = 12 A 10 20 15 25 Figure 7. Capacitance Variation Figure 8. Gate−to−Source and Drain−to−Source Voltage vs. Total Charge 20 IS, SOURCE CURRENT (A) td(off) 100 t, TIME (ns) 8 7 Qg, TOTAL GATE CHARGE (nC) VDD = 15 V ID = 13 A VGS = 4.5 V tr tf td(on) 10 1 10 VGS = 0 V TJ = 25°C 16 12 8 4 0 0.1 100 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 RG, GATE RESISTANCE (W) VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current 100 EAS, SINGLE PULSE DRAIN−TO− SOURCE AVALANCHE ENERGY (mJ) 1000 ID, DRAIN CURRENT (A) QT VDS, DRAIN−TO−SOURCE VOLTAGE (V) 1000 1 12 11 10 9 10 ms 100 ms 10 1 ms 1 0 ≤ VGS ≤ 20 V Single Pulse TC = 25°C RDS(on) Limit 0.1 Thermal Limit Package Limit 0.01 0.1 1 10 ms dc 10 100 90 ID = 23.1 A 80 70 60 50 40 30 20 10 0 25 50 75 100 125 VDS, DRAIN−TO−SOURCE VOLTAGE (V) TJ, STARTING JUNCTION TEMPERATURE(°C) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature http://onsemi.com 4 150 NTMKB4895N PACKAGE DIMENSIONS ICEPAK 4.8x3.8 − B1 PAD CASE 145AD−01 ISSUE O NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. COPLANARITY APPLIES TO THE FLANGES OF LEADFRAME ONLY. D GATE PAD REFERENCE ÍÍ ÍÍ E DIM A A1 A2 D D2 D3 D4 E E2 E3 E4 F G TOP VIEW A1 A 0.08 C 0.08 C NOTE 3 A2 SIDE VIEW C SEATING PLANE SOLDERING FOOTPRINT* D4 1.30 D3 0.55 2X D2 MILLIMETERS MIN MAX 0.61 0.68 0.02 0.08 0.08 0.17 4.75 4.85 0.35 0.45 0.44 0.48 0.84 0.88 3.70 3.95 2.75 2.85 0.74 0.78 0.74 0.78 0.97 BSC 2.07 BSC E4 0.95 E2 2X E3 1.65 0.12 C A F A 4X 1.25 G 0.85 0.12 C A 4X BOTTOM VIEW 0.90 1.95 1.65 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 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