NTMS4704NR2

NTMS4704N Power MOSFET 30 V, 12.3 A, Single N−Channel, SO−8 Features • • • • • • • • Low RDS(on) Low Gate Charge Standard SO−8 Single Package Pb−Free Package is Available Notebooks, Graphics Cards Synchronous Rectification High Side Switch DC−DC Converters http://onsemi.com V(BR)DSS 30 V RDS(ON) TYP 7.5 mW @ 10 V 10 mW @ 4.5 V ID MAX 12.3 A Applications MAXIMUM RATINGS (TJ = 25°C unless otherwise stated) Parameter Drain−to−Source Voltage Gate−to−Source Voltage Continuous Drain Current (Note 1) Steady State t v 10 s Power Dissipation (Note 1) Continuous Drain Current (Note 2) Power Dissipation (Note 2) Pulsed Drain Current Steady State t v 10 s Steady State TA = 25°C TA = 85°C TA = 25°C tp = 10 ms PD IDM TJ, Tstg IS EAS ID TA = 25°C TA = 85°C TA = 25°C TA = 25°C PD Symbol VDSS VGS ID Value 30 ±20 10 7.3 12.3 1.6 2.3 7.6 5.4 0.86 37 −55 to 150 2.3 200 W A °C A mJ A 1 N−Channel D Unit V V A S G W MARKING DIAGRAM/ PIN ASSIGNMENT Source Source Source Gate 1 4704N ALYWG G 8 Drain Drain Drain Drain SO−8 CASE 751 STYLE 12 Top View Operating Junction and Storage Temperature Source Current (Body Diode) Single Pulse Drain−to−Source Avalanche Energy (VDD = 25 V, VGS = 10 V, IL Peak = 7.5 A, L = 10 mH, RG = 25 W) Lead Temperature for Soldering Purposes (1/8″ from case for 10 secs) TL 260 °C 4704N = Device Code A = Assembly Location L = WaferLot Y = Year WW = Work Week G = Pb−Free Package (Note: Microdot may be in either location) THERMAL RESISTANCE MAXIMUM RATINGS Parameter Junction−to−Ambient – Steady State (Note 1) Junction−to−Ambient – t v 10 s (Note 1) Junction−to−Ambient – Steady State (Note 2) Symbol RqJA RqJA RqJA Value 80.5 55 145 Unit °C/W ORDERING INFORMATION Device NTMS4704NR2 NTMS4704NR2G Package SO−8 SO−8 (Pb−Free) Shipping† 2500/Tape & Reel 2500/Tape & Reel Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surfacemounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces). 2. Surfacemounted on FR4 board using the minimum recommended pad size. †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2006 August, 2006 − Rev. 2 1 Publication Order Number: NTMS4704N/D NTMS4704N ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage Drain−to−Source Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current V(BR)DSS V(BR)DSS/TJ IDSS IGSS VGS(TH) VGS(TH)/TJ RDS(on) gFS Ciss Coss Crss QG(TOT) QG(TH) QGS QGD RG td(on) tr td(off) tf VSD tRR ta tb QRR VGS = 0 V, dIS/dt = 100 A/ms, IS = 2.3 A TJ = 25°C TJ = 125°C VGS = 10 V, VDD = 15 V, ID = 1.0 A, RG = 3.0 W VGS = 4.5 V, VDS = 15 V, ID = 10 A VGS = 0 V, f = 1.0 MHz, VDS = 20 V VGS = 10 V, ID = 12.3 A VGS = 4.5 V, ID = 10 A Forward Transconductance VDS = 15 V, ID = 10 A CHARGES, CAPACITANCES AND GATE RESISTANCE Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Threshold Gate Charge Gate−to−Source Charge Gate−to−Drain Charge Gate Resistance SWITCHING CHARACTERISTICS (Note 4) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VGS = 0 V, IS = 2.3 A 0.75 0.56 35 18 17 33 nC ns 1.0 V 8.2 5.4 28.4 10.5 ns 1225 580 125 12 1.6 3.25 5.25 1.8 W 17 nC pF TJ = 25°C TJ = 125°C VGS = 0 V, ID = 250 mA 30 28 1.0 50 ±100 nA V mV/°C mA Symbol Test Condition Min Typ Max Unit VGS = 0 V, VDS = 24 V Gate−to−Source Leakage Current ON CHARACTERISTICS (Note 3) Gate Threshold Voltage Negative Threshold Temperature Coefficient Drain−to−Source On Resistance VDS = 0 V, VGS = ±20 V VGS = VDS, ID = 250 mA 1.0 5.0 7.5 10 20 2.5 V mV/°C 9.5 12.5 mW S Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge 3. Pulse Test: pulse width = 300 ms, duty cycle v 2%. 4. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 NTMS4704N TYPICAL PERFORMANCE CURVES 30 ID, DRAIN CURRENT (AMPS) 25 20 15 10 5 0 0 2.6 V 10 V 5V 3.4 V 3.2 V 3V TJ = 25°C ID, DRAIN CURRENT (AMPS) 40 35 30 25 20 15 10 5 0 0 TJ = 100°C TJ = 25°C TJ = −55°C 1 3 3.5 0.5 1.5 2.5 2 VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) 4 VDS ≥ 10 V 2.8 V 2.4 V 2.2 V 1 2 3 4 5 6 7 8 9 10 VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 1. On−Region Characteristics RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 0.05 0.04 0.03 0.02 0.01 0 1 3 4 6 8 9 5 7 2 VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) 10 TJ = 25°C ID = 12.3 A RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 0.020 Figure 2. Transfer Characteristics TJ = 25°C 0.015 VGS = 4.5 V 0.010 0.005 VGS = 10 V 0 2 4 16 14 6 10 8 12 ID, DRAIN CURRENT (AMPS) 18 20 Figure 3. On−Resistance vs. Gate−to−Source Voltage 1.8 RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) 1.6 1.4 1.2 1 0.8 0.6 −50 100 100000 Figure 4. On−Resistance vs. Drain Current and Gate Voltage ID = 12.3 A VGS = 10 V VGS = 0 V IDSS, LEAKAGE (nA) 10000 TJ = 150°C 1000 TJ = 100°C −25 0 25 50 75 100 125 150 3 6 9 12 15 18 21 24 27 30 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 3 NTMS4704N TYPICAL PERFORMANCE CURVES VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) 2400 VDS = 0 V Ciss VGS = 0 V TJ = 25°C 5 4 3 2 1 0 VDS QGS QGD VGS QT 20 V DS , DRAIN−TO−SOURCE VOLTAGE (VOLTS) C, CAPACITANCE (pF) 1800 16 1200 Crss 600 Ciss 12 8 4 0 12 Coss Crss 5 VGS 0 VDS 5 10 15 20 25 30 0 10 ID = 10 A TJ = 25°C 0 2 4 6 8 10 QG, TOTAL GATE CHARGE (nC) GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 7. Capacitance Variation 1000 7 IS, SOURCE CURRENT (AMPS) 6 5 4 3 2 1 Figure 8. Gate−To−Source and Drain−To−Source Voltage vs. Total Charge VDD = 15 V ID = 12.3 A VGS = 4.5 V tr tf VGS = 0 V TJ = 25°C t, TIME (ns) 100 10 td(off) td(on) 1 1 10 RG, GATE RESISTANCE (OHMS) 100 0 0.3 0.6 0.9 VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS) 1.2 Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current http://onsemi.com 4 NTMS4704N PACKAGE DIMENSIONS SOIC−8 CASE 751−07 ISSUE AG − X− A 8 5 B 1 S 4 0.25 (0.010) M Y M − Y− G K NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 SOURCE SOURCE SOURCE GATE DRAIN DRAIN DRAIN DRAIN INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244 C −Z− H D 0.25 (0.010) M SEATING PLANE N X 45 _ 0.10 (0.004) M J ZY S X S DIM A B C D G H J K M N S SOLDERING FOOTPRINT* 1.52 0.060 STYLE 12: PIN 1. 2. 3. 4. 5. 6. 7. 8. 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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