NTMS4916NR2G

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Other names and brands may be claimed as the property of others. NTMS4916N MOSFET – Power, N-Channel, SO-8 30 V, 11.6 A Features • • • • • Low RDS(on) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses Optimized Gate Charge to Minimize Switching Losses Optimized for 5 V, 12 V Gate Drives These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant http://onsemi.com V(BR)DSS RDS(ON) MAX ID MAX 9 mW @ 10 V 30 V 11.6 A 12 mW @ 4.5 V Applications • DC−DC Converters • Printers N−Channel D MAXIMUM RATINGS (TJ = 25°C unless otherwise stated) Parameter Symbol Value Unit Drain−to−Source Voltage VDSS 30 V Gate−to−Source Voltage VGS ±20 V ID 9.4 A Continuous Drain Current RqJA (Note 1) Steady State TA = 25°C Power Dissipation RqJA (Note 1) Steady State TA = 25°C PD 1.30 W Continuous Drain Current RqJA (Note 2) Steady State TA = 25°C ID 7.8 A S 7.5 TA = 70°C 6.2 1 TA = 25°C PD 0.89 W ID 11.6 A Continuous Drain Current RqJA, t v 10 s (Note 1) Steady State TA = 25°C Power Dissipation RqJA, t v 10 s(Note 1) Steady State TA = 25°C PD Pulsed Drain Current TA = 25°C, tp = 10 ms IDM 145 A TJ, Tstg −55 to 150 °C IS 2.5 A EAS 40.5 mJ TL 260 °C TA = 70°C Operating Junction and Storage Temperature 9.3 Source Current (Body Diode) Single Pulse Drain−to−Source Avalanche Energy (TJ = 25°C, VDD = 30 V, VGS = 10 V, IL = 9 Apk, L = 1.0 mH, RG = 25 W) Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) MARKING DIAGRAM/ PIN ASSIGNMENT 1.98 W Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. SO−8 CASE 751 STYLE 12 Source Source Source Gate 1 8 4916N AYWWG G Power Dissipation RqJA (Note 2) TA = 70°C G Drain Drain Drain Drain Top View 4916N = Device Code A = Assembly Location Y = Year WW = Work Week G = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION Device NTMS4916NR2G Package Shipping† SO−8 (Pb−Free) 2500/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. THERMAL RESISTANCE MAXIMUM RATINGS Symbol Value Unit Junction−to−Ambient – Steady State (Note 1) Parameter RqJA 96 °C/W Junction−to−Ambient – t v 10 s (Note 1) RqJA 63 Junction−to−Foot (Drain) RqJF 24.5 Junction−to−Ambient – Steady State (Note 2) RqJA 141 © Semiconductor Components Industries, LLC, 2010 June, 2019 − Rev. 0 1 Publication Order Number: NTMS4916N/D NTMS4916N 1. Surfacemounted on FR4 board using 1 in sq pad size, 1 oz Cu. 2. Surfacemounted on FR4 board using the minimum recommended pad size. http://onsemi.com 2 NTMS4916N ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter Symbol Test Condition Min Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 30 Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/TJ Typ Max Unit OFF CHARACTERISTICS Zero Gate Voltage Drain Current IDSS Gate−to−Source Leakage Current V 16 VGS = 0 V, VDS = 30 V mV/°C TJ = 25°C 1.0 TJ = 125°C 10 IGSS VDS = 0 V, VGS = ±20 V VGS(TH) VGS = VDS, ID = 250 mA ±100 mA nA ON CHARACTERISTICS (Note 3) Gate Threshold Voltage 1.0 1.7 2.5 VGS(TH)/TJ Drain−to−Source On Resistance RDS(on) VGS = 10 V, ID = 12 A 6.75 9.0 VGS = 4.5 V, ID = 10 A 9.0 12 gFS VDS = 1.5 V, ID = 7.5 A 23 S 1376 pF Forward Transconductance 5 V Negative Threshold Temperature Coefficient mV/°C mW CHARGES, CAPACITANCES AND GATE RESISTANCE Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss VGS = 0 V, f = 1.0 MHz, VDS = 25 V 401 205 Total Gate Charge QG(TOT) 15 Threshold Gate Charge QG(TH) 2.44 Gate−to−Source Charge QGS Gate−to−Drain Charge QGD Total Gate Charge QG(TOT) VGS = 4.5 V, VDS = 15 V, ID = 7.5 A nC 4 6.5 VGS = 10 V, VDS = 15 V, ID = 7.5 A 28 nC td(on) 9.4 ns tr 7.4 SWITCHING CHARACTERISTICS (Note 4) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(off) VGS = 10 V, VDS = 15 V, ID = 1.0 A, RG = 6.0 W tf 32 15.6 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD Reverse Recovery Time tRR Charge Time ta Discharge Time tb Reverse Recovery Charge VGS = 0 V, IS = 2.0 A TJ = 25°C 0.740 TJ = 125°C 0.570 30.7 VGS = 0 V, dIS/dt = 100 A/ms, IS = 2.0 A 1.0 V ns 14.3 16.4 QRR 20 nC Source Inductance LS 0.66 nH Drain Inductance LD 0.2 Gate Inductance LG Gate Resistance RG PACKAGE PARASITIC VALUES TA = 25°C 1.5 0.77 3. Pulse Test: pulse width = 300 ms, duty cycle v 2%. 4. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 3 W NTMS4916N TYPICAL PERFORMANCE CURVES 10V 7V 20 50 TJ = 25°C 5V VDS ≥ 10 V 2.8 V ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 25 4V 3.0 V 15 2.6 V 10 2.5 V 2.2 V 5 2.4 V 40 30 TJ = 125°C 20 TJ = 25°C 10 2.3 V 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 0.015 0.010 0.005 3 3.5 4 4 5 6 7 8 9 10 VGS, GATE−TO−SOURCE VOLTAGE (V) 4.5 0.01 TJ = 25°C VGS = 4.5 V 0.009 0.008 VGS = 10 V 0.007 0.006 0.005 2 4 6 8 10 12 14 16 18 20 22 ID, DRAIN CURRENT (A) Figure 3. On−Resistance vs. Gate−to−Source Voltage Figure 4. On−Resistance vs. Drain Current and Gate Voltage 1.70 10000 VGS = 0 V ID = 12 A VGS = 10 V IDSS, LEAKAGE (nA) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) 2.5 Figure 2. Transfer Characteristics 0.020 1.50 2 Figure 1. On−Region Characteristics TJ = 25°C ID = 12 A 1.60 1.5 VGS, GATE−TO−SOURCE VOLTAGE (V) 0.025 3 1 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 0.030 0.000 0 5 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 0 TJ = −55°C 1.40 1.30 1.20 1.10 1.00 0.90 1000 TJ = 150°C 100 TJ = 100°C 0.80 0.70 −50 −25 0 25 50 75 100 125 150 10 5 10 15 20 25 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 4 30 NTMS4916N TJ = 25°C VGS = 0 V Ciss Coss Crss 0 5 10 15 20 25 DRAIN−TO−SOURCE VOLTAGE (V) 10 QT 8 VDS 6 4 QGS QGD Q2 Q1 ID = 7.5 A VGS = 10 V TJ = 25°C 2 0 30 0 5 IS, SOURCE CURRENT (A) t, TIME (ns) 25 30 2 VDD = 15 V ID = 1 A VGS = 10 V td(off) 100 tf tr td(on) 10 1 10 RG, GATE RESISTANCE (W) 100 VGS = 0 V TJ = 25°C 1.5 1 0.5 0 Figure 9. Resistive Switching Time Variation vs. Gate Resistance 0.5 0.55 0.6 0.65 0.7 0.75 VSD, SOURCE−TO−DRAIN VOLTAGE (V) 0.8 Figure 10. Diode Forward Voltage vs. Current 45 SINGLE PULSE TC = 25°C 10 ms 100 ms 10 1 ms 10 ms 1 0.1 0.01 0.01 RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT dc 0.1 1 10 VDS, DRAIN−TO−SOURCE VOLTAGE (V) EAS, SINGLE PULSE DRAIN−TO− SOURCE AVALANCHE ENERGY (mJ) 1000 ID, DRAIN CURRENT (A) 20 Figure 8. Gate−To−Source and Drain−To−Source Voltage vs. Total Charge 1000 100 15 QG, TOTAL GATE CHARGE (nC) Figure 7. Capacitance Variation 1 10 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 2000 1900 1800 1700 1600 1500 1400 1300 1200 1100 1000 900 800 700 600 500 400 300 200 100 0 VGS, GATE−TO−SOURCE VOLTAGE (V) C, CAPACITANCE (pF) TYPICAL PERFORMANCE CURVES 100 Figure 11. Maximum Rated Forward Biased Safe Operating Area 40 ID = 9 A 35 30 25 20 15 10 5 0 25 50 75 100 125 TJ, STARTING JUNCTION TEMPERATURE (°C) Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature http://onsemi.com 5 150 NTMS4916N PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE AK −X− NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. A 8 5 S B 0.25 (0.010) M Y M 1 4 −Y− K G C N DIM A B C D G H J K M N S X 45 _ SEATING PLANE −Z− 0.10 (0.004) H D 0.25 (0.010) M Z Y S X M J S SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 _ 8 _ 0.010 0.020 0.228 0.244 STYLE 12: PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN 6. DRAIN 7. DRAIN 8. DRAIN 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. 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