NTNS3A65PZ
MOSFET – Single,
P-Channel, Small Signal,
SOT-883 (XDFN3),
1.0 x 0.6 x 0.4 mm
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-20 V, -281 mA
V(BR)DSS
Features
RDS(on) MAX
• Single P−Channel MOSFET
• Ultra Low Profile SOT−883 (XDFN3) 1.0 x 0.6 x 0.4 mm for
•
•
•
ID Max
1.3 W @ −4.5 V
Extremely Thin Environments Such as Portable Electronics
Low RDS(on) Solution in the Ultra Small 1.0 x 0.6 mm Package
1.5 V Gate Drive
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
2.0 W @ −2.5 V
−20 V
−281 mA
3.4 W @ −1.8 V
4.5 W @ −1.5 V
P−CHANNEL MOSFET
Applications
• High Side Switch
• High Speed Interfacing
• Optimized for Power Management in Ultra Portable Solutions
S (2)
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter
G (1)
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
−20
V
Gate−to−Source Voltage
VGS
±8
V
ID
−281
mA
Continuous Drain
Current (Note 1)
Power Dissipation
(Note 1)
Steady
State
TA = 25°C
TA = 85°C
−202
t≤5s
TA = 25°C
−332
Steady
State
TA = 25°C
PD
t≤5s
Pulsed Drain
Current
D (3)
3
218
IDM
−842
mA
TJ, TSTG
−55 to
150
°C
Source Current (Body Diode) (Note 2)
IS
−130
mA
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
TL
260
°C
tp = 10 ms
Operating Junction and Storage
Temperature
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface−mounted on FR4 board using the minimum recommended pad size,
or 2 mm2, 1 oz Cu.
2. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%
© Semiconductor Components Industries, LLC, 2012
June, 2019 − Rev. 0
MARKING
DIAGRAM
mW
155
1
2
1
SOT−883 (XDFN3)
CASE 506CB
65
M
65 M
= Specific Device Code
= Date Code
ORDERING INFORMATION
Device
Package
Shipping†
NTNS3A65PZT5G
SOT−883
(Pb−Free)
8000 / Tape &
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Publication Order Number:
NTNS3A65PZ/D
NTNS3A65PZ
THERMAL RESISTANCE RATINGS
Symbol
Max
Junction−to−Ambient – Steady State (Note 3)
Parameter
RθJA
804
Junction−to−Ambient – t ≤ 5 s (Note 3)
RθJA
574
Unit
°C/W
3. Surface−mounted on FR4 board using the minimum recommended pad size, or 2 mm2, 1 oz Cu.
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise stated)
Parameter
Symbol
Test Condition
Min
−20
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = −250 mA
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/
TJ
ID = −250 mA, ref to 25°C
Zero Gate Voltage Drain Current
IDSS
VGS = 0 V,
VDS = −20 V
Gate−to−Source Leakage Current
IGSS
VDS = 0 V, VGS = ±5 V
VGS(TH)
VGS = VDS, ID = −250 mA
V
11
TJ = 25°C
mV/°C
−1
mA
±10
mA
−1.0
V
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
Negative Threshold Temperature
Coefficient
Drain−to−Source On Resistance
VGS(TH)/TJ
RDS(on)
−0.4
2.2
mV/°C
VGS = −4.5 V, ID = −200 mA
0.9
1.3
VGS = −2.5 V, ID = −100 mA
1.3
2.0
VGS = −1.8 V, ID = −50 mA
1.8
3.4
VGS= −1.5 V, ID = −10 mA
2.3
4.5
Forward Transconductance
gFS
VDS = −5 V, ID = −200 mA
0.58
Source−Drain Diode Voltage
VSD
VGS = 0 V, IS = −100 mA
−0.8
VGS = 0 V, freq = 1 MHz, VDS = −10 V
W
W
S
−1.2
V
CHARGES & CAPACITANCES
Input Capacitance
CISS
44
Output Capacitance
COSS
6.7
Reverse Transfer Capacitance
CRSS
5.5
Total Gate Charge
QG(TOT)
1.1
Threshold Gate Charge
QG(TH)
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
VGS = −4.5 V, VDS = −10 V;
ID = −200 mA
0.1
0.2
pF
nC
0.2
SWITCHING CHARACTERISTICS, VGS = 4.5 V (Note 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
tr
td(OFF)
18
VGS = −4.5 V, VDD = −10 V,
ID = −200 mA, RG = 2 W
tf
32
178
84
4. Switching characteristics are independent of operating junction temperatures
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2
ns
NTNS3A65PZ
TYPICAL CHARACTERISTICS
1.0
−4.0 V
0.7
−3.5 V
0.6
−2 V
−3 V
0.5
−1.8 V
0.4
0.3
−1.5 V
0.2
0.1
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
0.0
0.5
1.0
1.5
2.0
2.5
TJ = 25°C
0.6
0.5
TJ = −55°C
0.4
0.3
0.2
0
1
1.5
2
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
TJ = 25°C
ID = −200 mA
3.5
3.0
2.5
2.0
1.5
1.0
0.5
1.5
2.0
2.5
3.0
3.5
4.0
4.5
−VGS, GATE−TO−SOURCE VOLTAGE (V)
3
2.5
−VGS, GATE−TO−SOURCE VOLTAGE (V)
4.0
5.0
TJ = 25°C
4.5
VGS = −1.5 V
4.0
3.5
3.0
VGS = −1.8 V
2.5
VGS = −2.5 V
2.0
1.5
VGS = −4.5 V
1.0
0.5
0.0
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
−ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
1.6
1000
VGS = 0 V
1.5
TJ = 125°C
VGS = −4.5 V
ID = −200 mA
1.4
−IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)
0.5
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
4.5
1.0
TJ = 125°C
0.7
0.0
3.0
5.0
0.0
0.8
0.1
−1.2 V
0.0
VDS = −5 V
0.9
−ID, DRAIN CURRENT (A)
0.8
−2.5 V
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
−ID, DRAIN CURRENT (A)
1.0
TJ = 25°C
VGS = −4.5
0.9
1.3
1.2
VGS = −1.8 V
ID = −50 mA
1.1
1.0
0.9
100
TJ = 85°C
0.8
0.7
−50
−25
0
25
50
75
100
125
150
10
2
4
6
8
10
12
14
16
18
TJ, JUNCTION TEMPERATURE (°C)
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
20
NTNS3A65PZ
C, CAPACITANCE (pF)
TJ = 25°C
VGS = 0 V
f = 1 MHz
Ciss
Coss
Crss
0
2
4
6
8
10
12
14
16
18
20
10
4
VGS
VDS
8
3
6
2
Qgs
Qgd
4
VDS = −10 V
ID = −0.2 V
TJ = 25°C
1
0
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
2
0
1.1 1.2
Qg, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source Voltage vs. Total
Charge
10.0
−IS, SOURCE CURRENT (A)
VDD = −10 V
VGS = −4.5 V
td(off)
t, TIME (ns)
12
QT
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
1000
100
tf
tr
td(on)
10
5
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
80
75
70
65
60
55
50
45
40
35
30
25
20
15
10
5
0
−VGS, GATE−TO−SOURCE VOLTAGE (V)
TYPICAL CHARACTERISTICS
1
10
RG, GATE RESISTANCE (W)
1.0
TJ = −55°C
0.1
100
TJ = 125°C
TJ = 25°C
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
−VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1.000
0.90
10 ms
−ID, DRAIN CURRENT (A)
0.80
−VGS(th) (V)
ID = −250 mA
0.70
0.60
0.50
0.40
−50
100 ms
10 ms
150
VGS ≤ −8 V
Single Pulse
TC = 25°C
0.010
0.001
−25
0
25
50
75
100
125
TJ, STARTING JUNCTION TEMPERATURE (°C)
1 ms
0.100
dc
RDS(on) Limit
Thermal Limit
Package Limit
0.1
1
10
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. Threshold Voltage
Figure 12. Maximum Rated Forward Biased
Safe Operating Area
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4
100
NTNS3A65PZ
R(t) (°C/W) EFFECTIVE TRANSIENT
THERMAL RESISTANCE
TYPICAL CHARACTERISTICS
900
RqJA steady state = 804°C/W
800
700
600
500
Duty Cycle = 0.5
400
300
0.01 0.02
200
0.2
100
0.1
0
0.000001
0.05
Single Pulse
0.00001
0.0001
0.001
0.01
0.1
PULSE TIME (sec)
Figure 13. Thermal Response
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5
1
10
100
1000
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT−883 (XDFN3), 1.0x0.6, 0.35P
CASE 506CB
ISSUE A
DATE 30 MAR 2012
SCALE 8:1
PIN ONE
REFERENCE
0.10 C
ÉÉ
ÉÉ
0.10 C
E
DIM
A
A1
b
D
D2
e
E
E2
L
TOP VIEW
NOTE 3
A
0.10 C
0.10 C
3X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. EXPOSED COPPER ALLOWED AS SHOWN.
A B
D
A1
SIDE VIEW
C
GENERIC
MARKING DIAGRAM*
SEATING
PLANE
XX M
D2
XX = Specific Device Code
M = Date Code
E2
e/2
1
e
0.10
M
b
C A B
0.05
M
C
3X
2X
MILLIMETERS
MIN
MAX
0.340 0.440
0.000 0.030
0.075 0.200
0.950 1.075
0.620 BSC
0.350 BSC
0.550 0.675
0.425 0.550
0.170 0.300
*This information is generic. Please refer
to device data sheet for actual part
marking. Pb−Free indicator, “G”, may
or not be present.
L
BOTTOM VIEW
RECOMMENDED
SOLDER FOOTPRINT*
1.10
2X
2X
0.41
0.43
1
0.55
0.20
PACKAGE
OUTLINE
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON65407E
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
SOT−883 (XDFN3), 1.0X0.6, 0.35P
PAGE 1 OF 1
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