NTST40120CT,
NTSJ40120CTG,
NTSB40120CT-1G,
NTSB40120CTG,
NTSB40120CTT4G
Very Low Forward Voltage
Trench-based Schottky
Rectifier
Exceptionally Low VF = 0.43 V at IF = 5 A
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VERY LOW FORWARD
VOLTAGE, LOW LEAKAGE
SCHOTTKY BARRIER
RECTIFIERS 40 AMPERES,
120 VOLTS
Features
• Fine Lithography Trench−based Schottky Technology for Very Low
•
•
•
•
•
•
PIN CONNECTIONS
Forward Voltage and Low Leakage
Fast Switching with Exceptional Temperature Stability
Low Power Loss and Lower Operating Temperature
Higher Efficiency for Achieving Regulatory Compliance
Low Thermal Resistance
High Surge Capability
Pb−Free and Halide−Free Packages are Available
1
2, 4
3
4
4
Typical Applications
• Switching Power Supplies including Notebook/Netbook Adapters,
•
•
•
•
ATX and Flat Panel Display
High Frequency and DC−DC Converters
Freewheeling and OR−ing Diodes
Reverse Battery Protection
Instrumentation
1
2
12
3
TO−220
CASE 221A
STYLE 6
3
I2PAK
CASE 418D
STYLE 3
Mechanical Characteristics
• Case: Epoxy, Molded
• Epoxy Meets Flammability Rating UL 94−0 @ 0.125 in
• Finish: All External Surfaces Corrosion Resistant and Terminal
4
Leads are Readily Solderable
• Lead Temperature for Soldering Purposes: 260°C Maximum for
10 sec
1
2
3
TO−220FP
CASE 221AH
D2PAK
CASE 418B
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
September, 2014 − Rev. 6
1
Publication Order Number:
NTST40120CT/D
NTST40120CT, NTSJ40120CTG, NTSB40120CT−1G, NTSB40120CTG,
NTSB40120CTT4G
MAXIMUM RATINGS
Rating
Peak Repetitive Reverse Voltage
Working Peak Reverse Voltage
DC Blocking Voltage
Average Rectified Forward Current
(Rated VR, TC = 120°C)
Symbol
Value
Unit
VRRM
VRWM
VR
120
V
IF(AV)
A
Per Device
Per Diode
Peak Repetitive Forward Current
(Rated VR, Square Wave, 20 kHz, TC = 125°C)
40
20
IFRM
A
Per Device
Per Diode
Nonrepetitive Peak Surge Current
(Surge applied at rated load conditions halfwave, single phase, 60 Hz)
80
40
IFSM
250
A
TJ
−40 to +150
°C
Storage Temperature
Tstg
−40 to +150
°C
Voltage Rate of Change (Rated VR)
dv/dt
10,000
V/ms
Operating Junction Temperature
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
THERMAL CHARACTERISTICS
Rating
Maximum Thermal Resistance per Diode
Junction−to−Case
Junction−to−Ambient
Symbol
NTST40120CTG,
NTSB40120CT−1G
NTSB40120CTG
NTSJ40120CTG
Unit
RqJC
RqJA
1.3
70
0.79
46.3
4.0
105
°C/W
°C/W
ELECTRICAL CHARACTERISTICS (Per Leg unless otherwise noted)
Rating
Symbol
Maximum Instantaneous Forward Voltage (Note 1)
(IF = 5 A, TJ = 25°C)
(IF = 10 A, TJ = 25°C)
(IF = 20 A, TJ = 25°C)
Typ
Max
0.50
0.60
0.78
−
−
0.91
0.43
0.53
0.63
−
−
0.71
16
16
−
−
mA
mA
−
30
500
100
mA
mA
vF
(IF = 5 A, TJ = 125°C)
(IF = 10 A, TJ = 125°C)
(IF = 20 A, TJ = 125°C)
Maximum Instantaneous Reverse Current (Note 1)
(VR = 90 V, TJ = 25°C)
(VR = 90 V, TJ = 125°C)
V
IR
(Rated dc Voltage, TJ = 25°C)
(Rated dc Voltage, TJ = 125°C)
Unit
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. Pulse Test: Pulse Width = 300 ms, Duty Cycle ≤ 2.0%
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2
NTST40120CT, NTSJ40120CTG, NTSB40120CT−1G, NTSB40120CTG,
NTSB40120CTT4G
100
100
TA = 150°C
TA = 150°C
I R , REVERSE CURRENT (mA)
i F , INSTANTANEOUS FORWARD CURRENT (AMPS)
TYPICAL CHARACTERISITICS
TA = 25°C
10
TA = 125°C
1.0
0.1
10
TA = 125°C
1.0
0.1
0.01
TA = 25°C
0.001
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
vF, INSTANTANEOUS FORWARD VOLTAGE (VOLTS)
20
CJ, JUNCTION CAPACITANCE (pF)
10000
TJ = 25°C
120
1000
1
10
VR, REVERSE VOLTAGE (VOLTS)
100
40
RqJC = 1.3°C/W
35
dc
30
25
20
SQUARE WAVE
15
10
5
0
0
20
Figure 3. Typical Junction Capacitance
40
60
80
100
120
TC, CASE TEMPERATURE (°C)
140
Figure 4. Current Derating per Leg
18
80
75
70
65
60
55
50
45
40
35
30
25
20
15
10
5
0
RqJC = 1.3°C/W
dc
SQUARE WAVE
PF(AV), AVERAGE FORWARD POWER DISSIPATION (W)
IF(AV), AVERAGE FORWARD CURRENT (A)
110
Figure 2. Typical Reverse Current
IF(AV), AVERAGE FORWARD CURRENT (A)
Figure 1. Typical Forward Voltage
100
0.1
50
70
90 100
40
60
80
VR, REVERSE VOLTAGE (VOLTS)
30
IPK/IAV = 5
16
SQUARE
WAVE
14
IPK/IAV = 10
10
IPK/IAV = 20
8
6
4
2
TA = 150°C
0
0
20
40
60
80
100
120
TC, CASE TEMPERATURE (°C)
0
140
dc
12
2
4
6
8
10
12
14
16 18
20
IF(AV), AVERAGE FORWARD CURRENT (A)
Figure 5. Current Derating, Case
Figure 6. Forward Power Dissipation
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3
22 24
NTST40120CT, NTSJ40120CTG, NTSB40120CT−1G, NTSB40120CTG,
NTSB40120CTT4G
TYPICAL CHARACTERISITICS
R(t), TYPICAL TRANSIENT THERMAL
RESISTANCE (°C/W)
10
1
50% Duty Cycle
20%
10%
0.1
5%
2%
Single Pulse
1%
0.01
0.000001
0.00001
0.0001
0.001
0.01
0.1
t, Pulse Time (sec)
1
10
100
1000
Figure 7. Typical Transient Thermal Response for NTST40120CT and NTSB40120CT−1G
R(t), TYPICAL TRANSIENT THERMAL
RESISTANCE (°C/W)
10
50% Duty Cycle
1
20%
0.1
10%
5%
2%
1%
0.01
Single Pulse
0.001
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
100
1000
t, Pulse Time (sec)
R(t), TYPICAL TRANSIENT THERMAL
RESISTANCE (°C/W)
Figure 8. Typical Transient Thermal Response for NTSJ40120CTG
1
50% Duty Cycle
0.1
20%
10%
5%
2%
1%
0.01
0.000001
Single Pulse
0.00001
0.0001
0.001
0.01
0.1
t, Pulse Time (sec)
1
10
Figure 9. Typical Transient Thermal Response for NTSB40120CTG
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4
NTST40120CT, NTSJ40120CTG, NTSB40120CT−1G, NTSB40120CTG,
NTSB40120CTT4G
ORDERING INFORMATION
Package
Shipping†
NTST40120CTG
TO−220
(Pb−Free)
50 Units / Rail
NTST40120CTH
TO−220
(Pb−Free and Halide−Free)
50 Units / Rail
NTSJ40120CTG
TO−220FP
(Pb−Free and Halide−Free)
50 Units / Rail
NTSB40120CT−1G
I2PAK
(Pb−Free)
50 Units / Rail
NTSB40120CTG
D2PAK
(Pb−Free)
50 Units / Rail
NTSB40120CTT4G
D2PAK
(Pb−Free)
800 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
MARKING DIAGRAMS
AYWW
TS40120Cx
AKA
AYWW
TS40120CG
AKA
AYWW
TS40120CG
AKA
TO−220
TO−220FP
I2PAK
A
Y
WW
AKA
x
G
H
= Assembly Location
= Year
= Work Week
= Polarity Designator
= G or H
= Pb−Free Package
= Halide−Free Package
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5
AYWW
TS40120CG
AKA
D2PAK
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−220 FULLPACK, 3−LEAD
CASE 221AH
ISSUE F
A
E
B
P
E/2
0.14
SCALE 1:1
Q
D
M
B A
A
H1
M
A1
C
NOTE 3
1 2 3
L
L1
3X
3X
SEATING
PLANE
b2
c
b
0.25
M
B A
M
C
A2
e
SIDE VIEW
FRONT VIEW
SECTION D−D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. CONTOUR UNCONTROLLED IN THIS AREA.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH AND GATE
PROTRUSIONS. MOLD FLASH AND GATE PROTRUSIONS NOT TO
EXCEED 0.13 PER SIDE. THESE DIMENSIONS ARE TO BE MEA
SURED AT OUTERMOST EXTREME OF THE PLASTIC BODY.
5. DIMENSION b2 DOES NOT INCLUDE DAMBAR PROTRUSION.
LEAD WIDTH INCLUDING PROTRUSION SHALL NOT EXCEED 2.00.
6. CONTOURS AND FEATURES OF THE MOLDED PACKAGE BODY
MAY VARY WITHIN THE ENVELOP DEFINED BY DIMENSIONS A1
AND H1 FOR MANUFACTURING PURPOSES.
MILLIMETERS
MIN
MAX
4.30
4.70
2.50
2.90
2.50
2.90
0.54
0.84
1.10
1.40
0.49
0.79
14.70
15.30
9.70
10.30
2.54 BSC
6.60
7.10
12.50
14.73
--2.80
3.00
3.40
2.80
3.20
DIM
A
A1
A2
b
b2
c
D
E
e
H1
L
L1
P
Q
GENERIC
MARKING DIAGRAM*
A
NOTE 6
DATE 30 SEP 2014
NOTE 6
H1
D
D
XX
XXXXXXXXX
AWLYWWG
A
SECTION A−A
ALTERNATE CONSTRUCTION
1
STYLE 1:
PIN 1. MAIN TERMINAL 1
2. MAIN TERMINAL 2
3. GATE
STYLE 2:
PIN 1. CATHODE
2. ANODE
3. GATE
DOCUMENT NUMBER:
98AON52577E
DESCRIPTION:
A
WL
Y
WW
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
TO−220 FULLPACK, 3−LEAD
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
D2PAK 3
CASE 418B−04
ISSUE L
DATE 17 FEB 2015
SCALE 1:1
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 418B−01 THRU 418B−03 OBSOLETE,
NEW STANDARD 418B−04.
C
E
−B−
V
W
4
1
2
A
S
3
−T−
SEATING
PLANE
K
W
J
G
D
DIM
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
S
V
H
3 PL
0.13 (0.005)
M
T B
M
VARIABLE
CONFIGURATION
ZONE
N
R
P
L
M
STYLE 1:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
L
M
F
F
F
VIEW W−W
1
VIEW W−W
2
VIEW W−W
3
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
MILLIMETERS
MIN
MAX
8.64
9.65
9.65 10.29
4.06
4.83
0.51
0.89
1.14
1.40
7.87
8.89
2.54 BSC
2.03
2.79
0.46
0.64
2.29
2.79
1.32
1.83
7.11
8.13
5.00 REF
2.00 REF
0.99 REF
14.60 15.88
1.14
1.40
U
L
M
INCHES
MIN
MAX
0.340 0.380
0.380 0.405
0.160 0.190
0.020 0.035
0.045 0.055
0.310 0.350
0.100 BSC
0.080
0.110
0.018 0.025
0.090
0.110
0.052 0.072
0.280 0.320
0.197 REF
0.079 REF
0.039 REF
0.575 0.625
0.045 0.055
STYLE 3:
PIN 1. ANODE
2. CATHODE
3. ANODE
4. CATHODE
STYLE 4:
PIN 1. GATE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
STYLE 5:
STYLE 6:
PIN 1. CATHODE
PIN 1. NO CONNECT
2. ANODE
2. CATHODE
3. CATHODE
3. ANODE
4. ANODE
4. CATHODE
MARKING INFORMATION AND FOOTPRINT ON PAGE 2
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42761B
D2PAK 3
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
D2PAK 3
CASE 418B−04
ISSUE L
DATE 17 FEB 2015
GENERIC
MARKING DIAGRAM*
xx
xxxxxxxxx
AWLYWWG
xxxxxxxxG
AYWW
AYWW
xxxxxxxxG
AKA
IC
Standard
Rectifier
xx
A
WL
Y
WW
G
AKA
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
= Polarity Indicator
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
SOLDERING FOOTPRINT*
10.49
8.38
16.155
2X
3.504
2X
1.016
5.080
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42761B
D2PAK 3
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 2 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
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