NTZD3155CT1H

NTZD3155C Small Signal MOSFET Complementary 20 V, 540 mA / −430 mA, with ESD protection, SOT−563 package. Features • • • • • • Leading Trench Technology for Low RDS(on) Performance High Efficiency System Performance Low Threshold Voltage ESD Protected Gate Small Footprint 1.6 x 1.6 mm These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant Applications • • • • • DC−DC Conversion Circuits Load/Power Switching with Level Shift Single or Dual Cell Li−Ion Battery Operated Systems High Speed Circuits Cell Phones, MP3s, Digital Cameras, and PDAs Symbol Value Unit Drain−to−Source Voltage VDSS 20 V Gate−to−Source Voltage VGS ±6 V N−Channel Continuous Drain Current (Note 1) P−Channel Continuous Drain Current (Note 1) Power Dissipation (Note 1) Pulsed Drain Current TA = 25°C 540 TA = 85°C 390 tv5s TA = 25°C 570 Steady State TA = 25°C TA = 85°C −310 tv5s TA = 25°C −455 Steady State −430 PD mW tv5s 280 N−Channel 1500 P−Channel mA 250 TA = 25°C tp = 10 ms Operating Junction and Storage Temperature IDM −750 mA −55 to 150 °C Source Current (Body Diode) IS 350 mA Lead Temperature for Soldering Purposes (1/8” from case for 10 s) TL 260 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface−mounted on FR4 board using 1 in sq. pad size (Cu area = 1.127 in sq [1 oz] including traces). January, 2013 − Rev. 3 0.4 W @ 4.5 V N−Channel 20 V 0.5 W @ 2.5 V 540 mA 0.7 W @ 1.8 V 0.5 W @ −4.5 V P−Channel −20 V −430 mA 0.6 W @ −2.5 V 1.0 W @ −1.8 V S1 1 6 D1 G1 2 5 G2 D2 3 4 S2 1 MARKING DIAGRAM 6 1 SOT−563−6 CASE 463A TW M G TW M G G = Specific Device Code = Date Code = Pb−Free Package (Note: Microdot may be in either location) TJ, TSTG © Semiconductor Components Industries, LLC, 2013 ID Max (Note 1) RDS(on) Typ Top View Steady State ID V(BR)DSS PINOUT: SOT−563 MAXIMUM RATINGS (TJ = 25°C unless otherwise specified) Parameter http://onsemi.com ORDERING INFORMATION Device Package Shipping† NTZD3155CT1G SOT−563 (Pb−Free) 4000 / Tape & Reel SOT−563 (Pb−Free) 4000 / Tape & Reel SOT−563 (Pb−Free) 8000 / Tape & Reel NTZD3155CT1H NTZD3155CT2G NTZD3155CT2H NTZD3155CT5G NTZD3155CT5H †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Publication Order Number: NTZD3155C/D NTZD3155C Thermal Resistance Ratings Parameter Junction−to−Ambient – Steady State (Note 2) Symbol Max Unit RqJA 500 °C/W Junction−to−Ambient – t = 5 s (Note 2) 447 2. Surface mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces). ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter Symbol N/P V(BR)DSS N Test Condition Min Typ Max Unit OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage VGS = 0 V P Drain−to−Source Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate−to−Source Leakage Current ID = 250 mA 20 ID = −250 mA −20 V(BR)DSS/TJ IDSS IGSS V 18 N VGS = 0 V, VDS = 16 V P VGS = 0 V, VDS= −16 V N VGS = 0 V, VDS = 16 V P VGS = 0 V, VDS= − 16V TJ = 25°C 1.0 mA −1.0 TJ = 125°C 2.0 mA −5.0 VDS = 0 V, VGS = ±4.5 V P mV/°C $2.0 N mA $5.0 ON CHARACTERISTICS (Note 3) Gate Threshold Voltage VGS(TH) VGS = VDS N P Gate Threshold Temperature Coefficient Drain−to−Source On Resistance Forward Transconductance ID = 250 mA 0.45 1.0 ID = −250 mA −0.45 −1.0 VGS(TH)/TJ RDS(on) gFS −1.9 V −mV/°C N VGS = 4.5 V, ID = 540 mA 0.4 0.55 P VGS = −4.5V, ID = −430 mA 0.5 0.9 N VGS = 2.5 V, ID = 500 mA 0.5 0.7 P VGS = −2.5V, ID = −300 mA 0.6 1.2 N VGS = 1.8 V, ID = 350 mA 0.7 0.9 P VGS = −1.8V, ID = −150 mA 1.0 2.0 N VDS = 10 V, ID = 540 mA 1.0 P VDS = −10 V, ID = −430 mA 1.0 W S CHARGES, CAPACITANCES AND GATE RESISTANCE Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS f = 1 MHz, VGS = 0 V VDS = 16 V N f = 1 MHz, VGS = 0 V VDS = −16 V P 3. Pulse Test: pulse width v300 ms, duty cycle v2% http://onsemi.com 2 80 150 13 25 10 20 105 175 15 30 10 20 pF NTZD3155C ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter Symbol N/P Test Condition Min Typ Max 1.5 2.5 Unit CHARGES, CAPACITANCES AND GATE RESISTANCE Total Gate Charge QG(TOT) Threshold Gate Charge QG(TH) Gate−to−Source Charge QGS Gate−to−Drain Charge QGD 0.35 Total Gate Charge QG(TOT) 1.7 Threshold Gate Charge QG(TH) Gate−to−Source Charge QGS Gate−to−Drain Charge QGD N P VGS = 4.5 V, VDS = −10 V; ID = 540 mA VGS = −4.5 V, VDS = 10 V; ID = −380 mA 0.1 0.2 2.5 nC 0.1 0.3 0.4 SWITCHING CHARACTERISTICS (VGS = V) (Note 4) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(ON) N tr 6.0 VGS = 4.5 V, VDD = −10 V, ID = 540 mA, RG = 10 W td(OFF) tf td(ON) 4.0 16 8.0 P tr VGS = −4.5 V, VDD = 10 V, ID = −215 mA, RG = 10 W td(OFF) ns 10 tf 12 35 19 Drain−Source Diode Characteristics Forward Diode Voltage VSD N P Reverse Recovery Time tRR N P VGS = 0 V, TJ = 25°C VGS = 0 V, dIS/dt = 100 A/ms 4. Switching characteristics are independent of operating junction temperatures http://onsemi.com 3 IS = 350 mA 0.7 1.2 IS = −350 mA −0.8 −1.2 IS = 350 mA 6.5 IS = −350 mA 13 V ns NTZD3155C N−CHANNEL TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted) 1.2 1.8 5.5 V VGS = 1.6 V VGS = 2.0 V to 2.2 V 0.6 VGS = 1.4 V 0.4 0.2 VGS = 1.2 V 0 0 RDS(on), DRAIN−TO−SOURCE CURRENT RESISTANCE (W) ID, DRAIN CURRENT (A) 1.8 V 0.8 2 3 4 5 6 TJ = −55°C 1.4 TJ = 100°C 1.2 1.0 0.8 0.6 0.4 TJ = 25°C 0.2 VGS = 1.0 V 1 VDS w 10 V 1.6 7 8 9 0 0.5 10 1.5 2.0 2.5 VGS, GATE−TO−SOURCE VOLTAGE (V) Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics 3.0 0.9 1.0 ID = 0.54 A TJ = 25°C 0.9 0.8 0.7 0.6 0.5 0.4 2 3 4 5 VGS, GATE−TO−SOURCE VOLTAGE (V) TJ = 25°C 0.8 VGS = 1.8 V 0.7 0.6 VGS = 2.5 V 0.5 VGS = 4.5 V 0.4 0.3 0.2 0.3 1 6 Figure 3. On−Resistance versus Gate−to−Source Voltage 0.4 1 1.2 1000 VGS = 0 V IDSS, LEAKAGE (nA) ID = 0.54 A VGS = 4.5 V 1.8 1.6 1.4 1.2 1 TJ = 150°C 100 TJ = 100°C 0.8 0.6 −50 0.6 0.8 ID, DRAIN CURRENT (A) Figure 4. On−Resistance versus Drain Current and Gate Voltage 2 RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) 1.0 VDS, DRAIN−TO−SOURCE VOLTAGE (V) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) ID, DRAIN CURRENT (A) 1.0 TJ = 25°C 10 −25 0 25 50 75 100 125 150 2 4 6 8 10 12 14 16 18 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current versus Voltage http://onsemi.com 4 20 NTZD3155C TJ = 25°C 150 VGS = 0 V 100 CISS 50 VDS = 0 V COSS 0 0 5 VDS 10 15 20 5 3 8 QGS 1 0 4 ID = 0.54 A TJ = 25°C 0 0.2 0.4 0.6 0.8 1 1.2 1.4 0 1.6 Qg, TOTAL GATE CHARGE (nC) 0.6 IS, SOURCE CURRENT (A) td(OFF) td(ON) tr 1 QGD Figure 8. Gate−to−Source and Drain−to−Source Voltage versus Total Charge VDS = 10 V ID = 0.2 A VGS = 4.5 V t, TIME (ns) 12 2 100 tf 16 VGS Figure 7. Capacitance Variation 1 VDS 4 DRAIN−TO−SOURCE VOLTAGE (V) 10 20 QT VDS, DRAIN−TO−SOURCE VOLTAGE (V) C, CAPACITANCE (pF) 200 VGS, GATE−TO−SOURCE VOLTAGE (V) N−CHANNEL TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted) 10 RG, GATE RESISTANCE (W) 100 0.5 VGS = 0 V TJ = 25°C 0.4 0.3 0.2 0.1 0 0.2 Figure 9. Resistive Switching Time Variation versus Gate Resistance 0.3 0.4 0.5 0.6 0.7 0.8 0.9 VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 10. Diode Forward Voltage versus Current http://onsemi.com 5 1 NTZD3155C P−CHANNEL TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted) 0.8 1 TJ = 25°C VGS = −2 V VDS ≥ −10 V −1.6 V VGS = −1.8 V −ID, DRAIN CURRENT (A) −ID, DRAIN CURRENT (A) 1 0.6 −1.4 V 0.4 −1.2 V 0.2 0.8 0.6 0.4 TJ = −55°C 0.2 −1 V 25°C 0 1 2 3 5 4 6 7 8 9 10 0.5 1 1.5 2 −VGS, GATE−TO−SOURCE VOLTAGE (V) Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics 0.8 ID = −0.43 A TJ = 25°C 0.75 0.7 0.65 0.6 0.55 0.5 0.45 0.4 3 5 4 −VGS, GATE−TO−SOURCE VOLTAGE (V) 2 1 6 1.4 1.2 VGS = −1.8 V 1.1 1.0 0.9 0.8 0.7 VGS = −2.5 V 0.6 0.5 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 −ID, DRAIN CURRENT (A) Figure 4. On−Resistance vs. Drain Current and Gate Voltage 10000 ID = −0.43 A VGS = −4.5 V VGS = 0 V −IDSS, LEAKAGE (nA) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) 1.4 2.5 TJ = 25°C 1.3 Figure 3. On−Resistance vs. Gate−to−Source Voltage 1.6 0 100°C −VDS, DRAIN−TO−SOURCE VOLTAGE (V) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 0 0 1.2 1 TJ = 150°C 1000 TJ = 100°C 100 0.8 0.6 −50 −25 0 25 50 75 100 125 150 10 2 4 6 8 10 12 14 16 18 −VDS, DRAIN−TO−SOURCE VOLTAGE (V) TJ, JUNCTION TEMPERATURE (°C) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 6 20 NTZD3155C VGS = 0 V TJ = 25°C 200 CISS 150 100 COSS 50 CRSS 0 0 5 10 15 20 5 4 9 8 −VGS −VDS 7 6 3 5 4 2 QGD QGS 3 1 0 2 ID = −0.215 A TJ = 25°C 0 0.2 DRAIN−TO−SOURCE VOLTAGE (V) 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 1 2 0 QG, TOTAL GATE CHARGE (nC) Figure 7. Capacitance Variation Figure 8. Gate−to−Source and Drain−to−Source Voltage vs. Total Charge 100 −IS, SOURCE CURRENT (AMPS) 0.6 td(OFF) t, TIME (ns) 10 QT −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) C, CAPACITANCE (pF) 250 −VGS, GATE−TO−SOURCE VOLTAGE (V) P−CHANNEL TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted) tf tr td(ON) 10 VDD = −10 V ID = −0.215 A VGS = −4.5 V 1 1 10 VGS = 0 V TJ = 25°C 0.4 0.2 0 0.3 100 0.4 0.5 0.6 0.7 0.8 0.9 −VSD, SOURCE−TO−DRAIN VOLTAGE (V) RG, GATE RESISTANCE (W) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current http://onsemi.com 7 NTZD3155C PACKAGE DIMENSIONS SOT−563, 6 LEAD CASE 463A ISSUE F D −X− 6 5 1 e 2 A 4 E −Y− 3 b NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. L HE DIM A b C D E e L HE C 5 PL 6 0.08 (0.003) M X Y MILLIMETERS MIN NOM MAX 0.50 0.55 0.60 0.17 0.22 0.27 0.08 0.12 0.18 1.50 1.60 1.70 1.10 1.20 1.30 0.5 BSC 0.10 0.20 0.30 1.50 1.60 1.70 INCHES NOM MAX 0.021 0.023 0.009 0.011 0.005 0.007 0.062 0.066 0.047 0.051 0.02 BSC 0.004 0.008 0.012 0.059 0.062 0.066 MIN 0.020 0.007 0.003 0.059 0.043 SOLDERING FOOTPRINT* 0.3 0.0118 0.45 0.0177 1.35 0.0531 1.0 0.0394 0.5 0.5 0.0197 0.0197 SCALE 20:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5817−1050 http://onsemi.com 8 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NTZD3155C/D