DATA SHEET
www.onsemi.com
Integrated Relay,
Inductive Load Driver
RELAY/INDUCTIVE
LOAD DRIVER
0.5 AMPERE, 8.0 VOLT CLAMP
NUD3105
6
This device is used to switch inductive loads such as relays,
solenoids incandescent lamps , and small DC motors without the need
of a free−wheeling diode. The device integrates all necessary items
such as the MOSFET switch, ESD protection, and Zener clamps. It
accepts logic level inputs thus allowing it to be driven by a large
variety of devices including logic gates, inverters, and
microcontrollers.
1
SOT−23
(TO−236)
CASE 318
SC−74
CASE 318F
STYLE 7
MARKING DIAGRAMS
Features
• Provides a Robust Driver Interface Between DC Relay Coil and
•
•
•
•
•
•
•
Sensitive Logic Circuits
Optimized to Switch Relays from 3.0 V to 5.0 V Rail
Capable of Driving Relay Coils Rated up to 2.5 W at 5.0 V
Internal Zener Eliminates the Need of Free−Wheeling Diode
Internal Zener Clamp Routes Induced Current to Ground for Quieter
Systems Operation
Low VDS(on) Reduces System Current Drain
SZ Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AEC−Q101 Qualified and
PPAP Capable
These Devices are Pb−Free and Halide Free
Typical Applications
• Telecom: Line Cards, Modems, Answering Machines, FAX
• Computers and Office: Photocopiers, Printers, Desktop Computers
• Consumer: TVs and VCRs, Stereo Receivers, CD Players, Cassette
•
•
Recorders
Industrial:Small Appliances, Security Systems, Automated Test
Equipment, Garage Door Openers
Automotive: 5.0 V Driven Relays, Motor Controls, Power Latches,
Lamp Drivers
© Semiconductor Components Industries, LLC, 2014
September, 2022 − Rev. 13
1
JW4 M G
G
JW4 D G
G
1
JW4
M
D
G
= Device Code
= Date Code*
= Date Code
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or overbar may
vary depending upon manufacturing location.
ORDERING INFORMATION
Package
Shipping†
NUD3105LT1G
SOT−23
(Pb−Free)
3000 / Tape &
Reel
NUD3105DMT1G
SOT−74
(Pb−Free)
3000 / Tape &
Reel
SZNUD3105DMT1G
SOT−74
(Pb−Free)
3000 / Tape &
Reel
Device
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Publication Order Number:
NUD3105/D
NUD3105
Drain (3)
Drain (6)
Gate (2)
Gate (1)
Drain (3)
1.0 k
1.0 k
Gate (5)
1.0 k
300 k
300 k
300 k
Source (1)
CASE 318
Source (4)
CASE 318F
Source (2)
Figure 1. Internal Circuit Diagrams
MAXIMUM RATINGS (TJ = 25°C unless otherwise specified)
Symbol
Rating
VDSS
Drain to Source Voltage − Continuous
VGS
Value
Unit
6.0
Vdc
Gate to Source Voltage – Continuous
6.0
Vdc
ID
Drain Current – Continuous
500
mA
Ez
Single Pulse Drain−to−Source Avalanche Energy (TJinitial = 25°C) (Note 2)
50
mJ
Ezpk
Repetitive Pulse Zener Energy Limit (DC v 0.01%) (f = 100 Hz, DC = 0.5)
4.5
mJ
TJ
Junction Temperature
150
°C
TA
Operating Ambient Temperature
−40 to 85
°C
Tstg
Storage Temperature Range
−65 to +150
°C
PD
Total Power Dissipation (Note 1)
Derating Above 25°C
SOT−23
225
1.8
mW
mW/°C
Total Power Dissipation (Note 1)
Derating Above 25°C
SC−74
380
1.5
mW
mW/°C
SOT−23
SC−74
556
329
°C/W
RqJA
Thermal Resistance, Junction−to−Ambient
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. This device contains ESD protection and exceeds the following tests:
Human Body Model 2000 V per MIL_STD−883, Method 3015.
Machine Model Method 200 V.
2. Refer to the section covering Avalanche and Energy.
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Symbol
Characteristic
Min
Typ
Max
Unit
6.0
8.0
9.0
V
OFF CHARACTERISTICS
VBRDSS
Drain to Source Sustaining Voltage (Internally Clamped), (ID = 10 mA)
BVGSO
Ig = 1.0 mA
−
−
8.0
V
IDSS
Drain to Source Leakage Current
(VDS = 5.5 V , VGS = 0 V, TJ = 25°C)
(VDS = 5.5 V, VGS = 0 V, TJ = 85°C )
−
−
−
−
15
15
mA
IGSS
Gate Body Leakage Current (318)
(VGS = 3.0 V, VDS = 0 V)
(VGS = 5.0 V, VDS = 0 V)
5.0
−
−
−
19
50
mA
Gate Body Leakage Current (318F)
(VGS = 3.0 V, VDS = 0 V)
(VGS = 5.0 V, VDS = 0 V)
5.0
−
−
−
35
65
mA
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2
NUD3105
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) (continued)
Symbol
Characteristic
Min
Typ
Max
Unit
0.8
0.8
1.2
−
1.4
1.4
V
−
−
−
−
−
−
−
−
−
−
1.2
1.3
0.9
1.3
0.9
W
300
200
400
−
−
−
mA
350
570
−
mmhos
ON CHARACTERISTICS
VGS(th)
Gate Threshold Voltage
(VGS = VDS, ID = 1.0 mA)
(VGS = VDS, ID = 1.0 mA, TJ = 85°C)
RDS(on)
Drain to Source On−Resistance
(ID = 250 mA, VGS = 3.0 V)
(ID = 500 mA, VGS = 3.0 V)
(ID = 500 mA, VGS = 5.0 V)
(ID = 500 mA, VGS = 3.0 V, TJ = 85°C)
(ID = 500 mA, VGS = 5.0 V, TJ = 85°C)
IDS(on)
gFS
Output Continuous Current
(VDS = 0.25 V, VGS = 3.0 V)
(VDS = 0.25 V, VGS = 3.0 V, TJ = 85°C)
Forward Transconductance
(VOUT = 5.0 V, IOUT = 0.25 A)
DYNAMIC CHARACTERISTICS
Ciss
Input Capacitance
(VDS = 5.0 V,VGS = 0 V, f = 10 kHz)
−
25
−
pF
Coss
Output Capacitance
(VDS = 5.0 V, VGS = 0 V, f = 10 kHz)
−
37
−
pF
Crss
Transfer Capacitance
(VDS = 5.0 V, VGS = 0 V, f = 10 kHz)
−
8.0
−
pF
−
−
25
80
−
−
−
−
44
44
−
−
−
−
23
32
−
−
−
−
53
30
−
−
SWITCHING CHARACTERISTICS
tPHL
tPLH
tPHL
tPLH
tf
tr
tf
tr
Propagation Delay Times:
High to Low Propagation Delay; Figure 1 (5.0 V)
Low to High Propagation Delay; Figure 1 (5.0 V)
nS
High to Low Propagation Delay; Figure 1 (3.0 V)
Low to High Propagation Delay; Figure 1 (3.0 V)
Transition Times:
Fall Time; Figure 1 (5.0 V)
Rise Time; Figure 1 (5.0 V)
nS
Fall Time; Figure 1 (3.0 V)
Rise Time; Figure 1 (3.0 V)
VIH
Vin
50%
0V
tPHL
tPLH
VOH
90%
Vout
50%
10%
VOL
tr
tf
Figure 1. Switching Waveforms
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3
NUD3105
TYPICAL CHARACTERISTICS
10
TJ = 25°C
VGS = 5.0 V
1.0
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
10
VGS = 3.0 V
0.1
VGS = 2.0 V
0.01
0.001
0.01
50°C
0.0001
−40°C
VGS = 1.0 V
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.000001
0.8
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
VDS, DRAIN TO SOURCE VOLTAGE (V)
VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 2. Output Characteristics
Figure 3. Transfer Function
5.0
50
RDS(ON), DRAIN−TO−SOURCE
RESISTANCE (W)
ID = 0.5 A
VGS = 3.0 V
1000
ID = 0.25 A
VGS = 3.0 V
800
600
400
ID = 0.5 A
VGS = 5.0 V
200
0
−50
−25
0
25
50
75
100
125
45
−40°C
ID = 250 mA
40
35
125°C
30
85°C
25
50°C
20
25°C
15
0.8
1.0
1.2
1.4
1.6
1.8
TEMPERATURE (°C)
VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 4. On Resistance Variation vs. Temperature
Figure 5. RDS(ON) Variation with
Gate−To−Source Voltage
IZ = 10 mA
VZ, ZENER CLAMP VOLTAGE (V)
8.18
8.16
8.14
8.12
8.10
8.08
8.06
8.04
8.02
8.00
−50
2.0
13.0
8.20
VZ, ZENER VOLTAGE (V)
85°C
0.001
0.00001
1200
RDS(ON), DRAIN−TO−SOURCE
RESISTANCE (mW)
0.1
25°C
0.0001
0.00001
VDS = 0.8 V
1.0
−25
0
25
50
75
100
125
VGS = 0 V
12.0
−40°C
11.0
25°C
10.0
9.0
8.0
7.0
85°C
6.0
0.1
1.0
10
100
1000
TEMPERATURE (°C)
IZ, ZENER CURRENT (mA)
Figure 6. Zener Voltage vs. Temperature
Figure 7. Zener Clamp Voltage vs. Zener Current
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4
NUD3105
TYPICAL CHARACTERISTICS (continued)
1.2
40
35
125°C
IGSS, GATE LEAKAGE (mA)
RDS(ON), DRAIN−TO−SOURCE
RESISTANCE (W)
1.1
1.0
0.9
85°C
0.8
50°C
0.7
25°C
0.6
−40°C
0.5
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4 0.45
0.5
30
25
VGS = 5.0 V
20
15
VGS = 3.0 V
10
5
0
−50
0
−25
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
50
75
100
125
TEMPERATURE (°C)
Figure 8. On−Resistance vs. Drain Current and
Temperature
1.0
25
VGS = 3.0 V, TC = 25°C
Figure 9. Gate Leakage vs. Temperature
ID−Continuous = 0.5 A
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
DC
PW = 0.1 s
DC = 50%
0.1
PW = 10 ms
DC = 20%
PW = 7.0 ms
DC = 5%
Typical
IZ vs. VZ
V(BR)DSS min = 6.0 V
0.01
0.01
0.1
10
1.0
100
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 10. Safe Operating Area
r(t), TRANSIENT THERMAL
RESISTANCE (NORMALIZED)
1.0
D = 0.5
0.2
0.1
0.1
0.05
Pd(pk)
0.02
0.01
0.01
0.001
0.01
PW
SINGLE PULSE
0.1
t1
t2
PERIOD
DUTY CYCLE = t1/t2
1.0
10
100
1000
t1, PULSE WIDTH (ms)
Figure 11. Transient Thermal Response
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5
10,000
100,000
1,000,000
NUD3105
Designing with this Data Sheet
4. Verify that the circuit driving the gate will meet
the VGS(th) from the Electrical Characteristics
table.
5. Using the max output current calculated in step 1,
check Figure 7 to insure that the range of Zener
clamp voltage over temperature will satisfy all
system & EMI requirements.
6. Use IGSS and IDSS from the Electrical
Characteristics table to ensure that “OFF” state
leakage over temperature and voltage extremes
does not violate any system requirements.
7. Review circuit operation and insure none of the
device max ratings are being exceeded.
1. Determine the maximum inductive load current (at
max VCC, min coil resistance & usually minimum
temperature) that the NUD3105 will have to drive
and make sure it is less than the max rated current.
2. For pulsed operation, use the Transient Thermal
Response of Figure 11 and the instructions with it
to determine the maximum limit on transistor
power dissipation for the desired duty cycle and
temperature range.
3. Use Figures 10 and 11 with the SOA notes to
insure that instantaneous operation does not push
the device beyond the limits of the SOA plot.
APPLICATIONS DIAGRAMS
+3.0 ≤ VDD ≤ +3.75 Vdc
+4.5 ≤ VCC ≤ +5.5 Vdc
+
+
Vout (3)
Vout (3)
NUD3105
NUD3105
Vin (1)
Vin (1)
GND (2)
GND (2)
Figure 12. A 200 mW, 5.0 V Dual Coil Latching Relay Application
with 3.0 V Level Translating Interface
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6
NUD3105
Max Continuous Current Calculation
for TX2−5V Relay, R1 = 178 W Nominal @ RA = 25°C
Assuming ±10% Make Tolerance,
R1 = 178 W * 0.9 = 160 W Min @ TA = 25°C
−
TC for Annealed Copper Wire is 0.4%/°C
−
AROMAT
JS1E−5V
R1 = 160 W * [1+(0.004) * (−40°−25°)] = 118 W Min @ −40°C
IO Max = (5.5 V Max − 0.25V) /118 W = 45 mA
+4.5 TO +5.5 Vdc
AROMAT
JS1E−5V
+
+
+
+
+4.5 TO +5.5 Vdc
+
AROMAT
JS1E−5V
AROMAT
JS1E−5V
AROMAT
TX2−5V
−
−
−
Vout (3)
Vout (3)
NUD3105
NUD3105
Vin (1)
Vin (1)
GND (2)
GND (2)
Figure 13. A 140 mW, 5.0 V Relay with TTL Interface
Figure 14. A Quad 5.0 V, 360 mW Coil Relay Bank
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7
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318−08
ISSUE AS
DATE 30 JAN 2018
SCALE 4:1
D
0.25
3
E
1
2
T
HE
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH.
MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF
THE BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
DIM
A
A1
b
c
D
E
e
L
L1
HE
T
L
3X b
L1
VIEW C
e
TOP VIEW
A
A1
SIDE VIEW
SEE VIEW C
c
MIN
0.89
0.01
0.37
0.08
2.80
1.20
1.78
0.30
0.35
2.10
0°
MILLIMETERS
NOM
MAX
1.00
1.11
0.06
0.10
0.44
0.50
0.14
0.20
2.90
3.04
1.30
1.40
1.90
2.04
0.43
0.55
0.54
0.69
2.40
2.64
−−−
10 °
MIN
0.035
0.000
0.015
0.003
0.110
0.047
0.070
0.012
0.014
0.083
0°
INCHES
NOM
0.039
0.002
0.017
0.006
0.114
0.051
0.075
0.017
0.021
0.094
−−−
MAX
0.044
0.004
0.020
0.008
0.120
0.055
0.080
0.022
0.027
0.104
10°
GENERIC
MARKING DIAGRAM*
END VIEW
RECOMMENDED
SOLDERING FOOTPRINT
XXXMG
G
1
3X
2.90
3X
XXX = Specific Device Code
M = Date Code
G
= Pb−Free Package
0.90
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
0.95
PITCH
0.80
DIMENSIONS: MILLIMETERS
STYLE 1 THRU 5:
CANCELLED
STYLE 6:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
STYLE 7:
PIN 1. EMITTER
2. BASE
3. COLLECTOR
STYLE 9:
PIN 1. ANODE
2. ANODE
3. CATHODE
STYLE 10:
PIN 1. DRAIN
2. SOURCE
3. GATE
STYLE 11:
STYLE 12:
PIN 1. ANODE
PIN 1. CATHODE
2. CATHODE
2. CATHODE
3. CATHODE−ANODE
3. ANODE
STYLE 15:
PIN 1. GATE
2. CATHODE
3. ANODE
STYLE 16:
PIN 1. ANODE
2. CATHODE
3. CATHODE
STYLE 17:
PIN 1. NO CONNECTION
2. ANODE
3. CATHODE
STYLE 18:
STYLE 19:
STYLE 20:
PIN 1. NO CONNECTION PIN 1. CATHODE
PIN 1. CATHODE
2. CATHODE
2. ANODE
2. ANODE
3. GATE
3. ANODE
3. CATHODE−ANODE
STYLE 21:
PIN 1. GATE
2. SOURCE
3. DRAIN
STYLE 22:
PIN 1. RETURN
2. OUTPUT
3. INPUT
STYLE 23:
PIN 1. ANODE
2. ANODE
3. CATHODE
STYLE 24:
PIN 1. GATE
2. DRAIN
3. SOURCE
STYLE 27:
PIN 1. CATHODE
2. CATHODE
3. CATHODE
STYLE 28:
PIN 1. ANODE
2. ANODE
3. ANODE
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42226B
SOT−23 (TO−236)
STYLE 8:
PIN 1. ANODE
2. NO CONNECTION
3. CATHODE
STYLE 13:
PIN 1. SOURCE
2. DRAIN
3. GATE
STYLE 25:
PIN 1. ANODE
2. CATHODE
3. GATE
STYLE 14:
PIN 1. CATHODE
2. GATE
3. ANODE
STYLE 26:
PIN 1. CATHODE
2. ANODE
3. NO CONNECTION
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−74
CASE 318F
ISSUE P
6
1
SCALE 2:1
DATE 07 OCT 2021
GENERIC
MARKING DIAGRAM*
XXX MG
G
XXX
M
G
= Specific Device Code
= Date Code
= Pb−Free Package
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
STYLE 1:
PIN 1. CATHODE
2. ANODE
3. CATHODE
4. CATHODE
5. ANODE
6. CATHODE
STYLE 2:
PIN 1. NO CONNECTION
2. COLLECTOR
3. EMITTER
4. NO CONNECTION
5. COLLECTOR
6. BASE
STYLE 3:
PIN 1. EMITTER 1
2. BASE 1
3. COLLECTOR 2
4. EMITTER 2
5. BASE 2
6. COLLECTOR 1
STYLE 4:
PIN 1. COLLECTOR 2
2. EMITTER 1/EMITTER 2
3. COLLECTOR 1
4. EMITTER 3
5. BASE 1/BASE 2/COLLECTOR 3
6. BASE 3
STYLE 5:
PIN 1. CHANNEL 1
2. ANODE
3. CHANNEL 2
4. CHANNEL 3
5. CATHODE
6. CHANNEL 4
STYLE 7:
PIN 1. SOURCE 1
2. GATE 1
3. DRAIN 2
4. SOURCE 2
5. GATE 2
6. DRAIN 1
STYLE 8:
PIN 1. EMITTER 1
2. BASE 2
3. COLLECTOR 2
4. EMITTER 2
5. BASE 1
6. COLLECTOR 1
STYLE 9:
PIN 1. EMITTER 2
2. BASE 2
3. COLLECTOR 1
4. EMITTER 1
5. BASE 1
6. COLLECTOR 2
STYLE 10:
PIN 1. ANODE/CATHODE
2. BASE
3. EMITTER
4. COLLECTOR
5. ANODE
6. CATHODE
STYLE 11:
PIN 1. EMITTER
2. BASE
3. ANODE/CATHODE
4. ANODE
5. CATHODE
6. COLLECTOR
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42973B
SC−74
STYLE 6:
PIN 1. CATHODE
2. ANODE
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
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A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
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