NUF2441FCT1G

NUF2441FC Integrated Passive Filter with ESD Protection This device is designed for cell phone applications requiring Headset and Speaker Phone, EMI Filtering and ESD Protection. This device offers an integrated solution in a small package reducing PCB space and cost. http://onsemi.com CIRCUIT DESCRIPTION Features:  Provides EMI Filtering and ESD Protection  Single IC Offers Cost Savings by Replacing 2 Inductors, B2 4 Capacitors, and 4 TVs Diodes C1  Compliance with IEC61000--4--2, (Level 4)     C2 L B1 30 kV (Contact), 30 kV (air) Flip--Chip Package Moisture Sensitivity Level 1 ESD Ratings: Machine Model = C ESD Ratings: Human Body Model = 3B Pb--Free Package is Available* B3 A1 A3 C1 L C2 A2 MARKING DIAGRAM Benefits:  Flip--Chip Package Minimizes PCB Space  Integrated Circuit Increases System Reliability versus Discrete Component Implementation  TVs Devices Provide ESD Protection That is Better than a Discrete Implementation because the Small IC minimizes Parasitic Inductances Typical Applications:  Cell Phones  Communication Circuits A1 2441 A Y WW Symbol Value Unit ESD Discharge IEC61000--4--2 Contact Discharge Air Discharge Vpp Operating Temperature Range TJ --40 to +125 C Storage Temperature Range Tstg --55 to +150 C Lead Solder Temperature (10 second duration) TL 260 C 30 30 B1 A2 B2 A3 B3 (Bump View) ORDERING INFORMATION Package *For additional information on our Pb--Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.  Semiconductor Components Industries, LLC, 2010 A1 kV Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. November, 2010 -- Rev. 5 = Specific Device Code = Assembly Location = Year = Work Week PIN CONFIGURATION MAXIMUM RATINGS (TA = 25C) Rating 2441AYWW Flip--Chip CASE 499J 1 Device Shipping† NUF2441FCT1 Flip--Chip 3000/Tape & Reel NUF2441FCT1G Flip--Chip (Pb--Free) 3000/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Publication Order Number: NUF2441FC/D NUF2441FC ELECTRICAL CHARACTERISTICS (TA = 25C) Device Device Marking VRWM (Volts) Min Max Max IR @ VRWM = 12 V I/O Pin (mA) 2441 12 13.7 17.7 0.1 NUF2441FCT1G 1. 2. 3. 4. VBR @ 1 mA (Volts) Typical Pass--Band Inductance L (nH) 250 2.9 Equivalent Series Resistance RS (Ω) (Note 2) Typ Max 0.28 0.35 Measured at 25C, VR = 0, f = 1 MHz, Source A1, GND A2, Open A3. Measured at room temperature. Tolerance = 20%. Measured under zero light conditions. 5 0 0 --10 --5 --20 (S41) dB --10 (S21) dB Typical Capacitance C1 + C2 (pF) (Notes 1, 3, 4) --15 --20 --25 --30 --40 --30 --50 --35 --40 1.0E+06 1.0E+07 1.0E+09 1.0E+08 FREQUENCY (Hz) --60 1.0E+06 1.0E+10 1.0E+07 Figure 1. Insertion Loss Characteristic 1.0E+09 1.0E+08 FREQUENCY (Hz) 1.0E+10 Figure 2. Analog Crosstalk 0.35 300 0.34 0.33 RESISTANCE (Ω) CAPACITANCE (pF) 250 200 150 100 0.31 0.30 0.29 0.28 0.27 50 0 0.32 0.26 0 2 4 6 8 10 12 0.25 14 0 10 REVERSE VOLTAGE (V) 20 30 40 50 60 70 80 TEMPERATURE (C) Figure 3. Typical Line Capacitance vs. Reverse Bias Voltage Figure 4. Typical Resistance vs. Temperature http://onsemi.com 2 90 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS 6 PIN FLIP−CHIP 1.72x1.22mm, 0.5 PITCH CASE 499J−01 ISSUE O A1 DATE 05 FEB 2004 SCALE 4:1 D 4X 0.10 C TERMINAL A1 LOCATOR A ÈÈ NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. COPLANARITY APPLIES TO SPHERICAL CROWNS OF SOLDER BALLS. B E MILLIMETERS DIM MIN MAX A −−− 0.700 A1 0.210 0.270 A2 0.380 0.430 D 1.720 BSC E 1.220 BSC b 0.290 0.340 e 0.500 BSC D1 1.000 BSC TOP VIEW A2 A1 0.10 C A 0.05 C SIDE VIEW C GENERIC MARKING DIAGRAM* SEATING PLANE È D1 TBD e B 6X b A 1 0.05 C A B 0.03 C 2 3 xx A WL, L YY, Y WW, W e BOTTOM VIEW = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week *This information is generic. Please refer to device data sheet for actual part marking. DOCUMENT NUMBER: DESCRIPTION: 98AON13950D Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. 6 PIN FLIP−CHIP, 1.72x1.22mm, 0.5 PITCH PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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