NUF6406MNT1G

NUF6406MN Low Capacitance 6 Line EMI Filter with ESD Protection This device is a 6 line EMI filter array for wireless applications. Greater than −30 dB attenuation is obtained at frequencies from 800 MHz to 2.4 GHz. It also offers ESD protection−clamping transients from static discharges. ESD protection is provided across all capacitors. Features http://onsemi.com 1 Cd Cd 12 • EMI Filtering and ESD Protection • Integration of 30 Discrete Components • Compliance with IEC61000−4−2 (Level 4) • • • • > 8.0 kV (Contact) DFN Package, 1.35 x 3.0 mm Moisture Sensitivity Level 1 ESD Ratings: Machine Model = C Human Body Model = 3B This is a Pb−Free Device* 2 Cd Cd 11 3 Cd Cd 10 4 Cd Cd 9 Benefits 5 Cd Cd 8 • Reduces EMI/RFI Emissions on a Data Line • Integrated Solution Offers Cost and Space Savings in a DFN Package • Reduces Parasitic Inductances Which Offer a More “Ideal” Low Pass • • • • • • • Filter Response Integrated Solution Improves System Reliability Compatible Footprint to BGA or Flip−Chip Package EMI Filtering and ESD Protection for Data Lines Wireless Phones PDAs and Handheld Products Notebook Computers LCD Displays 1 2 3 4 5 6 6 Cd Cd 7 (Top View) Applications MARKING DIAGRAM 12 1 1 DFN12 CASE 506AD 64 06 MG G GND 6406 = Specific Device Code M = Month G = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION 12 11 10 9 8 (Bottom View) 7 Device NUF6406MNT1G *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Package DFN12 (Pb−Free) Shipping† 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2005 1 June, 2005 − Rev. 2 Publication Order Number: NUF6406MN/D NUF6406MN MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Parameter ESD Discharge IEC61000−4−2 Operating Temperature Range Storage Temperature Range Maximum Lead Temperature for Soldering Purposes (1.8 in from case for 10 seconds) Contact Discharge Symbol VPP TOP TSTG TL Value 8.0 −40 to 85 −55 to 150 260 Unit kV °C °C °C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Parameter Maximum Reverse Working Voltage Breakdown Voltage Leakage Current Resistance Capacitance (Notes 1 and 2) Cut−Off Frequency (Note 3) Symbol VRWM VBR IR RA Cd f3dB IR = 1.0 mA VRWM = 3.0 V IR = 20 mA VR = 2.5 V, f = 1.0 MHz Above this frequency, appreciable attenuation occurs 85 100 13 138 6.0 7.0 1.0 115 16 Test Conditions Min Typ Max 5.0 Unit V V mA W pF MHz 1. Measured at 25°C, VR = 2.5 V, f = 1.0 MHz. 2. Total line capacitance is 2 times the Diode Capacitance (Cd). 3. 50 W source and 50 W load termination. http://onsemi.com 2 NUF6406MN 0 −5 −10 −15 S21 (dB) −20 −25 −30 −35 −40 −45 1.E+06 1.E+07 1.E+08 FREQUENCY (Hz) 1.E+09 1.E+10 S41 (dB) 0 10 −20 −30 −40 −50 −60 −70 −80 1.E+06 1.E+07 1.E+08 FREQUENCY (Hz) 1.E+09 1.E+10 Figure 1. Insertion Loss Characteristic Figure 2. Analog Crosstalk 2 NORMALIZED CAPACITANCE 110 108 RESISTANCE (W) 1.5 106 104 102 100 98 96 94 92 1 0.5 0 0 1 2 3 4 5 REVERSE VOLTAGE (V) 90 −40 −20 0 20 40 60 80 TEMPERATURE (°C) Figure 3. Typical Capacitance vs. Reverse Biased Voltage (Normalized Capacitance, Cd @ 2.5 V) Figure 4. Typical Resistance over Temperature http://onsemi.com 3 NUF6406MN PACKAGE DIMENSIONS DFN12 3.0*1.35*0.85 CASE 506AD−01 ISSUE F 0.15 C A B D (A3) NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. 5. EXPOSED PADS CONNECTED TO DIE FLAG. USED AS TEST CONTACTS. MILLIMETERS MIN MAX 0.80 1.00 0.00 0.05 0.20 REF 0.18 0.30 3.00 BSC 2.10 2.30 1.35 BSC 0.20 0.40 0.50 BSC 0.20 −−− 0.20 0.40 2X E 2X EXPOSED Cu 0.15 C PIN ONE REFERENCE TOP VIEW 0.10 C 12 X (A3) A 0.08 C 2X 0.2 X 0.25 MM NOTE 5 12 X SIDE VIEW A1 D2 1 SEATING PLANE C DIM A A1 A3 b D D2 E E2 e K L L e EXPOSED PAD 6 E2 12 X K 12 7 12 X b SOLDERING FOOTPRINT* 2.352 0.093 BOTTOM VIEW 0.10 C A B 0.05 C NOTE 3 0.351 0.014 0.265 0.01 0.479 0.019 SCALE 16:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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