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NUP2114UCMR6T1G

NUP2114UCMR6T1G

  • 厂商:

    ONSEMI(安森美)

  • 封装:

    SOT23-6

  • 描述:

    TVS DIODE 5VWM 10VC 6TSOP

  • 数据手册
  • 价格&库存
NUP2114UCMR6T1G 数据手册
NUP2114UCMR6 Transient Voltage Suppressors Low Capacitance ESD Protection for High Speed Data The NUP2114UCMR6 transient voltage suppressor is designed to protect high speed data lines from ESD. Ultra−low capacitance and high level of ESD protection makes this device well suited for use in USB 2.0 high speed applications. Features http://onsemi.com I/O VP • • • • • • • • • • • • Low Capacitance 0.8 pF Low Clamping Voltage Stand Off Voltage: 5 V Low Leakage ESD Rating of Class 3B (Exceeding 8 kV) per Human Body model and Class C (Exceeding 400 V) per Machine Model IEC61000−4−2 Level 4 UL Flammability Rating of 94 V−0 This is a Pb−Free Device High Speed Communication Line Protection USB 2.0 High Speed Data Line and Power Line Protection Gigabit Ethernet Notebook Computers I/O MARKING DIAGRAM 1 TSOP−6 CASE 318G P2M MG G 1 Typical Applications P2M = Specific Device Code M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Operating Junction Temperature Range Storage Temperature Range Lead Solder Temperature − Maximum (10 Seconds) Human Body Model (HBM) Machine Model (MM) IEC61000−4−2 Contact IEC61000−4−2 Air Symbol TJ Tstg TL ESD Value − 40 to +125 − 55 to +150 260 16000 400 13000 15000 Unit °C °C °C V NC I/O PIN CONNECTIONS 1 6 I/O VN 2 5 VP NC 3 4 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. See Application Note AND8308/D for further description of survivability specs. ORDERING INFORMATION Device NUP2114UCMR6T1G Package TSOP−6 (Pb−Free) Shipping 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2010 January, 2010 − Rev. 4 1 Publication Order Number: NUP2114UCMR6/D NUP2114UCMR6 ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Symbol IPP VC VRWM IR VBR IT IF VF Ppk C Parameter Maximum Reverse Peak Pulse Current Clamping Voltage @ IPP Working Peak Reverse Voltage Maximum Reverse Leakage Current @ VRWM Breakdown Voltage @ IT Test Current Forward Current Forward Voltage @ IF Peak Power Dissipation Max. Capacitance @ VR = 0 and f = 1.0 MHz IPP VC VBR VRWM IR VF IT V IF I *See Application Note AND8308/D for detailed explanations of datasheet parameters. Uni−Directional TVS ELECTRICAL CHARACTERISTICS (TJ=25°C unless otherwise specified) Parameter Reverse Working Voltage Breakdown Voltage Reverse Leakage Current Clamping Voltage Clamping Voltage Maximum Peak Pulse Current Junction Capacitance Junction Capacitance Clamping Voltage Clamping Voltage Symbol VRWM VBR IR VC VC IPP CJ CJ VC VC (Note 1) IT = 1 mA, (Note 2) VRWM = 5 V IPP = 5 A (Note 3) IPP = 8 A (Note 3) 8x20 ms Waveform VR = 0 V, f = 1 MHz between I/O Pins and GND VR = 0 V, f = 1 MHz between I/O Pins @ IPP = 1 A (Note 4) Per IEC 61000−4−2 (Note 5) Figures 1 and 2 0.8 9.0 10 12 1.0 0.5 12 6.0 7.5 1.0 Conditions Min Typ Max 5.0 Unit V V mA V V A pF pF V V 1. TVS devices are normally selected according to the working peak reverse voltage (VRWM), which should be equal or greater than the DC or continuous peak operating voltage level. 2. VBR is measured at pulse test current IT. 3. Nonrepetitive current pulse (Pin 5 to Pin 2) 4. Surge current waveform per Figure 5. 5. Typical waveform. For test procedure see Figures 3 and 4 and Application Note AND8307/D. Figure 1. ESD Clamping Voltage Screenshot Positive 8 kV Contact per IEC61000−4−2 Figure 2. ESD Clamping Voltage Screenshot Negative 8 kV Contact per IEC61000−4−2 http://onsemi.com 2 NUP2114UCMR6 IEC 61000−4−2 Spec. Test Voltage (kV) 2 4 6 8 First Peak Current (A) 7.5 15 22.5 30 Current at 30 ns (A) 4 8 12 16 Current at 60 ns (A) 2 4 6 8 I @ 60 ns 10% tP = 0.7 ns to 1 ns I @ 30 ns IEC61000−4−2 Waveform Ipeak 100% 90% Level 1 2 3 4 Figure 3. IEC61000−4−2 Spec ESD Gun TVS Oscilloscope 50 W Cable 50 W Figure 4. Diagram of ESD Test Setup The following is taken from Application Note AND8308/D − Interpretation of Datasheet Parameters for ESD Devices. ESD Voltage Clamping For sensitive circuit elements it is important to limit the voltage that an IC will be exposed to during an ESD event to as low a voltage as possible. The ESD clamping voltage is the voltage drop across the ESD protection diode during an ESD event per the IEC61000−4−2 waveform. Since the IEC61000−4−2 was written as a pass/fail spec for larger 100 % OF PEAK PULSE CURRENT 90 80 70 60 50 40 30 20 10 0 0 20 tP tr systems such as cell phones or laptop computers it is not clearly defined in the spec how to specify a clamping voltage at the device level. ON Semiconductor has developed a way to examine the entire voltage waveform across the ESD protection diode over the time domain of an ESD pulse in the form of an oscilloscope screenshot, which can be found on the datasheets for all ESD protection diodes. For more information on how ON Semiconductor creates these screenshots and how to interpret them please refer to AND8307/D. PEAK VALUE IRSM @ 8 ms PULSE WIDTH (tP) IS DEFINED AS THAT POINT WHERE THE PEAK CURRENT DECAY = 8 ms HALF VALUE IRSM/2 @ 20 ms Figure 5. 8 X 20 ms Pulse Waveform 40 t, TIME (ms) 60 80 http://onsemi.com 3 NUP2114UCMR6 Figure 6. 500 MHz Data Pattern http://onsemi.com 4 NUP2114UCMR6 PACKAGE DIMENSIONS TSOP−6 CASE 318G−02 ISSUE U D H 6 5 4 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSIONS D AND E1 ARE DETERMINED AT DATUM H. 5. PIN ONE INDICATOR MUST BE LOCATED IN THE INDICATED ZONE. DIM A A1 b c D E E1 e L L2 M MIN 0.90 0.01 0.25 0.10 2.90 2.50 1.30 0.85 0.20 0° MILLIMETERS NOM MAX 1.00 1.10 0.06 0.10 0.38 0.50 0.18 0.26 3.00 3.10 2.75 3.00 1.50 1.70 0.95 1.05 0.40 0.60 0.25 BSC 1 0° − L2 E GAUGE PLANE E1 NOTE 5 0.05 A1 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative ÉÉÉ ÉÉÉ 1 2 3 L b M C e DETAIL Z SEATING PLANE A c DETAIL Z RECOMMENDED SOLDERING FOOTPRINT* 0.60 6X 3.20 0.95 6X 0.95 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 5 NUP2114UCMR6/D
NUP2114UCMR6T1G 价格&库存

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NUP2114UCMR6T1G

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      NUP2114UCMR6T1G

        库存:12000