NVB125N65S3

MOSFET – Power, N-Channel, SUPERFET) III, Automotive, Easy-drive 650 V, 24 A, 125 mW NVB125N65S3 www.onsemi.com Description SUPERFET III MOSFET is ON Semiconductor’s brand−new high voltage super−junction (SJ) MOSFET family that is utilizing charge balance technology for outstanding low on−resistance and lower gate charge performance. This advanced technology is tailored to minimize conduction loss, provides superior switching performance, and withstand extreme dv/dt rate. Consequently, SUPERFET III MOSFET Easy drive series helps manage EMI issues and allows for easier design implementation. VDSS RDS(ON) MAX ID MAX 650 V 125 mW @ 10 V 24 A D Features • • • • • • • AEC−Q101 Qualified 700 V @ TJ = 150°C Typ. RDS(on) = 105 mW Ultra Low Gate Charge (Typ. Qg = 46 nC) Low Effective Output Capacitance (Typ. Coss(eff.) = 439 pF) 100% Avalanche Tested These Devices are Pb−Free and are RoHS Compliant G S POWER MOSFET D Applications • Automotive On Board Charger • Automotive DC/DC Converter for HEV G S D2PAK CASE 418AJ MARKING DIAGRAM $Y&Z&3&K NVB 125N65S3 $Y &Z &3 &K NVB125N65S3 = ON Semiconductor Logo = Assembly Plant Code = Data Code (Year & Week) = Lot = Specific Device Code ORDERING INFORMATION See detailed ordering and shipping information on page 2 of this data sheet. © Semiconductor Components Industries, LLC, 2019 April, 2020 − Rev. 0 1 Publication Order Number: NVB125N65S3/D NVB125N65S3 ABSOLUTE MAXIMUM RATINGS (TC = 25°C, Unless otherwise noted) Symbol Parameter VDSS Drain to Source Voltage VGSS Gate to Source Voltage ID Drain Current Value Unit 650 V − DC ±30 V − AC (f > 1 Hz) ±30 − Continuous (TC = 25°C) 24 − Continuous (TC = 100°C) 15 IDM Drain Current 60 A EAS Single Pulsed Avalanche Energy (Note 2) 115 mJ IAS Avalanche Current (Note 2) 3.7 A EAR Repetitive Avalanche Energy (Note 1) 1.81 mJ dv/dt MOSFET dv/dt 100 V/ns Peak Diode Recovery dv/dt (Note 3) 20 PD TJ, TSTG TL − Pulsed (Note 1) A Power Dissipation (TC = 25°C) 181 W − Derate Above 25°C 1.45 W/°C −55 to +150 °C 300 °C Operating and Storage Temperature Range Maximum Lead Temperature for Soldering, 1/8″ from Case for 5 seconds Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Repetitive rating: pulse−width limited by maximum junction temperature. 2. IAS = 3.7 A, RG = 25 W, starting TJ = 25°C. 3. ISD ≤ 12 A, di/dt ≤ 200 A/ms, VDD ≤ 400 V, starting TJ = 25°C. THERMAL CHARACTERISTICS Symbol Parameter Value Unit RqJC Thermal Resistance, Junction to Case, Max. 0.69 _C/W RqJA Thermal Resistance, Junction to Ambient, Max. 40 PACKAGE MARKING AND ORDERING INFORMATION Part Number Top Marking Package Reel Size Tape Width Shipping† NVB125N65S3 NVB125N65S3 D2−PAK 330 mm 24 mm 800 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 2 NVB125N65S3 ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted) Parameter Symbol Test Conditions Min. Typ. Max. Unit OFF CHARACTERISTICS BVDSS Drain to Source Breakdown Voltage VGS = 0 V, ID = 1 mA, TJ = 25_C 650 V VGS = 0 V, ID = 1 mA, TJ = 150_C 700 V DBVDSS / DTJ Breakdown Voltage Temperature Coefficient ID = 1 mA, Referenced to 25_C IDSS Zero Gate Voltage Drain Current VDS = 650 V, VGS = 0 V IGSS Gate to Body Leakage Current 0.68 V/_C 1 mA ±100 nA 4.5 V 125 mW 1.35 VDS = 520 V, TC = 125_C VGS = ±30 V, VDS = 0 V ON CHARACTERISTICS VGS(th) Gate Threshold Voltage VGS = VDS, ID = 0.59 mA RDS(on) Static Drain to Source On Resistance VGS = 10 V, ID = 12 A 105 Forward Transconductance VDS = 20 V, ID = 12 A 16 S 1940 pF 40 pF gFS 2.5 DYNAMIC CHARACTERISTICS Ciss Input Capacitance Coss Output Capacitance VDS = 400 V, VGS = 0 V, f = 1 MHz Coss(eff.) Effective Output Capacitance VDS = 0 V to 400 V, VGS = 0 V 439 pF Coss(er.) Energy Related Output Capacitance VDS = 0 V to 400 V, VGS = 0 V 62 pF Total Gate Charge at 10 V VDS = 400 V, ID = 12 A, VGS = 10 V (Note 4) 46 nC 12 nC 19 nC f = 1 MHz 0.5 W VDD = 400 V, ID = 12 A, VGS = 10 V, Rg = 4.7 W (Note 4) 21 ns 19 ns Qg(tot) Qgs Gate to Source Gate Charge Qgd Gate to Drain “Miller” Charge ESR Equivalent Series Resistance SWITCHING CHARACTERISTICS td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time 48 ns Turn-Off Fall Time 4.6 ns tf SOURCE-DRAIN DIODE CHARACTERISTICS Maximum Continuous Source to Drain Diode Forward Current 24 A ISM Maximum Pulsed Source to Drain Diode Forward Current 60 A VSD Source to Drain Diode Forward Voltage VGS = 0 V, ISD = 12 A 1.2 V trr Reverse Recovery Time Qrr Reverse Recovery Charge VDD = 400 V, ISD = 12 A, dIF/dt = 100 A/ms IS 339 ns 5.7 mC Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Essentially independent of operating temperature typical characteristics. www.onsemi.com 3 NVB125N65S3 TYPICAL CHARACTERISTICS VGS = 20 V ID, DRAIN CURRENT (A) 6.5 V 6.0 V 10 5.5 V 8.0 V 1 0.1 0.1 100 ID, DRAIN CURRENT (A) 100 VGS = 10 V 7.0 V 1 6.0 V 0.1 4 5 6 7 8 9 VGS, GATE−TO−SOURCE VOLTAGE (V) 0.4 TC = 25°C 0.3 VGS = 10 V 0.2 VGS = 20 V 0.1 0 0 CAPACITANCE (pF) IS, REVERSE DRAIN CURRENT (A) TJ = 25°C TJ = −55°C 0.5 50 60 Ciss 1K 100 10 0.1 1.5 1.0 Coss VGS = 0 V f = 1 MHz Crss Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 1 0 40 10K 0.01 0.001 30 100K 1 0.1 20 Figure 4. On−Resistance Variation vs. Drain Current and Gate Voltage VGS = 0 V 250 ms Pulse Test TJ = 150°C 10 ID, DRAIN CURRENT (A) Figure 3. Transfer Characteristics 10 10 Figure 2. On−Region Characteristics 1505C TJ = −55°C 100 1 Figure 1. On−Region Characteristics 255C TJ = 25°C 3 1 VDS, DRAIN−SOURCE VOLTAGE (V) TJ = 150°C 1 10 V 8.0 V 7.0 V 6.5 V 5.5 V VDS, DRAIN−SOURCE VOLTAGE (V) VDS = 20 V 250 ms Pulse Test 10 10 0.1 10 RDS(on), DRAIN−SOURCE ON−RESISTANCE (W) ID, DRAIN CURRENT (A) 100 0.1 1 10 100 VSD, BODY DIODE FORWARD VOLTAGE (V) VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. Body Diode Forward Voltage Variation vs. Source Current and Temperature Figure 6. Capacitance Characteristics www.onsemi.com 4 1K NVB125N65S3 8 VDS = 400 V 6 4 2 0 0 RDS(on), DRAIN−SOURCE ON−RESISTANCE (Normalized) 2.5 2.0 10 20 30 40 50 1.2 1.1 1.0 0.9 0.8 −50 0 50 100 150 TJ, JUNCTION TEMPERATURE (°C) Figure 7. Gate Charge Characteristics Figure 8. Breakdown Voltage Variation vs. Temperature 100 ID = 12 A VGS = 10 V RDS(on) Limit 1.0 0.5 −50 0 50 100 1 ms 100 ms 1 0.1 0.01 150 100 ms 10 10 ms DC TC = 25°C Single Pulse RqJC = 0.69°C/W 1 10 100 1000 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−SOURCE VOLTAGE (V) Figure 9. On−Resistance Variation vs. Temperature Figure 10. Maximum Safe Operating Area 10 20 8 15 6 EOSS (mJ) 25 10 4 2 5 0 VGS = 0 V ID = 10 mA QG, TOTAL GATE CHARGE (nC) 1.5 0 ID, DRAIN CURRENT (A) VDS = 130 V ID = 12 A ID, DRAIN CURRENT (A) VGS, GATE−SOURCE VOLTAGE (V) 10 BVDSS, DRAIN−TO−SOURCE BREAKDOWN VOLTAGE (Normalized) TYPICAL CHARACTERISTICS 25 50 75 100 125 0 150 0 130 260 390 520 650 TC, CASE TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 11. Maximum Drain Current vs. Case Temperature Figure 12. EOSS vs. Drain−to−Source Voltage www.onsemi.com 5 NVB125N65S3 TYPICAL CHARACTERISTICS 1000 IDM, PEAK CURRENT (A) 1.0 0.8 0.6 0.4 0.2 0 0 25 50 75 100 10 150 0.00001 0.0001 0.001 0.01 0.1 1 Figure 13. Normalized Power Dissipation vs. Case Temperature Figure 14. Peak Current Capability ID = 12 A 600 500 400 300 TJ = 150°C 200 TJ = 25°C 100 r(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE (Normalized) Current Limited Max t, RECTANGULAR PULSE 700 0 100 TC, CASE TEMPERATURE (°C) 800 RDS(on), ON−RESISTANCE (mW) 125 GATE THRESHOLD VOLTAGE (Normalized) POWER DISSIPATION MULTIPLIER 1.2 4 5 7 6 8 9 10 1.2 ID = 590 mA 1.0 0.8 0.6 −75 −50 −25 0 25 50 75 100 125 150 VGS, GATE−TO−SOURCE VOLTAGE (V) TJ, JUNCTION TEMPERATURE (°C) Figure 15. RDS(on) vs. Gate Voltage Figure 16. Normalized Gate Threshold Voltage vs. Temperature 2 1 Duty Cycle = 0.5 0.2 0.1 0.01 0.001 0.1 0.05 0.02 P DM 0.01 t1 Single Pulse 0.00001 t2 0.0001 0.001 0.01 t, RECTANGULAR PULSE DURATION (sec) Figure 17. Transient Thermal Response www.onsemi.com 6 0.1 Notes: ZqJC(t) = r(t) x RqJC RqJC = 0.69°C/W Peak TJ = PDM x ZqJC(t) + TC Duty Cycle, D = t1/t2 1 10 NVB125N65S3 VGS RL Qg VDS VGS Qgs Qgd DUT IG = Const. Charge Figure 18. Gate Charge Test Circuit & Waveform RL VDS VDS 90% 90% 90% VDD VGS RG VGS DUT VGS 10% td(on) 10% tr td(off) ton tf toff Figure 19. Resistive Switching Test Circuit & Waveforms L E AS + 1 @ LI AS 2 VDS BVDSS ID IAS RG VDD DUT VGS 2 ID(t) VDD VDS(t) tp tp Figure 20. Unclamped Inductive Switching Test Circuit & Waveforms www.onsemi.com 7 Time NVB125N65S3 + DUT VDS − ISD L Driver RG Same Type as DUT VGS − dv/dt controlled by RG − ISD controlled by pulse period D+ VGS (Driver) VDD Gate Pulse Width Gate Pulse Period 10 V IFM, Body Diode Forward Current ISD (DUT) di/dt IRM Body Diode Reverse Current Body Diode Recovery dv/dt VDS (DUT) VDD VSD Body Diode Forward Voltage Drop Figure 21. Peak Diode Recovery dv/dt Test Circuit & Waveforms SUPERFET is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. www.onsemi.com 8 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS D2PAK−3 (TO−263, 3−LEAD) CASE 418AJ ISSUE F SCALE 1:1 GENERIC MARKING DIAGRAMS* XX XXXXXXXXX AWLYWWG IC DOCUMENT NUMBER: DESCRIPTION: XXXXXXXXG AYWW Standard 98AON56370E AYWW XXXXXXXXG AKA Rectifier XXXXXX XXYMW SSG DATE 11 MAR 2021 XXXXXX = Specific Device Code A = Assembly Location WL = Wafer Lot Y = Year WW = Work Week W = Week Code (SSG) M = Month Code (SSG) G = Pb−Free Package AKA = Polarity Indicator *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. Some products may not follow the Generic Marking. Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. D2PAK−3 (TO−263, 3−LEAD) PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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