NTD5413N
Power MOSFET
30 Amps, 60 Volts Single N−Channel
DPAK
Features
•
•
•
•
Low RDS(on)
High Current Capability
Avalanche Energy Specified
These are Pb−Free Devices
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V(BR)DSS
Applications
•
•
•
•
•
60 V
LED Lighting and LED Backlight Drivers
DC−DC Converters
DC Motor Drivers
Switch Mode Power Supplies
Power Supplies Secondary Side Synchronous Rectification
ID MAX
(Note 1)
RDS(ON) MAX
30 A
26 mW @ 10 V
N−Channel
D
MAXIMUM RATINGS (TJ = 25°C Unless otherwise specified)
Parameter
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
60
V
Gate−to−Source Voltage − Continuous
VGS
$20
V
Gate−to−Source Voltage − Nonrepetitive
(TP < 10 ms)
VGS
$30
V
ID
30
A
Continuous Drain
Current RqJC
(Note 1)
Steady
State
Power Dissipation
RqJC (Note 1)
Steady
State
TC = 25°C
TC = 100°C
S
MARKING
DIAGRAM
4
Drain
23
68
W
IDM
84
A
TJ, Tstg
−55 to
+175
°C
IS
30
A
Single Pulse Drain−to−Source Avalanche
Energy − Starting TJ = 25°C
(VDD = 50 Vdc, VGS = 10 V, IL(pk) = 30 A,
L = 0.3 mH, RG = 25 W)
EAS
135
mJ
Lead Temperature for Soldering
Purposes, 1/8″ from Case for 10 Seconds
TL
260
°C
Symbol
Max
Unit
ORDERING INFORMATION
°C/W
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
tp = 10 ms
Operating and Storage Temperature Range
Source Current (Body Diode)
4
1 2
3
DPAK
CASE 369AA
STYLE 2
YWW
5413N
PD
Pulsed Drain Current
TC = 25°C
G
2
1
3
Drain
Gate
Source
5413N
Y
WW
G
= Device Code
= Year
= Work Week
= Pb−Free Device
THERMAL RESISTANCE RATINGS
Parameter
Junction−to−Case (Drain) Steady State
(Note 1)
RqJC
2.2
RqJA
58.5
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface mounted on FR4 board using 1 sq in pad size,
(Cu Area 1.127 sq in [1 oz] including traces).
© Semiconductor Components Industries, LLC, 2008
October, 2008 − Rev. 0
1
Publication Order Number:
NTD5413N/D
NTD5413N
ELECTRICAL CHARACTERISTICS (TJ = 25°C Unless otherwise specified)
Characteristics
Symbol
Test Condition
Min
V(BR)DSS
VDS = 0 V, ID = 250 mA
60
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Drain−to−Source Breakdown Voltage Temperature Coefficient
Zero Gate Voltage Drain Current
Gate−Body Leakage Current
V(BR)DSS/TJ
IDSS
V
67.5
VGS = 0 V
VDS = 60 V
mV/°C
TJ = 25°C
1.0
TJ = 150°C
50
IGSS
VDS = 0 V, VGS = $20 V
VGS(th)
VGS = VDS, ID = 250 mA
$100
mA
nA
ON CHARACTERISTICS (Note 2)
Gate Threshold Voltage
Negative Threshold Temperature Coefficient
Drain−to−Source On−Voltage
VGS(th)/TJ
2.0
3.4
VDS(on)
VGS = 10 V, ID = 20 A
0.37
VGS = 10 V, ID = 20 A, 150°C
0.86
RDS(on)
VGS = 10 V, ID = 20 A
18.5
gFS
VDS = 15 V, ID = 20 A
36
Input Capacitance
Ciss
1160
Output Capacitance
Coss
VDS = 25 V, VGS = 0 V,
f = 1 MHz
Transfer Capacitance
Crss
Drain−to−Source On−Resistance
Forward Transconductance
4.0
7.9
V
mV/°C
0.52
V
26
mW
S
CHARGES, CAPACITANCES & GATE RESISTANCE
1725
pF
46
nC
240
100
VGS = 10 V, VDS = 48 V,
ID = 20 A
Total Gate Charge
QG(TOT)
35
Threshold Gate Charge
QG(TH)
Gate−to−Source Charge
QGS
6.5
Gate−to−Drain Charge
QGD
16.1
1.4
SWITCHING CHARACTERISTICS, VGS = 10 V (Note 3)
Turn−On Delay Time
Rise Time
td(on)
tr
Turn−Off Delay Time
Fall Time
VGS = 10 V, VDD = 48 V,
ID = 20 A, RG = 2.5 W
ns
11
20
td(off)
28
tf
8.0
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage (Note 2)
VSD
VGS = 0 V
IS = 20 A
TJ = 25°C
0.87
TJ = 125°C
0.8
IS = 20 Adc, VGS = 0 Vdc,
dIS/dt = 100 A/ms
Reverse Recovery Time
trr
Charge Time
ta
Discharge Time
tb
15
QRR
105.7
Reverse Recovery Stored Charge
1.2
52
V
ns
37
nC
2. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.
3. Switching characteristics are independent of operating junction temperatures.
ORDERING INFORMATION
Device
NTD5413NT4G
Package
Shipping†
DPAK
(Pb−Free)
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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2
NTD5413N
TYPICAL PERFORMANCE CURVES
10 V
VDS ≥ 10 V
60
6V
40
20
5V
VGS = 4.8 V
0
0
1
2
3
4
40
TJ = 125°C
20
TJ = 25°C
TJ = −55°C
0
3
5
4
5
6
7
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
ID = 20 A
TJ = 25°C
0.040
0.035
0.030
0.025
0.020
0.015
0.010
5
6
7
8
9
10
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
VGS, GATE−TO−SOURCE VOLTAGE (V)
0.045
0.005
60
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
0.050
0.028
8
TJ = 25°C
0.026
VGS = 10 V
0.024
0.022
0.020
0.018
0.016
0.014
0.012
0.010
10
20
30
40
50
60
VGS, GATE−TO−SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
1000
2.4
2.2
VGS = 0 V
ID = 20 A
VGS = 10 V
TJ = 150°C
2
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
80
TJ = 25°C
7V
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
80
1.8
1.6
1.4
1.2
1
100
TJ = 125°C
0.8
0.6
−50
−25
0
25
50
75
100
125
150
175
10
5
10
15
20
25
30
35
40
45
50
55 60
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
NTD5413N
C, CAPACITANCE (pF)
2500
VGS = 0 V
TJ = 25°C
2000
1500
Ciss
1000
500
0
Coss
Crss
0
10
20
30
40
50
60
VGS, GATE−TO−SOURCE VOLTAGE (V)
TYPICAL PERFORMANCE CURVES
10
QT
8
6
Q1
Q2
4
2
0
ID = 20 A
TJ = 25°C
0
5
10
15
20
25
30
40
35
Qg, TOTAL GATE CHARGE (nC)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source Voltage vs. Total
Charge
1000
VDD = 48 V
ID = 20 A
VGS = 10 V
t, TIME (ns)
IS, SOURCE CURRENT (A)
tr
100
td(off)
tf
td(on)
10
1
VGS = 0 V
TJ = 25°C
40
1
10
30
20
10
0
0.4
100
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
1 ms
100 ms
AVALANCHE ENERGY (mJ)
ID, DRAIN CURRENT (A)
0.7
0.8
0.9
1.0
140
0 V ≤ VGS ≤ 10 V
Single Pulse
TC = 25°C
10 ms
10 ms
dc
10
1
0.1
0.6
Figure 10. Diode Forward Voltage vs. Current
1000
100
0.5
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
RG, GATE RESISTANCE (W)
RDS(on) Limit
Thermal Limit
Package Limit
0.1
1
10
ID = 30 A
120
100
80
60
40
20
0
25
100
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
50
75
100
125
150
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
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4
175
NTD5413N
TYPICAL PERFORMANCE CURVES
100
D = 0.5
10
r(t), (°C/W)
1
0.2
0.1
0.05
0.02
0.01
0.1
0.01
Single Pulse
Surface−Mounted on FR4 Board using 1 sq in pad size, 1 oz Cu
0.001
0.000001
0.00001
0.0001
0.001
0.01
0.1
t, PULSE TIME (s)
Figure 13. Thermal Response
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5
1
10
100
1000
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DPAK (SINGLE GUAGE)
CASE 369AA−01
ISSUE B
4
1 2
DATE 03 JUN 2010
3
SCALE 1:1
A
E
b3
c2
B
Z
D
1
L4
A
4
L3
2
b2
H
DETAIL A
3
c
b
0.005 (0.13)
e
M
H
C
L2
GAUGE
PLANE
C
L
L1
DETAIL A
A1
ROTATED 905 CW
STYLE 1:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
STYLE 3:
PIN 1. ANODE
2. CATHODE
3. ANODE
4. CATHODE
STYLE 5:
PIN 1. GATE
2. ANODE
3. CATHODE
4. ANODE
STYLE 6:
PIN 1. MT1
2. MT2
3. GATE
4. MT2
STYLE 7:
PIN 1. GATE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
STYLE 4:
PIN 1. CATHODE
2. ANODE
3. GATE
4. ANODE
SOLDERING FOOTPRINT*
6.20
0.244
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
C
2.58
0.102
5.80
0.228
3.00
0.118
1.60
0.063
INCHES
MIN
MAX
0.086 0.094
0.000 0.005
0.025 0.035
0.030 0.045
0.180 0.215
0.018 0.024
0.018 0.024
0.235 0.245
0.250 0.265
0.090 BSC
0.370 0.410
0.055 0.070
0.108 REF
0.020 BSC
0.035 0.050
−−− 0.040
0.155
−−−
MILLIMETERS
MIN
MAX
2.18
2.38
0.00
0.13
0.63
0.89
0.76
1.14
4.57
5.46
0.46
0.61
0.46
0.61
5.97
6.22
6.35
6.73
2.29 BSC
9.40 10.41
1.40
1.78
2.74 REF
0.51 BSC
0.89
1.27
−−−
1.01
3.93
−−−
GENERIC
MARKING DIAGRAM*
XXXXXXG
ALYWW
YWW
XXX
XXXXXG
IC
Discrete
XXXXXX
A
L
Y
WW
G
6.17
0.243
SCALE 3:1
SEATING
PLANE
DIM
A
A1
b
b2
b3
c
c2
D
E
e
H
L
L1
L2
L3
L4
Z
= Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*This information is generic. Please refer
to device data sheet for actual part
marking.
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13126D
DPAK (SINGLE GAUGE)
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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