MOSFET – Power,
N-Channel, Logic Level
100 V, 23 A, 56 mW
NTD6415ANL, NVD6415ANL
Features
• Low RDS(on)
• 100% Avalanche Tested
• NVD Prefix for Automotive and Other Applications Requiring
•
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
These Devices are Pb−Free and are RoHS Compliant
www.onsemi.com
V(BR)DSS
RDS(on) MAX
56 mW @ 4.5 V
100 V
52 mW @ 10 V
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
100
V
Gate−to−Source Voltage − Continuous
VGS
$20
V
ID
23
A
Continuous Drain
Current
Steady
State
Power Dissipation
Steady
State
Pulsed Drain Current
TC = 25°C
TC = 100°C
TC = 25°C
tp = 10 ms
Operating and Storage Temperature Range
Source Current (Body Diode)
Single Pulse Drain−to−Source Avalanche
Energy (VDD = 50 Vdc, VGS = 10 Vdc, IL(pk) =
23 A, L = 0.3 mH, RG = 25 W)
Lead Temperature for Soldering
Purposes, 1/8″ from Case for 10 Seconds
23 A
D
G
16
S
PD
83
W
IDM
80
A
TJ, Tstg
−55 to
+175
°C
IS
23
A
EAS
79
mJ
TL
260
°C
4
1 2
3
DPAK
CASE 369AA
STYLE 2
MARKING DIAGRAM
& PIN ASSIGNMENT
4 Drain
Symbol
Max
Unit
Junction−to−Case (Drain) − Steady State
RqJC
1.8
°C/W
Junction−to−Ambient − Steady State (Note 1)
RqJA
49
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Surface mounted on FR4 board using 1 sq in pad size,
(Cu Area 1.127 sq in [2 oz] including traces).
AYWW
64
15ANLG
THERMAL RESISTANCE RATINGS
Parameter
ID MAX
1
Gate
A
6415ANL
Y
WW
G
2
Drain
3
Source
= Assembly Location*
= Device Code
= Year
= Work Week
= Pb−Free Package
* The Assembly Location code (A) is front side
optional. In cases where the Assembly Location is
stamped in the package, the front side assembly
code may be blank.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2016
March, 2020− Rev. 6
1
Publication Order Number:
NTD6415ANL/D
NTD6415ANL, NVD6415ANL
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
VGS = 0 V, ID = 250 mA, TJ = −40°C
100
92
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/TJ
Parameter
Typ
Max
Unit
OFF CHARACTERISTICS
V
115
Zero Gate Voltage Drain Current
IDSS
Gate−to−Source Leakage Current
IGSS
VDS = 0 V, VGS = "20 V
VGS(TH)
VGS = VDS, ID = 250 mA
VGS = 0 V,
VDS = 100 V
TJ = 25°C
mV/°C
1.0
TJ = 125°C
mA
100
"100
nA
2.0
V
ON CHARACTERISTICS (Note 2)
Gate Threshold Voltage
1.0
Negative Threshold Temperature
Coefficient
VGS(TH)/TJ
Drain−to−Source On−Resistance
RDS(on)
VGS = 4.5 V, ID = 10 A
44
56
VGS = 10 V, ID = 10 A
43
52
gFS
VDS = 5.0 V, ID = 10 A
24
S
1024
pF
Forward Transconductance
4.8
mV/°C
mW
CHARGES, CAPACITANCES AND GATE RESISTANCE
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
70
Total Gate Charge
QG(TOT)
20
Threshold Gate Charge
QG(TH)
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
Total Gate Charge
VGS = 0 V, f = 1.0 MHz, VDS = 25 V
VGS = 4.5 V, VDS = 80 V, ID = 23 A
QGD
QG(TOT)
156
nC
1.1
3.1
14
VGS = 10 V, VDS = 80 V, ID = 23 A
35
nC
11
ns
SWITCHING CHARACTERISTICS (Note 3)
Turn−On Delay Time
Rise Time
td(on)
tr
Turn−Off Delay Time
Fall Time
td(off)
VGS = 4.5 V, VDD = 80 V,
ID = 23 A, RG = 6.1 W
tf
91
40
71
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
VSD
VGS = 0 V, IS = 23 A
TJ = 25°C
0.87
TJ = 125°C
0.74
Reverse Recovery Time
tRR
64
Charge Time
Ta
40
Discharge Time
Tb
Reverse Recovery Charge
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 23 A
QRR
1.2
V
ns
24
152
nC
2. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.
3. Switching characteristics are independent of operating junction temperatures.
ORDERING INFORMATION
Device
Package
Shipping†
DPAK
(Pb−Free)
2500 / Tape & Reel
NTD6415ANLT4G
NVD6415ANLT4G
NVD6415ANLT4G−VF01
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specification Brochure, BRD8011/D.
www.onsemi.com
2
NTD6415ANL, NVD6415ANL
TYPICAL CHARACTERISTICS
45
3.6 V
4V
5V
35
30
3.4 V
25
3.2 V
20
15
3.0 V
10
2.8 V
35
30
25
20
10
5
0
0
1
2
3
4
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
5
TJ = 25°C
15
5
0
VDS w 10 V
40
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
40
45
TJ = 25°C
VGS = 10 V
TJ = 125°C
TJ = −55°C
1
Figure 2. Transfer Characteristics
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
Figure 1. On−Region Characteristics
0.050
0.050
ID = 23 A
TJ = 25°C
0.048
TJ = 25°C
0.048
0.046
0.046
0.044
VGS = 4.5 V
0.044
0.042
0.040
VGS = 10 V
0.042
2
3
4
5
6
7
8
9
10
0.040
5
VGS, GATE−TO−SOURCE VOLTAGE (V)
20
25
10000
VGS = 0 V
IDSS, LEAKAGE (nA)
ID = 23 A
VGS = 4.5 V
2.0
1.5
1.0
0.5
−50
15
Figure 4. On−Resistance versus Drain
Current and Gate Voltage
3.0
2.5
10
ID, DRAIN CURRENT (A)
Figure 3. On−Region versus Gate Voltage
RDS(on), DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
4
2
3
VGS, GATE−TO−SOURCE VOLTAGE (V)
−25
0
25
50
75
100
125
150
175
TJ = 150°C
1000
TJ = 125°C
100
10
20
30
40
50
60
70
80
90 100
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
versus Voltage
www.onsemi.com
3
NTD6415ANL, NVD6415ANL
TYPICAL CHARACTERISTICS
VGS, GATE−TO−SOURCE VOLTAGE (V)
C, CAPACITANCE (pF)
2500
TJ = 25°C
VGS = 0 V
2000
1500
Ciss
1000
500
0
Crss
0
10
Coss
20
30
40
50
60
70
80
90
100
6
Qds
4
Qgs
VDS = 80 V
ID = 23 A
TJ = 25°C
2
0
0
5
10
15
20
25
30
35
Qg, TOTAL GATE CHARGE (nC)
Figure 8. Gate−to−Source Voltage and
Drain−to−Source Voltage versus Total Charge
25
IS, SOURCE CURRENT (A)
t, TIME (ns)
8
Figure 7. Capacitance Variation
VDS = 80 V
ID = 23 A
VGS = 4.5 V
tr
100
tf
td(off)
10
td(on)
1
10
0.1
0.1
20
15
10
5
RG, GATE RESISTANCE (W)
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
Figure 10. Diode Forward Voltage versus
Current
125
VGS ≤ 10 V
SINGLE PULSE
TC = 25°C
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
10 ms
100 ms
1 ms
10 ms
dc
AVALANCHE ENERGY (mJ)
ID = 23 A
10
1
TJ = 25°C
VGS = 0 V
0
0.50 0.55 0.60 0.65 0.70 0.75 0.80 0.85 0.90 0.95
100
100
ID, DRAIN CURRENT (A)
QT
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
1000
1
10
100
75
50
25
0
25
1
10
100
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
50
75
100
125
150
TJ, STARTING JUNCTION TEMPERATURE
175
Figure 12. Maximum Avalanche Energy versus
Starting Junction Temperature
www.onsemi.com
4
NTD6415ANL, NVD6415ANL
RqJC(t) (°C/W) EFFECTIVE TRANSIENT
THERMAL RESISTANCE
TYPICAL CHARACTERISTICS
100
Duty Cycle = 0.5
0.2
0.1
0.05
0.02
1
0.01
10
0.1
0.01
0.000001
SINGLE PULSE
0.00001
0.0001
0.001
0.01
0.1
t, PULSE TIME (s)
Figure 13. Thermal Response
www.onsemi.com
5
1
10
100
1000
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DPAK (SINGLE GUAGE)
CASE 369AA−01
ISSUE B
4
1 2
DATE 03 JUN 2010
3
SCALE 1:1
A
E
b3
c2
B
Z
D
1
L4
A
4
L3
2
b2
H
DETAIL A
3
c
b
0.005 (0.13)
e
M
H
C
L2
GAUGE
PLANE
C
L
L1
DETAIL A
A1
ROTATED 905 CW
STYLE 1:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
STYLE 3:
PIN 1. ANODE
2. CATHODE
3. ANODE
4. CATHODE
STYLE 5:
PIN 1. GATE
2. ANODE
3. CATHODE
4. ANODE
STYLE 6:
PIN 1. MT1
2. MT2
3. GATE
4. MT2
STYLE 7:
PIN 1. GATE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
STYLE 4:
PIN 1. CATHODE
2. ANODE
3. GATE
4. ANODE
SOLDERING FOOTPRINT*
6.20
0.244
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
C
2.58
0.102
5.80
0.228
3.00
0.118
1.60
0.063
INCHES
MIN
MAX
0.086 0.094
0.000 0.005
0.025 0.035
0.030 0.045
0.180 0.215
0.018 0.024
0.018 0.024
0.235 0.245
0.250 0.265
0.090 BSC
0.370 0.410
0.055 0.070
0.108 REF
0.020 BSC
0.035 0.050
−−− 0.040
0.155
−−−
MILLIMETERS
MIN
MAX
2.18
2.38
0.00
0.13
0.63
0.89
0.76
1.14
4.57
5.46
0.46
0.61
0.46
0.61
5.97
6.22
6.35
6.73
2.29 BSC
9.40 10.41
1.40
1.78
2.74 REF
0.51 BSC
0.89
1.27
−−−
1.01
3.93
−−−
GENERIC
MARKING DIAGRAM*
XXXXXXG
ALYWW
YWW
XXX
XXXXXG
IC
Discrete
XXXXXX
A
L
Y
WW
G
6.17
0.243
SCALE 3:1
SEATING
PLANE
DIM
A
A1
b
b2
b3
c
c2
D
E
e
H
L
L1
L2
L3
L4
Z
= Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*This information is generic. Please refer
to device data sheet for actual part
marking.
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13126D
DPAK (SINGLE GAUGE)
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
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