NVF2955PT1G

NTF2955, NVF2955 MOSFET – Power, Single, P-Channel, SOT-223 -60 V, -2.6 A Features • • • • Design for low RDS(on) Withstands High Energy in Avalanche and Commutation Modes AEC−Q101 Qualified − NVF2955 These Devices are Pb−Free and are RoHS Compliant http://onsemi.com V(BR)DSS RDS(on) TYP ID MAX −60 V 145 mW @ −10 V −2.6 A P−Channel Applications • • • • D Power Supplies PWM Motor Control Converters Power Management G MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Parameter Drain−to−Source Voltage Gate−to−Source Voltage S Symbol Value Unit VDSS −60 V VGS ±20 V ID −2.6 A Continuous Drain Current (Note 1) Steady State TA = 25°C Power Dissipation (Note 1) Steady State TA = 25°C PD 2.3 W Continuous Drain Current (Note 2) Steady State TA = 25°C ID −1.7 A Power Dissipation (Note 2) TA = 85°C −2.0 TA = 85°C TA = 25°C −1.3 PD 1.0 W IDM −17 A Operating Junction and Storage Temperature TJ, TSTG −55 to 175 °C Single Pulse Drain−to−Source Avalanche Energy (VDD = 25 V, VG = 10 V, IPK = 6.7 A, L = 10 mH, RG = 25 W) EAS 225 mJ Pulsed Drain Current tp = 10 ms Lead Temperature for Soldering Purposes (1/8” from case for 10 seconds) 4 Drain 4 12 3 SOT−223 CASE 318E STYLE 3 TL 260 °C Symbol Max Junction−to−Tab (Drain) − Steady State (Note 2) RqJC 14 Junction−to−Ambient − Steady State (Note 1) RqJA 65 Junction−to−Ambient − Steady State (Note 2) RqJA 150 Unit °C/W AYW 2955G G 1 Gate 2 Drain 3 Source A = Assembly Location Y = Year W = Work Week G = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION Package Shipping† NTF2955T1G SOT−223 (Pb−Free) 1000 /Tape & Reel NVF2955T1G SOT−223 (Pb−Free) 1000/ Tape & Reel Device THERMAL RESISTANCE RATINGS Parameter MARKING DIAGRAM AND PIN ASSIGNMENT †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. When surface mounted to an FR4 board using 1 in. pad size (Cu. area = 1.127 in2 [1 oz] including traces) © Semiconductor Components Industries, LLC, 2014 May, 2019 − Rev. 7 1 Publication Order Number: NTF2955/D NTF2955, NVF2955 2. When surface mounted to an FR4 board using the minimum recommended pad size (Cu. area = 0.341 in2) http://onsemi.com 2 NTF2955, NVF2955 ELECTRICAL CHARACTERISTICS (TJ=25°C unless otherwise stated) Symbol Parameter Test Condition Min VGS = 0 V, ID = −250 mA −60 Typ Max Unit OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage V(BR)DSS Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/TJ Zero Gate Voltage Drain Current Gate−to−Source Leakage Current IDSS V 66.4 VGS = 0 V, VDS = −60 V mV/°C TJ = 25°C −1.0 TJ = 125°C −50 IGSS VDS = 0 V, VGS = ±20 V Gate Threshold Voltage VGS(TH) VGS = VDS, ID = −1.0 mA Drain−to−Source On Resistance RDS(on) VGS = −10 V, ID = −0.75 A VGS = −10 V, ID = −1.5 A mA ±100 nA −4.0 V 145 170 mW 150 180 185 ON CHARACTERISTICS (Note 3) −2.0 VGS = −10 V, ID = −2.4 A 154 gFS VGS = −15 V, ID = −0.75 A 1.77 S Input Capacitance CISS 492 pF Output Capacitance COSS VGS = 0 V, f = 1.0 MHz, VDS = 25 V Reverse Transfer Capacitance CRSS Forward Transconductance CHARGES AND CAPACITANCES 165 50 VGS = 10 V, VDS = 30 V, ID = 1.5 A Total Gate Charge QG(TOT) Threshold Gate Charge QG(TH) Gate−to−Source Charge QGS 2.3 Gate−to−Drain Charge QGD 5.2 nC 14.3 1.2 SWITCHING CHARACTERISTICS (Note 4) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(ON) tr VGS = 10 V, VDD = 25 V, ID = 1.5 A, RG = 9.1 W RL = 25 W ns 11 7.6 td(OFF) 65 tf 38 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time VSD TJ = 25°C −1.10 TJ = 125°C −0.9 tRR Charge Time ta Discharge Time tb Reverse Recovery Charge VGS = 0 V, IS = 1.5 A −1.30 V 36 VGS = 0 V, dIS/dt = 100 A/ms, IS = 1.5 A QRR 20 ns 16 0.139 nC Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 3. Pulse Test: pulse width ≤ 300ms, duty cycle ≤ 2%. 4. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 3 NTF2955, NVF2955 TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted) 10 VGS = −6 V VGS = −10 V to −7 V 8 −ID, DRAIN CURRENT (AMPS) −ID, DRAIN CURRENT (AMPS) 10 TJ = 25 °C VGS = −5.5 V 6 VGS = −5 V 4 VGS = −4.5 V 2 VGS = −3.8 V 0 0 1 2 3 4 5 6 7 8 9 TJ = −55°C TJ = 25°C 8 4 2 2 4 −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) TJ = 25°C 0.2 0.175 TJ = 25°C VGS = −10 V 0.15 VGS = −15 V 0.125 TJ = −55°C 0.1 0.075 0 2 0 2 1.8 1.6 4 8 6 10 0.05 0 2 6 4 8 10 −ID, DRAIN CURRENT (AMPS) −ID, DRAIN CURRENT (AMPS) Figure 3. On−Resistance versus Drain Current and Temperature Figure 4. On−Resistance versus Drain Current and Gate Voltage 1000 ID = −1.5 A VGS = −10 V VGS = 0 V TJ = 150°C −IDSS, LEAKAGE (nA) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) TJ = 125°C 0.1 10 0.25 0.225 0.2 8 Figure 2. Transfer Characteristics VGS = −10 V 0.3 6 −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) Figure 1. On−Region Characteristics 0.4 TJ = 125°C 6 0 10 VDS ≥ 10 V 1.4 1.2 1 0.8 0.6 0.4 100 TJ = 125°C 0.2 0 −50 −25 0 25 50 75 100 125 10 150 5 10 15 20 25 30 35 40 45 50 55 TJ, JUNCTION TEMPERATURE (°C) −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current versus Voltage http://onsemi.com 4 60 NTF2955, NVF2955 Ciss 1000 C, CAPACITANCE (pF) 12 TJ = 25°C VGS = 0 V VDS = 0 V 800 QT 10 Crss 600 Ciss 400 Coss 200 Crss 0 10 60 5 −VGS 0 −VDS 5 10 15 20 25 8 QGS 30 20 4 VDS 2 0 0 2 −IS, SOURCE CURRENT (AMPS) t, TIME (ns) td(off) tf td(on) 10 tr 1 −ID, DRAIN CURRENT (AMPS) 100 10 10 2 1 0 0.25 0.75 0.5 1 1.25 1.5 1.75 −VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS) Figure 9. Resistive Switching Time Variation versus Gate Resistance Figure 10. Diode Forward Voltage versus Current VGS = −20 V SINGLE PULSE TC = 25°C 10 ms 10 ms 1 dc 0.01 0.1 3 RG, GATE RESISTANCE (W) 100 ms 1 ms 0.1 0 16 14 VGS = 0 V TJ = 25°C 4 0 100 RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 1 10 100 EAS, SINGLE PULSE DRAIN−TO−SOURCE AVALANCHE ENERGY (mJ) 1 4 6 8 10 12 Qg, TOTAL GATE CHARGE (nC) Figure 8. Gate−to−Source and Drain−to−Source Voltage versus Total Charge 5 100 10 ID = −1.5 A TJ = 25°C Figure 7. Capacitance Variation VDD = −25 V ID = −1.5 A VGS = −10 V 40 VGS QGD 6 GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS) 1000 50 VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) 1200 VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted) 250 IPK = −6.7 A 200 150 100 50 0 25 50 75 100 125 150 175 −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) TJ, STARTING JUNCTION TEMPERATURE (°C) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. Maximum Avalanche Energy versus Starting Junction Temperature http://onsemi.com 5 r(t), EFFECTIVE TRANSIENT THERMAL RESPONSE RESISTANCE (NORMALIZED) NTF2955, NVF2955 100 D = 0.5 0.2 10 0.1 0.05 0.02 1 0.01 0.1 0.01 Single Pulse 0.001 0.000001 Cu area − 727 mm2, 1 oz. thick traces 0.00001 0.0001 0.001 0.01 0.1 t, TIME (s) Figure 13. Thermal Response http://onsemi.com 6 1 10 100 1000 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SOT−223 (TO−261) CASE 318E−04 ISSUE R DATE 02 OCT 2018 SCALE 1:1 q q DOCUMENT NUMBER: DESCRIPTION: 98ASB42680B SOT−223 (TO−261) Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 2 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2018 www.onsemi.com SOT−223 (TO−261) CASE 318E−04 ISSUE R STYLE 1: PIN 1. 2. 3. 4. BASE COLLECTOR EMITTER COLLECTOR STYLE 2: PIN 1. 2. 3. 4. ANODE CATHODE NC CATHODE STYLE 6: PIN 1. 2. 3. 4. RETURN INPUT OUTPUT INPUT STYLE 7: PIN 1. 2. 3. 4. ANODE 1 CATHODE ANODE 2 CATHODE STYLE 11: PIN 1. MT 1 2. MT 2 3. GATE 4. MT 2 STYLE 3: PIN 1. 2. 3. 4. GATE DRAIN SOURCE DRAIN STYLE 8: STYLE 12: PIN 1. INPUT 2. OUTPUT 3. NC 4. OUTPUT CANCELLED DATE 02 OCT 2018 STYLE 4: PIN 1. 2. 3. 4. SOURCE DRAIN GATE DRAIN STYLE 5: PIN 1. 2. 3. 4. STYLE 9: PIN 1. 2. 3. 4. INPUT GROUND LOGIC GROUND STYLE 10: PIN 1. CATHODE 2. ANODE 3. GATE 4. ANODE DRAIN GATE SOURCE GATE STYLE 13: PIN 1. GATE 2. COLLECTOR 3. EMITTER 4. COLLECTOR GENERIC MARKING DIAGRAM* AYW XXXXXG G 1 A = Assembly Location Y = Year W = Work Week XXXXX = Specific Device Code G = Pb−Free Package (Note: Microdot may be in either location) *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. DOCUMENT NUMBER: DESCRIPTION: 98ASB42680B SOT−223 (TO−261) Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. 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