NVF5P03T3G

NTF5P03, NVF5P03 MOSFET – Power, P-Channel, SOT-223 -5.2 A, -30 V Features • • • • • • • http://onsemi.com Ultra Low RDS(on) Higher Efficiency Extending Battery Life Logic Level Gate Drive Miniature SOT−223 Surface Mount Package Avalanche Energy Specified AEC−Q101 Qualified and PPAP Capable − NVF5P03T3G These Devices are Pb−Free and are RoHS Compliant −5.2 AMPERES, −30 VOLTS RDS(on) = 100 mW S G Applications • • • • • DC−DC Converters Power Management Motor Controls Inductive Loads Replaces MMFT5P03HD D P−Channel MOSFET 4 1 2 MARKING DIAGRAM & PIN ASSIGNMENT Drain 4 3 SOT−223 CASE 318E STYLE 3 AYM 5P03 G G 1 Gate 2 3 Drain Source A = Assembly Location Y = Year M = Date Code 5P03 = Specific Device Code G = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION Package Shipping† NTF5P03T3G SOT−223 (Pb−Free) 4000 / Tape & Reel NVF5P03T3G SOT−223 (Pb−Free) 4000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2013 May, 2019 − Rev. 6 1 Publication Order Number: NTF5P03T3/D NTF5P03, NVF5P03 MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Negative sign for P−Channel devices omitted for clarity Rating Symbol Max Unit Drain−to−Source Voltage VDSS −30 V Drain−to−Gate Voltage (RGS = 1.0 MW) VDGR −30 V VGS ± 20 V RTHJA PD 40 3.13 25 −5.2 −4.1 −26 °C/W Watts mW/°C A A A IDM 80 1.56 12.5 −3.7 −2.9 −19 °C/W Watts mW/°C A A A TJ, Tstg − 55 to 150 °C Gate−to−Source Voltage − Continuous 1 sq in FR−4 or G−10 PCB 10 seconds Minimum FR−4 or G−10 PCB 10 seconds Thermal Resistance − Junction to Ambient Total Power Dissipation @ TA = 25°C Linear Derating Factor Drain Current − Continuous @ TA = 25°C Continuous @ TA = 70°C Pulsed Drain Current (Note 1) Thermal Resistance − Junction to Ambient Total Power Dissipation @ TA = 25°C Linear Derating Factor Drain Current − Continuous @ TA = 25°C Continuous @ TA = 70°C Pulsed Drain Current (Note 1) Operating and Storage Temperature Range Single Pulse Drain−to−Source Avalanche Energy − Starting TJ = 25°C (VDD = −30 Vdc, VGS = −10 Vdc, Peak IL = −12 Apk, L = 3.5 mH, RG = 25 W) ID ID IDM RTHJA PD ID ID EAS 250 mJ Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Repetitive rating; pulse width limited by maximum junction temperature. http://onsemi.com 2 NTF5P03, NVF5P03 ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit −30 − − −28 − − − − − − −1.0 −25 − − ± 100 −1.0 − −1.75 3.5 −3.0 − − 76 107 100 150 gfs 2.0 3.9 − Mhos Ciss − 500 950 pF Coss − 153 440 Crss − 58 140 td(on) − 10 24 tr − 33 48 td(off) − 38 94 tf − 20 92 td(on) − 16 38 tr − 45 110 td(off) − 23 60 tf − 24 80 QT − 15 38 Q1 − 1.6 − Q2 − 3.5 − Q3 − 2.6 − − − −1.1 −0.89 −1.5 − OFF CHARACTERISTICS V(BR)DSS Drain−to−Source Breakdown Voltage (Cpk ≥ 2.0) (Notes 2 and 4) (VGS = 0 Vdc, ID = −250 mAdc) Temperature Coefficient (Positive) Zero Gate Voltage Drain Current (VDS = −24 Vdc, VGS = 0 Vdc) (VDS = −24 Vdc, VGS = 0 Vdc, TJ = 125°C) IDSS Gate−Body Leakage Current (VGS = ± 20 Vdc, VDS = 0 Vdc) IGSS Vdc mV/°C mAdc nAdc ON CHARACTERISTICS (Note 2) Gate Threshold Voltage (Cpk ≥ 2.0) (Notes 2 and 4) (VDS = VGS, ID = −250 mAdc) Threshold Temperature Coefficient (Negative) VGS(th) Static Drain−to−Source On−Resistance (Cpk ≥ 2.0) (Notes 2 and 4) (VGS = −10 Vdc, ID = −5.2 Adc) (VGS = −4.5 Vdc, ID = −2.6Adc) RDS(on) Forward Transconductance (Note 2) (VDS = −15 Vdc, ID = −2.0 Adc) Vdc mV/°C mW DYNAMIC CHARACTERISTICS (VDS = −25 Vdc, VGS = 0 V, f = 1.0 MHz) Input Capacitance Output Capacitance Transfer Capacitance SWITCHING CHARACTERISTICS (Note 3) (VDD = −15 Vdc, ID = −4.0 Adc, VGS = −10 Vdc, RG = 6.0 W) (Note 2) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time (VDD = −15 Vdc, ID = −2.0 Adc, VGS = −10 Vdc, RG = 6.0 W) (Note 2) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time Gate Charge (VDS = −24 Vdc, ID = −4.0 Adc, VGS = −10 Vdc) (Note 2) ns ns nC SOURCE−DRAIN DIODE CHARACTERISTICS Forward On−Voltage (IS = −4.0 Adc, VGS = 0 Vdc) (IS = −4.0 Adc, VGS = 0 Vdc, TJ = 125°C) (Note 2) VSD Reverse Recovery Time (IS = −4.0 Adc, VGS = 0 Vdc, dIS/dt = 100 A/ms) (Note 2) trr − 34 − ta − 20 − tb − 14 − QRR − 0.036 − Reverse Recovery Stored Charge 2. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2.0%. 3. Switching characteristics are independent of operating junction temperatures. 4. Reflects typical values. Max limit * Typ Cpk + 3 SIGMA Ť Ť http://onsemi.com 3 Vdc ns mC NTF5P03, NVF5P03 TYPICAL ELECTRICAL CHARACTERISTICS 4 −ID, DRAIN CURRENT (A) −3.9 V −6 V −8 V −10 V 3 10 TJ = 25°C −3.7 V −4.1 V −4.3 V −3.5 V −4.5 V −3.1 V 2 VDS ≥ −10 V 9 −ID, DRAIN CURRENT (A) 5 −2.8 V 1 VGS = −2.7 V 8 7 6 5 4 3 TJ = 25°C 2 TJ = 100°C 1 0 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 −VDS, DRAIN−TO−SOURCE VOLTAGE (V) 2 2 2.5 3 3.5 4 4.5 −VGS, GATE−TO−SOURCE VOLTAGE (V) 5 Figure 2. Transfer Characteristics RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) Figure 1. On−Region Characteristics TJ = −55°C 0.200 0.200 ID = −5.2 A TJ = 25°C 0.175 0.150 TJ = 25°C 0.180 0.160 0.140 VGS = −4.5 V 0.120 0.125 0.100 0.100 0.060 0.075 0.040 0.050 0.025 0.020 3 4 5 6 7 8 9 −VGS, GATE−TO−SOURCE VOLTAGE (V) 0.000 10 4 5.5 7 8.5 10 1000 VGS = 0 V ID = −5.2 A VGS = −10 V −IDSS, LEAKAGE (nA) 1.45 2.5 Figure 4. On−Resistance versus Drain Current and Gate Voltage 1.65 1.55 1 −ID, DRAIN CURRENT (A) Figure 3. On−Resistance versus Gate−to−Source Voltage RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) VGS = −10 V 0.080 1.35 1.25 1.15 1.05 0.95 0.85 TJ = 125°C 100 TJ = 100°C 0.75 0.65 −50 10 −25 0 25 50 75 100 125 150 5 10 15 20 25 TJ, JUNCTION TEMPERATURE (°C) −VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current versus Voltage http://onsemi.com 4 30 NTF5P03, NVF5P03 TJ = 25°C VGS = 0 V C, CAPACITANCE (pF) 900 800 700 600 Ciss 500 400 300 200 Coss 100 Crss 0 0 5 10 15 20 25 DRAIN−TO−SOURCE VOLTAGE (V) 30 12.5 25 −VDS 5.0 −IS, SOURCE CURRENT (A) t, TIME (ns) tf 100 ID = −2 A TJ = 25°C 2.5 0 0 10 tr td(on) 10 RG, GATE RESISTANCE (W) 100 2.50 2.00 1.50 1.00 0.50 0.00 dc 10 ms 1 ms 0.1 0.01 0.1 100 ms RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 1 10 ms 10 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 0.95 1 −VSD, SOURCE−TO−DRAIN VOLTAGE (V) VGS = 20 V SINGLE PULSE TC = 25°C 1 0 60 3.00 Figure 10. Diode Forward Voltage versus Current EAS, SINGLE PULSE DRAIN−TO−SOURCE AVALANCHE ENERGY (mJ) −ID, DRAIN CURRENT (AMPS) 10 20 30 40 50 Qg, TOTAL GATE CHARGE (nC) 5 VGS = 0 V TJ = 25°C 3.50 Figure 9. Resistive Switching Time Variation versus Gate Resistance 100 10 Q2 Q1 4.00 VDD = −15 V ID = −4.0 A VGS = −10 V 1 15 −VGS Figure 8. Gate−to−Source and Drain−to−Source Voltage versus Total Charge td(off) 10 20 7.5 Figure 7. Capacitance Variation 1000 QT 10 −VDS, DRAIN−TO−SOURCE VOLTAGE (V) 1000 −VGS, GATE−TO−SOURCE VOLTAGE (V) TYPICAL ELECTRICAL CHARACTERISTICS 100 250 ID = −6 A 200 150 100 50 0 25 −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Mounted on 2”sq. FR4 board (1”sq. 2 oz. Cu 0.06” thick single sided) with on die operating, 10 s max. Figure 11. Maximum Rated Forward Biased Safe Operating Area 50 75 100 125 TJ, STARTING JUNCTION TEMPERATURE (°C) Figure 12. Maximum Avalanche Energy versus Starting Junction Temperature http://onsemi.com 5 150 NTF5P03, NVF5P03 TYPICAL ELECTRICAL CHARACTERISTICS RTHJA(t), EFFECTIVE TRANSIENT THERMAL RESPONSE 1 D = 0.5 0.2 NORMALIZED TO RqJA AT STEADY STATE (1″ PAD) 0.1 0.1 0.05 0.0175 W CHIP JUNCTION 0.0154 F 0.02 0.0710 W 0.2706 W 0.5779 W 0.7086 W 0.0854 F 0.3074 F 1.7891 F 107.55 F 0.01 AMBIENT SINGLE PULSE 0.01 1.0E-03 1.0E-02 1.0E-01 1.0E+00 t, TIME (s) 1.0E+01 Figure 13. FET Thermal Response http://onsemi.com 6 1.0E+02 1.0E+03 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SOT−223 (TO−261) CASE 318E−04 ISSUE R DATE 02 OCT 2018 SCALE 1:1 q q DOCUMENT NUMBER: DESCRIPTION: 98ASB42680B SOT−223 (TO−261) Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 2 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2018 www.onsemi.com SOT−223 (TO−261) CASE 318E−04 ISSUE R STYLE 1: PIN 1. 2. 3. 4. BASE COLLECTOR EMITTER COLLECTOR STYLE 2: PIN 1. 2. 3. 4. ANODE CATHODE NC CATHODE STYLE 6: PIN 1. 2. 3. 4. RETURN INPUT OUTPUT INPUT STYLE 7: PIN 1. 2. 3. 4. ANODE 1 CATHODE ANODE 2 CATHODE STYLE 11: PIN 1. MT 1 2. MT 2 3. GATE 4. MT 2 STYLE 3: PIN 1. 2. 3. 4. GATE DRAIN SOURCE DRAIN STYLE 8: STYLE 12: PIN 1. INPUT 2. OUTPUT 3. NC 4. OUTPUT CANCELLED DATE 02 OCT 2018 STYLE 4: PIN 1. 2. 3. 4. SOURCE DRAIN GATE DRAIN STYLE 5: PIN 1. 2. 3. 4. STYLE 9: PIN 1. 2. 3. 4. INPUT GROUND LOGIC GROUND STYLE 10: PIN 1. CATHODE 2. ANODE 3. GATE 4. ANODE DRAIN GATE SOURCE GATE STYLE 13: PIN 1. GATE 2. COLLECTOR 3. EMITTER 4. COLLECTOR GENERIC MARKING DIAGRAM* AYW XXXXXG G 1 A = Assembly Location Y = Year W = Work Week XXXXX = Specific Device Code G = Pb−Free Package (Note: Microdot may be in either location) *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. DOCUMENT NUMBER: DESCRIPTION: 98ASB42680B SOT−223 (TO−261) Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 2 OF 2 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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