NVMFS5C430NWFAFT1G

DATA SHEET www.onsemi.com MOSFET - Power, Single N-Channel, DFN5/DFNW5 V(BR)DSS RDS(ON) MAX ID MAX 40 V 1.7 mW @ 10 V 185 A 40 V, 1.7 mW, 185 A D (5,6) NVMFS5C430N Features • • • • • • Small Footprint (5x6 mm) for Compact Design Low RDS(on) to Minimize Conduction Losses Low QG and Capacitance to Minimize Driver Losses NVMFS5C430NWF − Wettable Flank Option for Enhanced Optical Inspection AEC−Q101 Qualified and PPAP Capable These Devices are Pb−Free and are RoHS Compliant MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Value Unit Drain−to−Source Voltage VDSS 40 V Gate−to−Source Voltage VGS ±20 V ID 185 A Continuous Drain Current RqJC (Notes 1, 3) TC = 25°C Power Dissipation RqJC (Note 1) Continuous Drain Current RqJA (Notes 1, 2, 3) Steady State TC = 100°C TC = 25°C Power Dissipation RqJA (Notes 1 & 2) Pulsed Drain Current Steady State PD W 106 A 35 25 PD TA = 100°C W 3.8 1.9 IDM 900 A TJ, Tstg −55 to + 175 °C IS 102 A Single Pulse Drain−to−Source Avalanche Energy (IL(pk) = 15 A) EAS 338 mJ Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) TL 260 °C TA = 25°C, tp = 10 ms Operating Junction and Storage Temperature Source Current (Body Diode) DFN5 (SO−8FL) CASE 488AA DFNW5 (FULL−CUT SO8FL WF) CASE 507BA MARKING DIAGRAM D 53 ID TA = 100°C TA = 25°C N−CHANNEL MOSFET 131 TC = 100°C TA = 25°C S (1,2,3) 1 Symbol Parameter G (4) S S S G D XXXXXX AYWZZ D D XXXXXX = 5C430N XXXXXX = (NVMFS5C430N) or XXXXXX = 430NWF XXXXXX = (NVMFS5C430NWF) A = Assembly Location Y = Year W = Work Week ZZ = Lot Traceability ORDERING INFORMATION See detailed ordering, marking and shipping information in the package dimensions section on page 5 of this data sheet. Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. THERMAL RESISTANCE MAXIMUM RATINGS Parameter Symbol Value Unit Junction−to−Case − Steady State RqJC 1.4 °C/W Junction−to−Ambient − Steady State (Note 2) RqJA 40 1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 2. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad. 3. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. © Semiconductor Components Industries, LLC, 2015 March, 2023 − Rev. 2 1 Publication Order Number: NVMFS5C430N/D NVMFS5C430N ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter Symbol Test Condition Min Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 40 Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/ TJ Typ Max Unit OFF CHARACTERISTICS Zero Gate Voltage Drain Current IDSS Gate−to−Source Leakage Current V 12.8 VGS = 0 V, VDS = 40 V mV/°C TJ = 25 °C 10 TJ = 125°C 100 IGSS VDS = 0 V, VGS = 20 V VGS(TH) VGS = VDS, ID = 250 mA 100 mA nA ON CHARACTERISTICS (Note 4) Gate Threshold Voltage Threshold Temperature Coefficient VGS(TH)/TJ Drain−to−Source On Resistance Forward Transconductance RDS(on) 2.5 3.5 −8.2 VGS = 10 V gFS ID = 50 A VDS =15 V, ID = 50 A 1.4 V mV/°C 1.7 130 mW S CHARGES, CAPACITANCES & GATE RESISTANCE Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS 3300 VGS = 0 V, f = 1 MHz, VDS = 25 V 1600 pF 45 Total Gate Charge QG(TOT) VGS = 10 V, VDS = 20 V; ID = 50 A Threshold Gate Charge QG(TH) 10 Gate−to−Source Charge QGS 16 Gate−to−Drain Charge QGD Plateau Voltage VGP 4.7 td(ON) 13 VGS = 10 V, VDS = 20 V; ID = 50 A 47 nC 7 V SWITCHING CHARACTERISTICS (Note 5) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time tr td(OFF) VGS = 10 V, VDS = 20 V, ID = 50 A, RG = 2.5 W tf 48 ns 29 8 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time VSD TJ = 25°C 0.83 TJ = 125°C 0.7 tRR Charge Time ta Discharge Time tb Reverse Recovery Charge VGS = 0 V, IS = 50 A 1.2 V 57 VGS = 0 V, dIS/dt = 100 A/ms, IS = 50 A QRR 30 ns 27 68 nC Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 5. Switching characteristics are independent of operating junction temperatures. www.onsemi.com 2 NVMFS5C430N TYPICAL CHARACTERISTICS VGS = 6 V to 10 V 200 5.2 V 160 4.8 V 120 80 4.4 V 40 0.5 1.0 1.5 2.0 2.5 75 TJ = 25°C 50 3.0 TJ = 125°C 0 3 4 6 5 Figure 2. Transfer Characteristics TJ = 25°C ID = 50 A 3.5 3.0 2.5 2.0 1.5 1.0 0.5 4 5 6 7 8 9 10 VGS, GATE−TO−SOURCE VOLTAGE (V) 1.60 7 TJ = 25°C 1.55 1.50 1.45 VGS = 10 V 1.40 1.35 1.30 1.25 1.20 10 30 50 70 90 110 130 150 ID, DRAIN CURRENT (A) Figure 3. On−Resistance vs. Gate−to−Source Voltage Figure 4. On−Resistance vs. Drain Current and Gate Voltage 2.0 1.E−04 VGS = 10 V ID = 50 A TJ = 150°C IDSS, LEAKAGE (A) RDS(on), NORMALIZED DRAIN−TO− SOURCE RESISTANCE 2 Figure 1. On−Region Characteristics 4.0 1.8 1 TJ = −55°C VGS, GATE−TO−SOURCE VOLTAGE (V) 4.5 3 100 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 5.0 0 125 0 RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW) RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW) 0 150 25 4.0 V 0 VDS = 10 V 175 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 200 1.6 1.4 1.2 1.0 1.E−05 TJ = 125°C 1.E−06 TJ = 85°C 0.8 0.6 −50 −25 0 25 50 75 100 125 150 175 1.E−07 5 10 15 20 25 30 35 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage www.onsemi.com 3 40 NVMFS5C430N TYPICAL CHARACTERISTICS VGS, GATE−TO−SOURCE VOLTAGE (V) 1.E+04 C, CAPACITANCE (pF) CISS COSS 1.E+03 CRSS 1.E+02 1.E+01 VGS = 0 V TJ = 25°C f = 1 MHz 0 10 5 20 15 30 25 35 40 10 9 8 7 6 QGS 5 QGD 4 3 VDS = 20 V TJ = 25°C ID = 50 A 2 1 0 0 10 5 15 20 25 30 35 40 QG, GATE CHARGE (nC) Figure 7. Capacitance Variation Figure 8. Gate−to−Source Voltage vs. Charge 1000 50 45 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 100 t, TIME (ns) 100 tr td(off) td(on) 10 VGS = 10 V VDS = 20 V ID = 50 A tf 1 IS, SOURCE CURRENT (A) VGS = 0 V 1 10 TJ = 150°C 1 100 0.3 1 0.1 0.1 0.5 0.6 TJ = 25°C TJ = −55°C 0.7 0.8 0.9 1.0 VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current 100 100 TJ = 25°C TC = 25°C VGS ≤ 10 V Single Pulse IPEAK, (A) 10 0.4 TJ = 125°C RG, GATE RESISTANCE (W) 1000 ID, DRAIN CURRENT (A) 10 500 ms TJ = 100°C 10 1 ms RDS(on) Limit Thermal Limit Package Limit 1 10 ms 10 1 100 1E−4 1E−3 10E−2 VDS (V) TIME IN AVALANCHE (s) Figure 11. Safe Operating Area Figure 12. IPEAK vs. Time in Avalanche www.onsemi.com 4 NVMFS5C430N TYPICAL CHARACTERISTICS 100 RqJA (°C/W) 50% Duty Cycle 10 20% 10% 5% 1 2% 1% 0.1 0.01 0.000001 Single Pulse 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 PULSE TIME (sec) Figure 13. Thermal Characteristics DEVICE ORDERING INFORMATION Device Marking Package Shipping† NVMFS5C430NT1G 5C430N DFN5 (Pb−Free) 1500 / Tape & Reel NVMFS5C430NWFT1G 430NWF DFNW5 (Pb−Free, Wettable Flanks) 1500 / Tape & Reel NVMFS5C430NT3G 5C430N DFN5 (Pb−Free) 5000 / Tape & Reel NVMFS5C430NWFT3G 430NWF DFNW5 (Pb−Free, Wettable Flanks) 5000 / Tape & Reel NVMFS5C430NAFT1G 5C430 DFN5 (Pb−Free) 1500 / Tape & Reel NVMFS5C430NAFT1G−YE 5C430 DFN5 (Pb−Free) 1500 / Tape & Reel NVMFS5C430NWFAFT1G 430NWF DFNW5 (Pb−Free, Wettable Flanks) 1500 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 5 NVMFS5C430N PACKAGE DIMENSIONS DFNW5 5x6 (FULL−CUT SO8FL WF) CASE 507BA ISSUE A q q www.onsemi.com 6 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS DFN5 5x6, 1.27P (SO−8FL) CASE 488AA ISSUE N 1 DATE 25 JUN 2018 SCALE 2:1 2X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS. 0.20 C D 2 A B D1 2X 0.20 C 4X E1 2 1 2 3 q E c A1 4 TOP VIEW C DETAIL A 0.10 C SEATING PLANE A 0.10 C SIDE VIEW MILLIMETERS MIN NOM MAX 0.90 1.00 1.10 0.00 −−− 0.05 0.33 0.41 0.51 0.23 0.28 0.33 5.00 5.15 5.30 4.70 4.90 5.10 3.80 4.00 4.20 6.00 6.30 6.15 5.70 5.90 6.10 3.45 3.65 3.85 1.27 BSC 0.51 0.575 0.71 1.20 1.35 1.50 0.51 0.575 0.71 0.125 REF 3.00 3.40 3.80 0_ −−− 12 _ DIM A A1 b c D D1 D2 E E1 E2 e G K L L1 M q GENERIC MARKING DIAGRAM* DETAIL A 1 0.10 b C A B 0.05 c 8X XXXXXX AYWZZ e/2 e L 1 4 K PIN 5 (EXPOSED PAD) RECOMMENDED SOLDERING FOOTPRINT* E2 L1 M 2X 0.495 4.560 2X 1.530 G D2 BOTTOM VIEW 2X XXXXXX = Specific Device Code A = Assembly Location Y = Year W = Work Week ZZ = Lot Traceability *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. Some products may not follow the Generic Marking. 0.475 3.200 4.530 STYLE 1: PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN 1.330 STYLE 2: 2X PIN 1. ANODE 0.905 2. ANODE 3. ANODE 4. NO CONNECT 0.965 5. CATHODE 1 4X 1.000 4X 0.750 1.270 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98AON14036D DFN5 5x6, 1.27P (SO−8FL) Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. 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