DATA SHEET
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MOSFET - Power, Single
N-Channel
V(BR)DSS
RDS(ON) MAX
ID MAX
80 V
2.1 mW @ 10 V
203 A
80 V, 2.1 mW, 203 A
NVMFS6H800N
D (5,6)
Features
•
•
•
•
•
•
Small Footprint (5x6 mm) for Compact Design
Low RDS(on) to Minimize Conduction Losses
Low QG and Capacitance to Minimize Driver Losses
NVMFS6H800NWF − Wettable Flank Option for Enhanced Optical
Inspection
AEC−Q101 Qualified and PPAP Capable
These Devices are Pb−Free and are RoHS Compliant
G (4)
S (1,2,3)
N−CHANNEL MOSFET
MARKING
DIAGRAMS
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
80
V
Gate−to−Source Voltage
VGS
±20
V
ID
203
A
Parameter
Continuous Drain
Current RqJC
(Notes 1, 3)
TC = 25°C
Power Dissipation
RqJC (Note 1)
Continuous Drain
Current RqJA
(Notes 1, 2, 3)
Steady
State
TC = 100°C
TC = 25°C
Pulsed Drain Current
PD
TC = 100°C
TA = 25°C
Power Dissipation
RqJA (Notes 1, 2)
143
Steady
State
100
ID
TA = 100°C
TA = 25°C
W
200
A
28
PD
W
3.8
1.9
IDM
900
A
TJ, Tstg
−55 to
+175
°C
IS
166
A
Single Pulse Drain−to−Source Avalanche
Energy (IL(pk) = 16.1 A)
EAS
1271
mJ
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
TL
260
°C
Operating Junction and Storage Temperature
Range
Source Current (Body Diode)
1
DFNW5
CASE 507BA
D
S
S
S
G
D
XXXXXX
AYWZZ
D
D
XXXXXX = Specific Device Code
A
= Assembly Location
Y
= Year
W
= Work Week
ZZ
= Lot Traceability
20
TA = 100°C
TA = 25°C, tp = 10 ms
DFN5
CASE 506EZ
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Junction−to−Case − Steady State
Junction−to−Ambient − Steady State (Note 2)
Symbol
Value
Unit
RqJC
0.75
°C/W
RqJA
39
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
© Semiconductor Components Industries, LLC, 2017
August, 2022 − Rev. 3
1
Publication Order Number:
NVMFS6H800N/D
NVMFS6H800N
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
80
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/
TJ
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
IDSS
Gate−to−Source Leakage Current
V
39
VGS = 0 V,
VDS = 80 V
mV/°C
TJ = 25 °C
10
TJ = 125°C
250
IGSS
VDS = 0 V, VGS = 20 V
VGS(TH)
VGS = VDS, ID = 330 mA
100
mA
nA
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
Threshold Temperature Coefficient
VGS(TH)/TJ
Drain−to−Source On Resistance
Forward Transconductance
RDS(on)
2.0
4.0
8.0
VGS = 10 V
gFS
ID = 20 A
VDS =15 V, ID = 50 A
1.7
V
mV/°C
2.1
138
mW
S
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
5530
VGS = 0 V, f = 1 MHz, VDS = 40 V
760
pF
27
Total Gate Charge
QG(TOT)
VGS = 10 V, VDS = 40 V; ID = 50 A
Threshold Gate Charge
QG(TH)
15
Gate−to−Source Charge
QGS
26
Gate−to−Drain Charge
QGD
Plateau Voltage
VGP
4.8
td(ON)
25
VGS = 10 V, VDS = 40 V; ID = 50 A
85
nC
16
V
SWITCHING CHARACTERISTICS (Note 5)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
tr
td(OFF)
VGS = 10 V, VDS = 64 V,
ID = 50 A, RG = 2.5 W
tf
89
ns
97
85
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
VSD
TJ = 25°C
0.8
TJ = 125°C
0.7
tRR
Charge Time
ta
Discharge Time
tb
Reverse Recovery Charge
VGS = 0 V,
IS = 50 A
1.2
V
76
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 50 A
QRR
36
ns
40
82
nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
5. Switching characteristics are independent of operating junction temperatures.
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2
NVMFS6H800N
TYPICAL CHARACTERISTICS
350
5.5 V to 10 V
5.0 V
250
200
150
4.5 V
100
50
RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)
0
250
200
150
1
2
3
5
4
6
7
50
0
8
TJ = 125°C
2
6
Figure 2. Transfer Characteristics
30
25
20
15
10
5
0
4
5
6
7
8
9
10
VGS, GATE−TO−SOURCE VOLTAGE (V)
3.0
TJ = 25°C
2.8
2.6
2.4
2.2
2.0
VGS = 10 V
1.8
1.6
1.4
1.2
1.0
0
100
50
150
200
250
300
ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
1M
2.4
VGS = 10 V
ID = 50 A
TJ = 175°C
TJ = 150°C
100K
IDSS, LEAKAGE (nA)
RDS(on), NORMALIZED DRAIN−TO−
SOURCE RESISTANCE
5
Figure 1. On−Region Characteristics
TJ = 25°C
ID = 50 A
2.2
4
VGS, GATE−TO−SOURCE VOLTAGE (V)
35
2.0
3
TJ = −55°C
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
40
3
TJ = 25°C
100
VGS = 4.0 V
0
VDS = 10 V
300
RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)
ID, DRAIN CURRENT (A)
300
ID, DRAIN CURRENT (A)
350
1.8
1.6
1.4
1.2
1.0
0.8
10K
TJ = 125°C
1K
TJ = 85°C
100
TJ = 25°C
10
0.6
0.4
−50 −25
1
0
25
50
75
100
125
150
175
5
15
25
35
45
55
65
75
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
NVMFS6H800N
TYPICAL CHARACTERISTICS
CISS
1K
COSS
100
10
VGS = 0 V
TJ = 25°C
f = 1 MHz
0
10
CRSS
20
30
40
50
60
70
10
VGS, GATE−TO−SOURCE VOLTAGE (V)
C, CAPACITANCE (pF)
10K
9
8
7
6
QGD
QGS
5
4
3
VDS = 40 V
TJ = 25°C
ID = 50 A
2
1
0
80
10
0
30
20
50
40
60
QG, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source vs. Total Charge
1K
80
70
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
1K
IS, SOURCE CURRENT (A)
VGS = 0 V
td(off)
100
tf
VGS = 10 V
VDS = 64 V
ID = 50 A
td(on)
10
1
10
ID, DRAIN CURRENT (A)
0.1
100
TJ = 125°C
1
TJ = −55°C
TJ = 25°C
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
RG, GATE RESISTANCE (W)
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1K
1000
TC = 25°C
VGS ≤ 10 V
Single Pulse
100
TJ (initial) = 25°C
100
10 ms
10
1
0.1
10
IPEAK, (A)
t, TIME (ns)
100
tr
RDS(on) Limit
Thermal Limit
Package Limit
0.1
1
10
10
0.5 ms
1 ms
10 ms
1
1K
100
TJ (initial) = 100°C
0.00001
0.0001
0.001
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
TIME IN AVALANCHE (s)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. IPEAK vs. Time in Avalanche
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4
0.01
NVMFS6H800N
TYPICAL CHARACTERISTICS
100
50% Duty Cycle
RqJA(t) (°C/W)
10
1
20%
10%
5%
2%
1%
0.1
0.01
Single Pulse
0.001
0.000001 0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
t, PULSE TIME (sec)
Figure 13. Thermal Response
DEVICE ORDERING INFORMATION
Device
Case
Marking
Package
Shipping†
NVMFS6H800NT1G
506EZ
6H800N
DFN5
(Pb−Free)
1500 / Tape & Reel
NVMFS6H800NWFT1G
507BA
800NWF
DFNW5
(Pb−Free, Wettable Flanks)
1500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
NVMFS6H800N
PACKAGE DIMENSIONS
DFNW5 5x6 (FULL−CUT SO8FL WF)
CASE 507BA
ISSUE A
q
q
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P (SO−8FL)
CASE 506EZ
ISSUE A
DATE 25 AUG 2021
1
SCALE 2:1
q
q
GENERIC
MARKING DIAGRAM*
1
XXXXXX
AYWZZ
XXXXXX = Specific Device Code
A
= Assembly Location
Y
= Year
W
= Work Week
ZZ
= Lot Traceability
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
DOCUMENT NUMBER:
DESCRIPTION:
98AON24855H
DFN5 5x6, 1.27P (SO−8FL)
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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