MOSFET - Power, Single
N-Channel
80 V, 3.2 mW, 135 A
NVMFS6H818NL
Features
•
•
•
•
•
•
Small Footprint (5x6 mm) for Compact Design
Low RDS(on) to Minimize Conduction Losses
Low QG and Capacitance to Minimize Driver Losses
NVMFS6H818NLWF − Wettable Flank Option for Enhanced Optical
Inspection
AEC−Q101 Qualified and PPAP Capable
These Devices are Pb−Free and are RoHS Compliant
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V(BR)DSS
RDS(ON) MAX
ID MAX
3.2 mW @ 10 V
80 V
135 A
4.1 mW @ 4.5 V
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
80
V
Gate−to−Source Voltage
VGS
±20
V
ID
135
A
Continuous Drain
Current RqJC
(Notes 1, 3)
TC = 25°C
Power Dissipation
RqJC (Note 1)
Continuous Drain
Current RqJA
(Notes 1, 2, 3)
Steady
State
TC = 100°C
TC = 25°C
Power Dissipation
RqJA (Notes 1, 2)
Pulsed Drain Current
Steady
State
PD
ID
N−CHANNEL MOSFET
A
22
PD
W
3.8
1
1.9
IDM
772
A
TJ, Tstg
−55 to
+175
°C
IS
116
A
Single Pulse Drain−to−Source Avalanche
Energy (IL(pk) = 9.3 A)
EAS
707
mJ
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
TL
260
°C
Operating Junction and Storage Temperature
Range
Source Current (Body Diode)
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
MARKING
DIAGRAM
16
TA = 100°C
TA = 25°C, tp = 10 ms
S (1,2,3)
W
140
70
TA = 100°C
TA = 25°C
G (4)
95
TC = 100°C
TA = 25°C
D (5,6)
Symbol
Value
Unit
Junction−to−Case − Steady State
RqJC
1.1
°C/W
Junction−to−Ambient − Steady State (Note 2)
RqJA
39
DFN5
(SO−8FL)
CASE 488AA
STYLE 1
D
S
S
S
G
D
XXXXXX
AYWZZ
D
D
XXXXXX = 6H818L
XXXXXX = (NVMFS6H818NL) or
XXXXXX = 818LWF
XXXXXX = (NVMFS6H818NLWF)
A
= Assembly Location
Y
= Year
W
= Work Week
ZZ
= Lot Traceability
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
© Semiconductor Components Industries, LLC, 2019
March, 2020 − Rev. 0
1
Publication Order Number:
NVMFS6H818NL/D
NVMFS6H818NL
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
80
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/
TJ
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
IDSS
Gate−to−Source Leakage Current
V
44.6
VGS = 0 V,
VDS = 80 V
mV/°C
TJ = 25 °C
10
TJ = 125°C
100
IGSS
VDS = 0 V, VGS = 20 V
VGS(TH)
VGS = VDS, ID = 190 mA
100
mA
nA
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
Threshold Temperature Coefficient
VGS(TH)/TJ
Drain−to−Source On Resistance
Forward Transconductance
RDS(on)
1.2
2.0
−5.3
V
mV/°C
VGS = 10 V
ID = 20 A
2.7
3.2
mW
VGS = 4.5 V
ID = 20 A
3.3
4.1
mW
gFS
VDS = 8 V, ID = 50 A
200
S
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
3844
VGS = 0 V, f = 1 MHz, VDS = 40 V
484
Total Gate Charge
QG(TOT)
Threshold Gate Charge
QG(TH)
6
Gate−to−Source Charge
QGS
11
Gate−to−Drain Charge
QGD
Plateau Voltage
Total Gate Charge
pF
21
VGS = 10 V, VDS = 40 V; ID = 50 A
VGS = 4.5 V, VDS = 40 V; ID = 50 A
64
nC
11.2
VGP
3
V
QG(TOT)
31
nC
td(ON)
22
SWITCHING CHARACTERISTICS (Note 5)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
tr
td(OFF)
VGS = 4.5 V, VDS = 64 V,
ID = 50 A, RG = 2.5 W
tf
106
ns
39
13
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
Charge Time
Discharge Time
Reverse Recovery Charge
VSD
VGS = 0 V,
IS = 20 A
TJ = 25°C
0.77
TJ = 125°C
0.63
tRR
ta
tb
1.2
V
59
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 50 A
QRR
33
ns
25
73
nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
5. Switching characteristics are independent of operating junction temperatures.
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2
NVMFS6H818NL
TYPICAL CHARACTERISTICS
VGS = 10 V to 3.4 V
3.2 V
3.0 V
80
60
2.8 V
40
2.6 V
20
RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)
ID, DRAIN CURRENT (A)
100
0
0
1
2
3
4
80
60
TJ = 25°C
40
0
5
TJ = 125°C
0
1.0
1.5
2.0
2.5
3.5
3.0
VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
7
6
5
4
3
2
1
4
6
5
7
8
10
9
VGS, GATE−TO−SOURCE VOLTAGE (V)
5
4.0
TJ = 25°C
4
VGS = 4.5 V
3
VGS = 10 V
2
1
0
10
5
20
15
ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
1000
2.5
VGS = 10 V
ID = 20 A
100 T = 175°C
J
2.0
IDSS, LEAKAGE (nA)
RDS(on), NORMALIZED DRAIN−TO−
SOURCE RESISTANCE
0.5
TJ = −55°C
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
TJ = 25°C
ID = 20 A
3
100
20
8
0
VDS = 8 V
120
RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)
ID, DRAIN CURRENT (A)
120
1.5
1.0
TJ = 150°C
10
TJ = 125°C
1
TJ = 85°C
0.1
TJ = 25°C
0.01
0.001
0.5
−50
−25
0
25
50
75
100
125
150
175
0.0001
5
15
25
35
45
55
65
75
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
NVMFS6H818NL
10K
CISS
C, CAPACITANCE (pF)
1K
COSS
100
CRSS
10
1
VGS = 0 V
TJ = 25°C
f = 1 MHz
0
10
20
30
40
50
60
70
80
VGS, GATE−TO−SOURCE VOLTAGE (V)
TYPICAL CHARACTERISTICS
6
QGS
4
VDS = 40 V
ID = 50 A
TJ = 25°C
2
0
10
0
40
50
60
Figure 8. Gate−to−Source Voltage vs. Total
Charge
td(off)
td(on)
tf
VGS = 4.5 V
VDS = 64 V
ID = 50 A
1
10
VGS = 0 V
10
TJ = 125°C
1
0.3
50
0.4
TJ = −55°C
TJ = 25°C
0.5
0.6
0.7
0.8
0.9
1.0
RG, GATE RESISTANCE (W)
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1000
100
100
IPEAK (A)
TJ(initial) = 25°C
10 ms
10
TA = 25°C
Single Pulse
1 VGS ≤ 10 V
0.1
30
20
Figure 7. Capacitance Variation
tr
10
QGD
QG, TOTAL GATE CHARGE (nC)
IS, SOURCE CURRENT (A)
t, TIME (ns)
8
20
100
ID, DRAIN CURRENT (A)
10
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
1000
1
12
0.1
RDS(on) Limit
Thermal Limit
Package Limit
1
10
10
0.5 ms
1 ms
10 ms
100
TJ(initial) = 100°C
1000
1
0.0001
0.001
0.01
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
TIME IN AVALANCHE (s)
Figure 11. Safe Operating Area
Figure 12. Maximum Drain Current vs. Time in
Avalanche
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4
NVMFS6H818NL
TYPICAL CHARACTERISTICS
100
R(t) (°C/W)
50% Duty Cycle
10 20%
10%
5%
1
2%
1%
0.1
Single Pulse
0.01
0.000001
0.00001
0.0001
0.001
0.01
1
0.1
10
100
1000
PULSE TIME (sec)
Figure 13. Thermal Response
DEVICE ORDERING INFORMATION
Device
Marking
Package
Shipping†
NVMFS6H818NLT1G
6H818L
DFN5
(Pb−Free)
1500 / Tape & Reel
NVMFS6H818NLWFT1G
818LWF
DFN5
(Pb−Free, Wettable Flanks)
1500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE N
1
DATE 25 JUN 2018
SCALE 2:1
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
0.20 C
D
A
2
B
D1
2X
0.20 C
4X
E1
2
q
E
c
1
2
3
A1
4
TOP VIEW
C
DETAIL A
0.10 C
SEATING
PLANE
A
0.10 C
SIDE VIEW
MILLIMETERS
MIN
NOM
MAX
0.90
1.00
1.10
0.00
−−−
0.05
0.33
0.41
0.51
0.23
0.28
0.33
5.00
5.15
5.30
4.70
4.90
5.10
3.80
4.00
4.20
6.00
6.30
6.15
5.70
5.90
6.10
3.45
3.65
3.85
1.27 BSC
0.51
0.575
0.71
1.20
1.35
1.50
0.51
0.575
0.71
0.125 REF
3.00
3.40
3.80
0_
−−−
12 _
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
q
GENERIC
MARKING DIAGRAM*
DETAIL A
1
0.10
b
C A B
0.05
c
8X
XXXXXX
AYWZZ
e/2
e
L
1
4
K
RECOMMENDED
SOLDERING FOOTPRINT*
E2
PIN 5
(EXPOSED PAD)
L1
M
2X
0.495
4.560
2X
1.530
G
D2
2X
BOTTOM VIEW
XXXXXX = Specific Device Code
A
= Assembly Location
Y
= Year
W
= Work Week
ZZ
= Lot Traceability
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
0.475
3.200
4.530
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
1.330
STYLE 2:
2X
PIN 1. ANODE
0.905
2. ANODE
3. ANODE
4. NO CONNECT
0.965
5. CATHODE
1
4X
1.000
4X 0.750
1.270
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON14036D
DFN5 5x6, 1.27P (SO−8FL)
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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