DATA SHEET
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MOSFET – Power, Single
N-Channel
40 V, 0.48 mW, 533 A
V(BR)DSS
RDS(ON) MAX
ID MAX
40 V
0.48 mW @ 10 V
533 A
NVMTS0D6N04C
D (5−8)
Features
•
•
•
•
•
•
Small Footprint (8x8 mm) for Compact Design
Low RDS(on) to Minimize Conduction Losses
Low QG and Capacitance to Minimize Driver Losses
Wettable Flank Plated for Enhanced Optical Inspection
AEC−Q101 Qualified and PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
G (1)
S (2−4)
N−CHANNEL MOSFET
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
40
V
Gate−to−Source Voltage
VGS
±20
V
ID
533
A
Parameter
Continuous Drain
Current RqJC (Note 2)
Steady
State
Power Dissipation
RqJC (Note 2)
Steady
State
Continuous Drain
Current RqJA
(Notes 1, 2)
Steady
State
Power Dissipation
RqJA (Notes 1, 2)
Steady
State
Pulsed Drain Current
TA = 25°C, tp = 10 ms
TC = 25°C
TC = 100°C
TC = 25°C
377
PD
TC = 100°C
TA = 25°C
W
245
122.7
ID
TA = 100°C
TA = 25°C
A
76
PD
0D6N04C
AWLYWW
W
5.0
2.5
IDM
900
A
TJ, Tstg
−55 to
+175
°C
IS
204.5
A
Single Pulse Drain−to−Source Avalanche
Energy (IL(pk) = 53 A)
EAS
2035
mJ
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
TL
260
°C
Source Current (Body Diode)
MARKING DIAGRAM
54
TA = 100°C
Operating Junction and Storage Temperature
TDFNW8
CASE 507AP
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
A
WL
Y
WW
= Assembly Location
= 2−digit Wafer Lot Code
= Year Code
= Work Week Code
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Junction−to−Case − Steady State (Note 2)
Junction−to−Ambient − Steady State (Note 2)
Symbol
Value
Unit
RqJC
0.61
°C/W
RqJA
30.2
in2
1. Surface−mounted on FR4 board using a 1
pad size, 1 oz. Cu pad.
2. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
© Semiconductor Components Industries, LLC, 2018
August, 2021 − Rev. 3
1
Publication Order Number:
NVMTS0D6N04C/D
NVMTS0D6N04C
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
40
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/
TJ
ID = 250 mA, ref to 25°C
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
IDSS
Gate−to−Source Leakage Current
VGS = 0 V,
VDS = 40 V
V
13.19
mV/°C
TJ = 25°C
10
TJ = 125°C
250
IGSS
VDS = 0 V, VGS = 20 V
VGS(TH)
VGS = VDS, ID = 250 mA
VGS(TH)/TJ
ID = 250 mA, ref to 25°C
100
mA
nA
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
Negative Threshold Temperature Coefficient
Drain−to−Source On Resistance
RDS(on)
VGS = 10 V
ID = 50 A
2.0
4.0
−8.28
0.39
V
mV/°C
0.48
mW
Forward Transconductance
gFS
VDS =5 V, ID = 50 A
233
S
Gate Resistance
RG
TA = 25°C
1.0
W
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
CISS
Output Capacitance
COSS
11800
Reverse Transfer Capacitance
CRSS
199
Total Gate Charge
QG(TOT)
187
Threshold Gate Charge
QG(TH)
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
VGS = 0 V, f = 1 MHz, VDS = 20 V
VGS = 10 V, VDS = 20 V; ID = 50 A
7030
pF
29.7
nC
46.6
38.2
SWITCHING CHARACTERISTICS, VGS = 10 V (Note 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
tr
td(OFF)
33.6
VGS = 10 V, VDS = 20 V,
ID = 50 A, RG = 2.5 W
tf
27.9
ns
86.0
32.3
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
VSD
TJ = 25°C
0.76
TJ = 125°C
0.6
tRR
Charge Time
ta
Discharge Time
tb
Reverse Recovery Charge
VGS = 0 V,
IS = 50 A
1.2
V
105
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 50 A
QRR
60
ns
45
274
nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
4. Switching characteristics are independent of operating junction temperatures.
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2
NVMTS0D6N04C
TYPICAL CHARACTERISTICS
400
280
4.5 V
240
200
160
120
80
4.0 V
40
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)
ID, DRAIN CURRENT (A)
320
2
1
4
3
400
300
TJ = 25°C
200
5
TJ = 125°C
2
2.0
1.5
1.0
0.5
7
6
5
7
8
9
10
VGS, GATE−TO−SOURCE VOLTAGE (V)
1.0
TJ = 25°C
0.9
0.8
0.7
0.6
0.5
VGS = 10 V
0.4
0.3
0.2
0.1
0
5
15
1E+06
IDSS, LEAKAGE CURRENT (nA)
0.8
85
75
95
TJ = 125°C
TJ = 85°C
1E+03
1.0
65
TJ = 150°C
1E+04
1.2
55
TJ = 175°C
1E+05
1.4
45
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
2.0
VGS = 10 V
ID = 50 A
35
25
ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
RDS(on), NORMALIZED DRAIN−TO−
SOURCE RESISTANCE
6
Figure 2. Transfer Characteristics
2.5
1E+02
0.6
0.4
TJ = 25°C
1E+01
0.2
0
−55
5
Figure 1. On−Region Characteristics
3.0
1.6
TJ = −55°C
4
VGS, GATE−TO−SOURCE VOLTAGE (V)
TJ = 25°C
ID = 50 A
1.8
3
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
3.5
4
500
0
4.0
0
600
100
3.6 V
0
VDS = 10 V
700
4.8 V
RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)
ID, DRAIN CURRENT (A)
800
VGS = 6 V to 10 V
360
−25
0
25
50
75
100
125
150
175
1E+00
5
10
15
20
25
30
35
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
40
NVMTS0D6N04C
TYPICAL CHARACTERISTICS
VGS, GATE−TO−SOURCE VOLTAGE (V)
100K
C, CAPACITANCE (pF)
COSS
10K
CISS
VGS = 0 V
TJ = 25°C
f = 1 MHz
1K
CRSS
100
0
10
30
20
8
7
6
QGS
5
QGD
4
3
VDS = 20 V
TJ = 25°C
ID = 50 A
2
1
0
40
20
0
60
40
100
80
120
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
QG, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source Voltage vs. Total
Charge
1E−06
VGS = 0 V
IS, SOURCE CURRENT (A)
t, SWITCHING TIME (s)
VGS = 10 V
VDS = 20 V
ID = 50 A
td(off)
tf
1E−07
td(on)
tr
1E−08
TJ = 175°C
TJ = 150°C
1
TJ = 25°C
3
1
5
7
9
0.1
0
0.2
0.3
0.4
0.5
0.7
0.8
0.9
1
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1000
10 ms
TC = 25°C
Single Pulse
VGS ≤ 10 V
1
IPEAK (A)
100
0.1
0.6
RG, GATE RESISTANCE (W)
100
10
TJ = −55°C
TJ = 125°C
0.1
1000
ID, DRAIN CURRENT(A)
10
0.5 ms
1 ms
TJ(initial) = 25°C
TJ(initial) = 100°C
10
10 ms
RDS(on) Limit
Thermal Limit
Package Limit
0.1
1
10
100
1000
1
0.0001
0.001
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
TIME IN AVALANCHE (s)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. IPEAK vs. Time in Avalanche
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4
0.01
NVMTS0D6N04C
TYPICAL CHARACTERISTICS
100
Duty Cycle = 0.5
R(t) (°C/W)
10
0.2
0.1
0.05
1 0.02
0.01
0.1
0.01
0.001
Single Pulse
0.000001
0.00001
0.0001
0.001
0.1
0.01
1
10
100
1000
PULSE TIME (sec)
Figure 13. Thermal Characteristics
DEVICE ORDERING INFORMATION
Device
NVMTS0D6N04CTXG
Marking
Package
Shipping†
0D6N04C
DFNW8
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TDFNW8 8.3x8.4, 2.0P, SINGLE COOL
CASE 507AP
ISSUE D
DATE 29 MAR 2021
GENERIC
MARKING DIAGRAM*
XXXX
A
WL
Y
WW
= Specific Device Code
= Assembly Location
= Wafer Lot Code
= Year Code
= Work Week Code
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
DOCUMENT NUMBER:
DESCRIPTION:
98AON80534G
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
TDFNW8 8.3x8.4, 2.0P, SINGLE COOL
PAGE 1 OF 1
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