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or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application
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MOSFET – Power, Single
N-Channel, DFNW8
150 V, 4.45 mW, 165 A
NVMTS4D3N15MC
Features
•
•
•
•
•
Small Footprint (8x8 mm) for Compact Design
Low RDS(on) to Minimize Conduction Losses
Low QG and Capacitance to Minimize Driver Losses
AEC−Q101 Qualified and PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Parameter
Value
Unit
VDSS
Drain−to−Source Voltage
150
V
VGS
Gate−to−Source Voltage
±20
V
165
A
ID
Continuous Drain
Current RqJC (Note 2)
PD
Power Dissipation
RqJC (Note 2)
ID
Continuous Drain
Current RqJC (Note 2)
PD
Power Dissipation
RqJC (Note 2)
ID
Continuous Drain
Current RqJA
(Notes 1, 2)
PD
Power Dissipation
RqJA (Notes 1, 2)
ID
Continuous Drain
Current RqJA
(Notes 1, 2)
PD
Power Dissipation
RqJA (Notes 1, 2)
IDM
Pulsed Drain Current
TJ, Tstg
IS
EAS
TL
Steady
State
Steady
State
Steady
State
TC = 25°C
TC =
100°C
TA = 25°C
292
W
117
A
146
W
21
A
15
A
2.4
W
900
A
−55 to
+175
°C
Source Current (Body Diode)
243
A
Single Pulse Drain−to−Source Avalanche
Energy (IL = 14.1 A)
3390
mJ
Lead Temperature Soldering Reflow for
Soldering Purposes (1/8″ from case for 10 s)
260
°C
TA = 25°C, tp = 10 ms
Operating Junction and Storage Temperature
Range
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Surface−mounted on FR4 board using 1 in2 pad size, 1 oz Cu pad.
2. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted
© Semiconductor Components Industries, LLC, 2020
December, 2020 − Rev. 0
ID MAX
150 V
4.45 mW @ 10 V
165 A
G (1)
N−CHANNEL MOSFET
Top
W
TA =
100°C
RDS(ON) MAX
S (2, 3, 4)
5
Steady
State
V(BR)DSS
D (5, 6, 7, 8)
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Symbol
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1
Bottom
DFNW8
CASE 507AP
MARKING DIAGRAM
4D3N15MC
AWLYWW
4D3N15MC
A
WL
Y
WW
= Specific Device Code
= Assembly Location
= Wafer Lot Code
= Year Code
= Work Week Code
ORDERING INFORMATION
Device
Package
Shipping†
NVMTS4D3N15MC
DFNW8
(Pb−Free)
3000 / Tape &
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Publication Order Number:
NVMTS4D3N15MC/D
NVMTS4D3N15MC
THERMAL RESISTANCE RATINGS
Symbol
Parameter
Max
Unit
°C/W
RqJC
Junction−to−Case – Steady State (Note 2)
0.5
RqJA
Junction−to−Ambient – Steady State (Note 2)
31.4
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
V(BR)DSS
Drain−to−Source Breakdown Voltage
VGS = 0 V, ID = 250 mA
150
−
−
V
V(BR)DSS / TJ
Drain−to−Source Breakdown Voltage
Temperature Coefficient
ID = 250 mA, ref to 25°C
−
49.84
−
mV/°C
Zero Gate Voltage Drain Current
VGS = 0 V,
VDS = 120 V
TJ = 25°C
−
−
1
mA
TJ = 125°C
−
−
10
mA
VDS = 0 V, VGS = ±20 V
−
−
±100
nA
Gate Threshold Voltage
VGS = VDS, ID = 521 mA
2.5
3.6
4.5
V
IDSS
IGSS
Gate−to−Source Leakage Current
ON CHARACTERISTICS (Note 3)
VGS(TH)
VGS(TH) / TJ
Negative Threshold Temperature Coefficient
ID = 250 mA, ref to 25°C
−
−9.93
−
mV/°C
Drain−to−Source On Resistance
VGS = 10 V, ID = 95 A
−
3.4
4.45
mW
gFS
Forward Transconductance
VDS = 5 V, ID = 95 A
−
177
−
S
RG
Gate−Resistance
TA = 25°C
−
1.1
−
W
VGS = 0 V, f = 1 MHz,
VDS = 75V
−
6514
−
pF
−
1750
−
−
12.5
−
−
79
−
−
21
−
−
36
−
RDS(on)
CHARGES & CAPACITANCES
CISS
Input Capacitance
COSS
Output Capacitance
CRSS
Reverse Transfer Capacitance
VGS = 10 V, VDS = 75 V,
ID = 95 A
VGS = 10 V, VDS = 75 V,
ID = 95 A
QG(TOT)
Total Gate Charge
QG(TH)
Threshold Gate Charge
QGS
Gate−to−Source Charge
QGD
Gate−to−Drain Charge
−
11
−
VGP
Plateau Voltage
−
5.8
−
−
38
−
−
11
−
Turn−Off Delay Time
−
48
−
Fall Time
−
8
−
TJ = 25°C
−
0.86
1.2
TJ = 125°C
−
0.80
−
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 95 A
−
85
−
−
58
−
nC
SWITCHING CHARACTERISTICS, VGS = 10 V (Note 3)
td(ON)
tr
td(OFF)
tf
Turn−On Delay Time
Rise Time
VGS = 10 V, VDS=75 V,
ID = 95 A, RG = 6 W
ns
DRAIN−SOURCE DIODE CHARACTERISTICS
VSD
tRR
Forward Diode Voltage
Reverse Recovery Time
VGS = 0 V,
IS = 95 A
ta
Charge Time
tb
Discharge Time
−
38
−
Reverse Recovery Charge
−
194
−
QRR
V
ns
nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Switching characteristics are independent of operating junction temperatures
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NVMTS4D3N15MC
TYPICAL CHARACTERISTICS
176
ID, DRAIN CURRENT (A)
128
112
96
80
64
5.5 V
48
32
5.0 V
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
128
112
96
80
64
TJ = 25°C
48
32
TJ = 175°C
3
4
TJ = −55°C
5
6
7
9
8
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
18
16
14
12
10
8
6
4
2
5.5 6.0
6.5
7.0
7.5
8.0
8.5
9.0
9.5
10
VGS, GATE−TO−SOURCE VOLTAGE (V)
TJ = 25°C
5
4
VGS = 10 V
3
2
1
0
60
90
120
150
180
210
ID, DRAIN CURRENT (A)
1M
IDSS, LEAKAGE (nA)
2.0
1.5
1.0
0
30
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
VGS = 10 V
ID = 95 A
0.5
−50 −25
10
6
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
RDS(on), NORMALIZED DRAIN−TO−
SOURCE RESISTANCE
2
VGS, GATE−TO−SOURCE VOLTAGE (V)
TJ = 25°C
ID = 95 A
2.5
1
0
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
20
0
VDS = 5 V
144
16
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)
ID, DRAIN CURRENT (A)
160
6.0 V
144
16
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)
176
VGS = 10 V to 6.5 V
160
25
50
75
100
125
150
175
100K
TJ = 175°C
TJ = 150°C
10K
TJ = 125°C
1K
100
0
30
60
90
120
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
150
NVMTS4D3N15MC
TYPICAL CHARACTERISTICS
VGS, GATE−TO−SOURCE VOLTAGE (V)
10K
CISS
C, CAPACITANCE (pF)
1K
COSS
100
10
0
1K
25
50
100
125
150
6
5
4
3
VDS = 75 V
ID = 95 A
TJ = 25°C
2
1
0
10
0
20
30
40
50
60
70
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
1K
VGS = 10 V
VDS = 75 V
ID = 95 A
tr
td(off)
tf
1
10
80
VGS = 0 V
100
10
TJ = 175°C
1
0.1
100
TJ = 150°C
TJ = 25°C
0.2
0.3
0.4
0.5
0.6
TJ = −55°C
0.7
0.8
0.9
1.0
RG, GATE RESISTANCE (W)
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1000
100
IPEAK, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
QGD
QGS
7
Figure 7. Capacitance Variation
10
10 ms
100
10
1
8
QG, TOTAL GATE CHARGE (nC)
td(on)
1
QG(TOT)
9
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
100
t, TIME (ns)
75
IS, SOURCE CURRENT (A)
1
CRSS
VGS = 0 V
TJ = 25°C
f = 1 MHz
10
TC = 25°C
Single Pulse
VGS ≤ 10 V
0.1
0.1
0.5 ms
1 ms
10 ms
RDS(on) Limit
Thermal Limit
Package Limit
1
10
100
1000
TJ(initial) = 25°C
10
1
0.0001
TJ(initial) = 125°C
0.001
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
TIME IN AVALANCHE (sec)
Figure 11. Safe Operating Area
Figure 12. IPEAK vs. Time in Avalanche
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4
0.01
NVMTS4D3N15MC
TYPICAL CHARACTERISTICS
100
50% Duty Cycle
20%
10%
5%
1 2%
1%
RqJC (°C/W)
10
0.1
0.01
0.001
Single Pulse
0.0001
0.0000001 0.000001
0.00001
0.0001
0.001
0.01
0.1
PULSE TIME (sec)
Figure 13. Thermal Characteristics
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5
1
10
100
1000
NVMTS4D3N15MC
PACKAGE DIMENSIONS
DFNW8 8.3x8.4, 2P
CASE 507AP
ISSUE A
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6
NVMTS4D3N15MC
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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