NVMYS1D3N04CTWG

NVMYS1D3N04C MOSFET – Power, Single N-Channel 40 V, 1.15 mW, 252 A Features • • • • • • www.onsemi.com Small Footprint (5x6 mm) for Compact Design Low RDS(on) to Minimize Conduction Losses Low QG and Capacitance to Minimize Driver Losses LFPAK4 Package, Industry Standard AEC−Q101 Qualified and PPAP Capable These Devices are Pb−Free and are RoHS Compliant V(BR)DSS RDS(ON) MAX ID MAX 40 V 1.15 mW @ 10 V 252 A MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Symbol Value Unit Drain−to−Source Voltage VDSS 40 V Gate−to−Source Voltage VGS ±20 V ID 252 A Parameter Continuous Drain Current RqJC (Notes 1, 3) Steady State Power Dissipation RqJC (Note 1) Continuous Drain Current RqJA (Notes 1, 2, 3) TC = 100°C TC = 25°C Power Dissipation RqJA (Notes 1, 2) TA = 25°C PD ID N−CHANNEL MOSFET A 43 PD W 3.9 900 A TJ, Tstg −55 to + 175 °C IS 112 A Single Pulse Drain−to−Source Avalanche Energy (IL(pk) = 21 A) EAS 1621 mJ Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) TL 260 °C Source Current (Body Diode) Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. THERMAL RESISTANCE MAXIMUM RATINGS Parameter D 1.9 IDM Operating Junction and Storage Temperature MARKING DIAGRAM 30 TA = 100°C TA = 25°C, tp = 10 ms S (1,2,3) W 134 67 TA = 100°C TA = 25°C G (4) 178 TC = 100°C Steady State Pulsed Drain Current TC = 25°C D (5,8) 1D3N04 C AWLYW LFPAK4 CASE 760AB 1 1D3N04C A WL Y W S S S G = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week ORDERING INFORMATION Symbol Value Unit Junction−to−Case − Steady State RqJC 1.12 °C/W Junction−to−Ambient − Steady State (Note 2) RqJA 39 See detailed ordering, marking and shipping information in the package dimensions section on page 5 of this data sheet. 1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 2. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad. 3. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. © Semiconductor Components Industries, LLC, 2018 July, 2019 − Rev. 1 1 Publication Order Number: NVMYS1D3N04C/D NVMYS1D3N04C ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter Symbol Test Condition Min Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 40 Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/ TJ Typ Max Unit OFF CHARACTERISTICS Zero Gate Voltage Drain Current IDSS Gate−to−Source Leakage Current V 20 VGS = 0 V, VDS = 40 V mV/°C TJ = 25°C 10 TJ = 125°C 100 IGSS VDS = 0 V, VGS = 20 V VGS(TH) VGS = VDS, ID = 180 mA 100 mA nA ON CHARACTERISTICS (Note 4) Gate Threshold Voltage Threshold Temperature Coefficient VGS(TH)/TJ Drain−to−Source On Resistance Forward Transconductance RDS(on) 2.5 3.5 −8.0 VGS = 10 V gFS ID = 50 A VDS =15 V, ID = 50 A 0.96 V mV/°C 1.15 143 mW S CHARGES, CAPACITANCES & GATE RESISTANCE Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS 4855 VGS = 0 V, f = 1 MHz, VDS = 25 V 2565 pF 71 Total Gate Charge QG(TOT) VGS = 10 V, VDS = 32 V; ID = 50 A Threshold Gate Charge QG(TH) 12 Gate−to−Source Charge QGS 20 Gate−to−Drain Charge QGD Plateau Voltage VGP 4.4 td(ON) 15 VGS = 10 V, VDS = 32 V; ID = 50 A 75 nC 17 V SWITCHING CHARACTERISTICS (Note 5) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time tr td(OFF) VGS = 10 V, VDS = 32 V, ID = 50 A, RG = 2.5 W tf 22 ns 48 16 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time VSD TJ = 25°C 0.8 TJ = 125°C 0.6 tRR Charge Time ta Discharge Time tb Reverse Recovery Charge VGS = 0 V, IS = 50 A 1.2 V 70 VGS = 0 V, dIS/dt = 100 A/ms, IS = 50 A QRR 40 ns 30 105 nC Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 5. Switching characteristics are independent of operating junction temperatures. www.onsemi.com 2 NVMYS1D3N04C TYPICAL CHARACTERISTICS 360 320 280 240 200 160 4.8 V 120 80 4.5 V 40 0 RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW) ID, DRAIN CURRENT (A) 6.0 V 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 240 200 160 TJ = 25°C 120 80 5.0 TJ = 125°C 2.0 TJ = −55°C 4.5 4.0 5.5 5.0 Figure 2. Transfer Characteristics 35 30 25 20 15 10 6 5 7 8 9 10 VGS, GATE−TO−SOURCE VOLTAGE (V) 6.0 6 TJ = 25°C 5 4 3 2 VGS = 10 V 1 0 10 30 50 70 90 110 130 150 ID, DRAIN CURRENT (A) Figure 3. On−Resistance vs. Gate−to−Source Voltage Figure 4. On−Resistance vs. Drain Current and Gate Voltage 2.0 1E+06 VGS = 10 V ID = 50 A IDSS, LEAKAGE CURRENT (nA) RDS(on), NORMALIZED DRAIN−TO− SOURCE RESISTANCE 3.5 Figure 1. On−Region Characteristics 40 1E+05 1.6 TJ = 150°C TJ = 125°C 1E+04 1.4 1.2 1.0 1E+03 TJ = 85°C 1E+02 TJ = 25°C 1E+01 0.8 0.6 −50 3.0 VGS, GATE−TO−SOURCE VOLTAGE (V) TJ = 25°C ID = 50 A 1.8 2.5 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 45 4 280 0 50 5 0 VDS = 10 V 40 4.0 V RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW) ID, DRAIN CURRENT (A) 320 360 5.5 V VGS = 6.5 V to 10 V −25 0 25 50 75 100 125 150 175 1E+00 5 10 15 20 25 30 35 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage www.onsemi.com 3 40 NVMYS1D3N04C C, CAPACITANCE (pF) 10K VGS, GATE−TO−SOURCE VOLTAGE (V) TYPICAL CHARACTERISTICS CISS COSS 1K 100 CRSS VGS = 0 V TJ = 25°C f = 1 MHz 10 0 5 10 15 20 30 25 40 35 QGD 4 3 VDS = 32 V TJ = 25°C ID = 50 A 2 1 0 10 0 20 30 40 50 60 70 100 VGS = 0 V tf IS, SOURCE CURRENT (A) t, SWITCHING TIME (ns) QGS 5 Figure 8. Gate−to−Source Voltage vs. Total Charge tr td(on) 10 VGS = 10 V VDS = 32 V ID = 50 A 20 10 0 30 40 50 10 1 TJ = 125°C 0.1 60 TJ = 25°C 0.2 0.4 0.6 TJ = −55°C 0.8 1.0 1.2 RG, GATE RESISTANCE (W) VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current 1000 IPEAK, DRAIN CURRENT (A) 1000 ID, DRAIN CURRENT(A) 6 Figure 7. Capacitance Variation 100 100 10 ms TC = 25°C Single Pulse VGS ≤ 10 V 1 0.1 8 7 QG, TOTAL GATE CHARGE (nC) td(off) 10 9 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 1000 1 10 RDS(on) Limit Thermal Limit Package Limit 0.1 1 10 0.5 ms 1 ms 10 ms 100 1000 TJ(initial) = 25°C 100 10 TJ(initial) = 100°C 1 0.1 0.00001 0.0001 0.001 0.01 VDS, DRAIN−TO−SOURCE VOLTAGE (V) TAV, TIME IN AVALANCHE (S) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. Maximum Drain Current vs. Time in Avalanche www.onsemi.com 4 NVMYS1D3N04C TYPICAL CHARACTERISTICS RqJC(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE (°C/W) 100 Duty Cycle = 0.5 0.2 0.1 0.05 1 0.02 0.01 10 0.1 0.01 0.001 Single Pulse 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 t, PULSE TIME (s) Figure 13. Thermal Response DEVICE ORDERING INFORMATION Device NVMYS1D3N04CTWG Marking Package Shipping† 1D3N04C LFPAK4 (Pb−Free) 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 5 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS LFPAK4 5x6 CASE 760AB ISSUE C GENERIC MARKING DIAGRAM* XXXXXX XXXXXX AWLYW DOCUMENT NUMBER: DESCRIPTION: 98AON82777G LFPAK4 5x6 XXXXXX A WL Y W DATE 19 NOV 2019 = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week *This information is generic. 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