NVMYS5D3N04CTWG

NVMYS5D3N04C MOSFET – Power, Single N-Channel 40 V, 5.3 mW, 71 A Features • • • • • • www.onsemi.com Small Footprint (5x6 mm) for Compact Design Low RDS(on) to Minimize Conduction Losses Low QG and Capacitance to Minimize Driver Losses LFPAK4 Package, Industry Standard AEC−Q101 Qualified and PPAP Capable These Devices are Pb−Free and are RoHS Compliant V(BR)DSS RDS(ON) MAX ID MAX 40 V 5.3 m @ 10 V 71 A D (5) MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Symbol Value Unit Drain−to−Source Voltage VDSS 40 V Gate−to−Source Voltage VGS ±20 V ID 71 A Parameter Continuous Drain Current RJC (Notes 1, 3) TC = 25°C Power Dissipation RJC (Note 1) Continuous Drain Current RJA (Notes 1, 2, 3) Steady State TC = 100°C TC = 25°C Pulsed Drain Current PD TC = 100°C TA = 25°C Power Dissipation RJA (Notes 1 & 2) 50 Steady State ID PD W 3.6 1.8 IDM 352 A TJ, Tstg −55 to + 175 °C IS 42 A Single Pulse Drain−to−Source Avalanche Energy (IL(pk) = 4.6 A) EAS 1667 mJ Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) TL 260 °C Operating Junction and Storage Temperature Source Current (Body Diode) Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. THERMAL RESISTANCE MAXIMUM RATINGS Parameter MARKING DIAGRAM A 19 13 TA = 100°C TA = 25°C, tp = 10 s S (1,2,3) N−CHANNEL MOSFET 25 TA = 100°C TA = 25°C W 50 G (4) Symbol Value Unit Junction−to−Case − Steady State RJC 3.0 °C/W Junction−to−Ambient − Steady State (Note 2) RJA 40 LFPAK4 CASE 760AB 5D3N04C A WL Y W 5D3N04 C AWLYW = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week ORDERING INFORMATION See detailed ordering, marking and shipping information in the package dimensions section on page 5 of this data sheet. 1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 2. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad. 3. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. © Semiconductor Components Industries, LLC, 2018 August, 2019 − Rev. 1 1 Publication Order Number: NVMYS5D3N04C/D NVMYS5D3N04C ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter Symbol Test Condition Min Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 A 40 Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/ TJ Typ Max Unit OFF CHARACTERISTICS Zero Gate Voltage Drain Current IDSS Gate−to−Source Leakage Current V 22 VGS = 0 V, VDS = 40 V mV/°C TJ = 25 °C 10 TJ = 125°C 250 IGSS VDS = 0 V, VGS = 20 V VGS(TH) VGS = VDS, ID = 40 A 100 A nA ON CHARACTERISTICS (Note 4) Gate Threshold Voltage Threshold Temperature Coefficient VGS(TH)/TJ Drain−to−Source On Resistance Forward Transconductance RDS(on) 2.5 3.5 −8.0 VGS = 10 V gFS ID = 35 A VDS =15 V, ID = 35 A 4.4 V mV/°C 5.3 53 m S CHARGES, CAPACITANCES & GATE RESISTANCE Input Capacitance CISS 1000 Output Capacitance COSS Reverse Transfer Capacitance CRSS 22 Total Gate Charge QG(TOT) 16 Threshold Gate Charge QG(TH) 3.2 Gate−to−Source Charge QGS Gate−to−Drain Charge QGD 2.7 Plateau Voltage VGP 5.2 td(ON) 11 VGS = 0 V, f = 1 MHz, VDS = 25 V VGS = 10 V, VDS = 32 V; ID = 35 A 530 pF nC 5.7 V SWITCHING CHARACTERISTICS (Note 5) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time tr td(OFF) VGS = 10 V, VDS = 32 V, ID = 35 A, RG = 1  tf 72 ns 24 8.0 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time VSD TJ = 25°C 0.87 TJ = 125°C 0.75 tRR Charge Time ta Discharge Time tb Reverse Recovery Charge VGS = 0 V, IS = 35 A 1.2 V 36 VGS = 0 V, dIs/dt = 100 A/s, IS = 35 A QRR 17 ns 18 16 nC Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Pulse Test: pulse width v 300 s, duty cycle v 2%. 5. Switching characteristics are independent of operating junction temperatures. www.onsemi.com 2 NVMYS5D3N04C TYPICAL CHARACTERISTICS 200 10 V 9V 120 8V 140 120 100 6.0 V 80 5.6 V 60 4.0 V 40 0 5.2 V 4.8 V 4.4 V 0 1 2 3 40 TJ = 25°C 20 TJ = 125°C 3.0 3.5 TJ = −55°C 5.0 4.5 4.0 5.5 Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics ID = 35 A TJ = 25°C 16 14 12 10 8 6 4 2 3.5 4.5 5.5 6.5 7.5 8.5 9.5 6.0 6 VGS = 10 V 5 4 3 2 1 0 10 20 30 40 50 60 70 80 VGS, GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A) Figure 3. On−Resistance vs. Gate−to−Source Voltage Figure 4. On−Resistance vs. Drain Current and Gate Voltage 1.9 1.7 60 VGS, GATE−TO−SOURCE VOLTAGE (V) 18 2.5 80 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 20 0 100 0 100K ID = 35 A VGS = 10 V IDSS, LEAKAGE (nA) RDS(on), DRAIN−TO−SOURCE RESISTANCE (m) ID, DRAIN CURRENT (A) 160 20 RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) VDS = 10 V 7.0 V RDS(on), DRAIN−TO−SOURCE RESISTANCE (m) ID, DRAIN CURRENT (A) 180 1.5 1.3 1.1 TJ = 150°C 10K TJ = 125°C 1K TJ = 85°C 100 0.9 0.7 −50 −25 0 25 50 75 100 125 150 10 175 5 10 15 20 25 30 35 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage www.onsemi.com 3 40 NVMYS5D3N04C Ciss 1K C, CAPACITANCE (pF) VGS, GATE−TO−SOURCE VOLTAGE (V) TYPICAL CHARACTERISTICS Coss 100 TJ = 25°C VGS = 0 V f = 1 MHz 10 0 5 Crss 10 15 20 25 30 35 40 10 9 8 7 Qgs 6 Qgd 5 4 3 VDS = 32 V ID = 35 A TJ = 25°C 2 1 0 0 2 4 6 8 10 12 16 14 VDS, DRAIN−TO−SOURCE VOLTAGE (V) Qg, TOTAL GATE CHARGE (nC) Figure 7. Capacitance Variation Figure 8. Gate−to−Source Voltage vs. Total Charge t, TIME (ns) 100 IS, SOURCE CURRENT (A) VGS = 0 V tr td(off) td(on) 10 tf ID, DRAIN CURRENT (A) 1000 100 1 10 TJ = 125°C 0.3 0.4 TJ = −55°C TJ = 25°C 0.5 0.6 0.7 0.8 0.9 1.0 RG, GATE RESISTANCE () VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current 1000 TC = 25°C VGS ≤ 10 V Single Pulse 1 RDS(on) Limit Thermal Limit Package Limit 0.1 1 10 TJ(initial) = 25°C 100 10 s 10 0.1 1 0.1 IPEAK (A) 1 VGS = 10 V VDS = 32 V 10 10 TJ(initial) = 100°C 0.5 ms 1 ms 10 ms 1 100 1000 0.1 0.00001 0.0001 0.001 0.01 VDS, DRAIN−TO−SOURCE VOLTAGE (V) TIME IN AVALANCHE (s) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. Maximum Drain Current vs. Time in Avalanche www.onsemi.com 4 NVMYS5D3N04C TYPICAL CHARACTERISTICS 100 RJA (°C/W) 50% Duty Cycle 10 20% 10% 5% 1 2% 1% 0.1 Single Pulse 0.01 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 PULSE TIME (sec) Figure 13. Thermal Characteristics DEVICE ORDERING INFORMATION Device NVMYS5D3N04CTWG Marking Package Shipping† 5D3N04C LFPAK4 (Pb−Free) 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 5 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS LFPAK4 5x6 CASE 760AB ISSUE C GENERIC MARKING DIAGRAM* XXXXXX XXXXXX AWLYW DOCUMENT NUMBER: DESCRIPTION: 98AON82777G LFPAK4 5x6 XXXXXX A WL Y W DATE 19 NOV 2019 = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week *This information is generic. Please refer to device data sheet for actual part marking. Some products may not follow the Generic Marking. Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. 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