NVR5124PLT1G

MOSFET - Power, Single P-Channel, SOT-23 -60 V, 230 mW, -1.1 A NVR5124PL Features • Trench Technology • NVR Prefix for Automotive and Other Applications Requiring • www.onsemi.com Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable These Devices are Pb−Free and are RoHS Compliant V(BR)DSS MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Parameter Value Unit Drain−to−Source Voltage VDSS −60 V Gate−to−Source Voltage VGS ±20 V ID −1.1 A TA = 25°C Power Dissipation RqJA (Notes 1, 2) Pulsed Drain Current Steady State TA = 100°C TA = 25°C PD −0.47 A TJ, Tstg −55 to +150 °C Source Current (Body Diode) IS −0.6 A Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) TL 260 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. THERMAL RESISTANCE MAXIMUM RATINGS (Note 1) Junction−to−Ambient − Steady State (Note 2) D 0.19 25 Parameter P−Channel W IDM Operating Junction and Storage Temperature Range −1.1 A 365 mW @ −4.5 V −0.67 TA = 100°C TA = 25°C, tp = 10 ms ID MAX 230 mW @ −10 V −60 V Symbol Continuous Drain Current RqJA (Notes 1, 2, 3) RDS(on) MAX Symbol Value Unit RqJA 268 °C/W 1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 2. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad. 3. Continuous DC current rating. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. G S 3 MARKING DIAGRAM/ PIN ASSIGNMENT Drain 3 1 2 SOT−23 CASE 318 STYLE 21 V24 M G V24 MG G 1 Gate 2 Source = Device Code = Date Code* = Pb−Free Package (Note: Microdot may be in either location) *Date Code orientation may vary depending upon manufacturing location. ORDERING INFORMATION Device Package Shipping† NVR5124PLT1G SOT−23 (Pb−Free) 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2016 March, 2021 − Rev. 3 1 Publication Order Number: NVR5124PL/D NVR5124PL ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Parameter Symbol Test Condition Min V(BR)DSS VGS = 0 V, ID = −250 mA −60 Typ Max Unit OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage Zero Gate Voltage Drain Current IDSS Gate−to−Source Leakage Current VGS = 0 V, VDS = −60 V V TJ = 25°C −1.0 TJ = 125°C −10 mA IGSS VDS = 0 V, VGS = "20 V Gate Threshold Voltage VGS(TH) VGS = VDS, ID = −250 mA −2.5 V Drain−to−Source On Resistance RDS(on) VGS = −10 V, ID = −3 A 183 230 mW VGS = −4.5 V, ID = −3 A 280 365 "100 nA ON CHARACTERISTICS (Note 4) Forward Transconductance gFS VDS = −15 V, ID = −5 A −1.5 4 S CHARGES AND CAPACITANCES Ciss Input Capacitance Output Capacitance Coss Reverse Transfer Capacitance Crss Total Gate Charge QG(TOT) Threshold Gate Charge QG(TH) Gate−to−Source Charge QGS Gate−to−Drain Charge QGD Total Gate Charge QG(TOT) 240 VGS = 0 V, f = 1.0 MHz, VDS = −25 V 27.6 pF 18.5 2.3 VGS = −4.5 V, VDS = −48 V, ID = −3 A 0.5 0.9 nC 1.0 VGS = −10 V, VDS = −48 V, ID = −3 A 4.3 SWITCHING CHARACTERISTICS (Note 5) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(on) tr td(off) 6.6 VGS = −4.5 V, VDS = −48 V, ID = −3 A, RG = 2.5 W tf 10.6 ns 12.2 3.5 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time VSD TJ = 25°C −0.88 TJ = 125°C −0.76 tRR Charge Time ta Discharge Time tb Reverse Recovery Charge VGS = 0 V, IS = −3 A 15 VGS = 0 V, dIS/dt = 100 A/ms, IS = −3 A QRR −1.0 V ns 13 2.4 10 nC Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%. 5. Switching characteristics are independent of operating junction temperatures. www.onsemi.com 2 NVR5124PL TYPICAL CHARACTERISTICS −ID, DRAIN CURRENT (A) 5.0 TJ = 25°C 4.5 4.0 VGS = −4.4 V to −10 V 3.5 −3.6 V 3.0 2.5 2.0 −3.2 V 1.5 1.0 VGS = −2.8 V 0.5 0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 −VDS, DRAIN−TO−SOURCE VOLTAGE (V) VDS = −10 V 4.5 −4.0 V 4.0 −ID, DRAIN CURRENT (A) 5.0 3.5 3.0 2.5 2.0 TJ = 25°C 1.5 1.0 0.5 0.0 0.0 4.5 350 ID = −3 A TJ = 25°C 325 300 275 250 225 200 175 150 2 3 4 5 6 7 8 9 10 −VGS, GATE−TO−SOURCE VOLTAGE (V) TJ = 25°C 325 VGS = −4.5 V 300 275 250 VGS = −10 V 225 200 175 150 2 3 4 5 6 7 8 9 10 −ID, DRAIN CURRENT (A) Figure 4. On−Resistance vs. Drain Current and Gate Voltage 10000 2.0 VGS = 0 V VGS = −10 V ID = −3 A −IDSS, LEAKAGE (nA) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) 4.5 350 Figure 3. On−Resistance vs. Gate−to−Source Voltage 1.8 TJ = −55°C 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 −VGS, GATE−TO−SOURCE VOLTAGE (V) Figure 2. Transfer Characteristics RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW) RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW) Figure 1. On−Region Characteristics TJ = 125°C 1.6 1.4 1.2 1.0 TJ = 150°C 1000 100 TJ = 125°C 0.8 0.6 −50 −25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) 150 10 10 Figure 5. On−Resistance Variation with Temperature 20 30 40 50 −VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 6. Drain−to−Source Leakage Current vs. Voltage www.onsemi.com 3 60 NVR5124PL C, CAPACITANCE (pF) 1000 −VGS, GATE−TO−SOURCE VOLTAGE (V) TYPICAL CHARACTERISTICS VGS = 0 V TJ = 25°C f = 1 MHz Ciss 100 Coss Crss 10 0 10 20 30 40 50 60 8 7 6 5 4 Qgd Qgs 3 VDS = −48 V ID = −3 A TJ = 25°C 2 1 0 0.5 0 1 1.5 2 2.5 3 3.5 4 Qg, TOTAL GATE CHARGE (nC) Figure 7. Capacitance Variation Figure 8. Gate−to−Source Voltage vs. Total Charge 4.5 10 −IS, SOURCE CURRENT (A) VGS = 0 V VGS = −4.5 V VDS = −48 V ID = −3 A tf td(off) tr 10 td(on) 1 10 1 TJ = 125°C TJ = 25°C 0.1 0.4 100 0.5 0.6 0.7 0.8 TJ = −55°C 0.9 RG, GATE RESISTANCE (W) −VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 11. Diode Forward Voltage vs. Current 100 −ID, DRAIN CURRENT (A) t, TIME (ns) 9 −VDS, DRAIN−TO−SOURCE VOLTAGE (V) 100 1 10 VGS ≤ −10 V Single Pulse TC = 25°C 10 ms 10 100 ms 1 0.1 1 ms RDS(on) Limit Thermal Limit Package Limit 0.1 1 10 ms 10 −VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 10. Maximum Rated Forward Biased Safe Operating Area www.onsemi.com 4 100 1.0 NVR5124PL TYPICAL CHARACTERISTICS 1000 Duty Cycle = 0.5 RqJA(t) (°C/W) 100 0.2 0.1 0.05 10 0.02 0.01 1 0.1 0.000001 Single Pulse 0.00001 0.0001 0.001 0.01 0.1 PULSE TIME (sec) Figure 12. Thermal Response www.onsemi.com 5 1 10 100 1000 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SOT−23 (TO−236) CASE 318−08 ISSUE AS DATE 30 JAN 2018 SCALE 4:1 D 0.25 3 E 1 2 T HE NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF THE BASE MATERIAL. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. DIM A A1 b c D E e L L1 HE T L 3X b L1 VIEW C e TOP VIEW A A1 SIDE VIEW SEE VIEW C c MIN 0.89 0.01 0.37 0.08 2.80 1.20 1.78 0.30 0.35 2.10 0° MILLIMETERS NOM MAX 1.00 1.11 0.06 0.10 0.44 0.50 0.14 0.20 2.90 3.04 1.30 1.40 1.90 2.04 0.43 0.55 0.54 0.69 2.40 2.64 −−− 10 ° MIN 0.035 0.000 0.015 0.003 0.110 0.047 0.070 0.012 0.014 0.083 0° INCHES NOM 0.039 0.002 0.017 0.006 0.114 0.051 0.075 0.017 0.021 0.094 −−− MAX 0.044 0.004 0.020 0.008 0.120 0.055 0.080 0.022 0.027 0.104 10° GENERIC MARKING DIAGRAM* END VIEW RECOMMENDED SOLDERING FOOTPRINT XXXMG G 1 3X 2.90 3X XXX = Specific Device Code M = Date Code G = Pb−Free Package 0.90 *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. 0.95 PITCH 0.80 DIMENSIONS: MILLIMETERS STYLE 1 THRU 5: CANCELLED STYLE 6: PIN 1. BASE 2. EMITTER 3. COLLECTOR STYLE 7: PIN 1. EMITTER 2. BASE 3. COLLECTOR STYLE 9: PIN 1. ANODE 2. ANODE 3. CATHODE STYLE 10: PIN 1. DRAIN 2. SOURCE 3. GATE STYLE 11: STYLE 12: PIN 1. ANODE PIN 1. CATHODE 2. CATHODE 2. CATHODE 3. CATHODE−ANODE 3. ANODE STYLE 15: PIN 1. GATE 2. CATHODE 3. ANODE STYLE 16: PIN 1. ANODE 2. CATHODE 3. CATHODE STYLE 17: PIN 1. NO CONNECTION 2. ANODE 3. CATHODE STYLE 18: STYLE 19: STYLE 20: PIN 1. NO CONNECTION PIN 1. CATHODE PIN 1. CATHODE 2. CATHODE 2. ANODE 2. ANODE 3. GATE 3. ANODE 3. CATHODE−ANODE STYLE 21: PIN 1. GATE 2. SOURCE 3. DRAIN STYLE 22: PIN 1. RETURN 2. OUTPUT 3. INPUT STYLE 23: PIN 1. ANODE 2. ANODE 3. CATHODE STYLE 24: PIN 1. GATE 2. DRAIN 3. SOURCE STYLE 27: PIN 1. CATHODE 2. CATHODE 3. CATHODE STYLE 28: PIN 1. ANODE 2. ANODE 3. ANODE DOCUMENT NUMBER: DESCRIPTION: 98ASB42226B SOT−23 (TO−236) STYLE 8: PIN 1. ANODE 2. NO CONNECTION 3. CATHODE STYLE 13: PIN 1. SOURCE 2. DRAIN 3. GATE STYLE 25: PIN 1. ANODE 2. CATHODE 3. GATE STYLE 14: PIN 1. CATHODE 2. GATE 3. ANODE STYLE 26: PIN 1. CATHODE 2. ANODE 3. NO CONNECTION Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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