NVTFS4C02NWFTAG

DATA SHEET www.onsemi.com MOSFET - Power, Single N-Channel, m8FL V(BR)DSS 30 V, 2.25 mW, 162 A RDS(on) MAX ID MAX 2.25 mW @ 10 V 30 V 162 A 3.1 mW @ 4.5 V NVTFS4C02N N−Channel MOSFET Features • • • • • • D (5−8) Low RDS(on) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses Optimized Gate Charge to Minimize Switching Losses NVTFS4C02NWF − Wettable Flanks Option for Enhanced Optical Inspection AEC−Q101 Qualified and PPAP Capable These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant G (4) S (1,2,3) MARKING DIAGRAM Applications • Reverse Battery Protection • DC−DC Converter Output Driver 1 WDFNW8 CASE 515AN MAXIMUM RATINGS (TJ = 25°C unless otherwise stated) Parameter Symbol Value Unit Drain−to−Source Voltage VDSS 30 V Gate−to−Source Voltage VGS ±20 V ID 28.3 A Continuous Drain Current RqJA (Note 1) Power Dissipation RqJA (Note 2) Continuous Drain Current RqJC (Note 1) TA = 25°C TA = 100°C TA = 25°C Steady State 20 PD TA = 100°C TC = 25°C ID TC = 100°C Power Dissipation RqJC (Note 1) TC = 25°C 3.2 W 1.6 W 162 A 115 PD TC = 100°C WDFN8 CASE 511AB 107 W 53.5 W 4C02 02WF A Y WW G 1 S S S G 4C02 AYWWG G D D D D = Specific Device Code = Specific Device Code of NVTFS4C02NWF = Assembly Location = Year = Work Week = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION Device NVTFS4C02NTAG Package WDFN8 1500 / Tape & Reel IDM 500 A NVTFS4C02NWFTAG TJ, Tstg −55 to +175 °C IS 100 A †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Drain to Source dV/dt dV/dt 6.0 V/ns Single Pulse Drain−to−Source Avalanche Energy (IL = 37 Apk) (Note 3) EAS 162 mJ TL 260 °C Pulsed Drain Current TA = 25°C, tp = 10 ms Operating Junction and Storage Temperature Range Source Current (Body Diode) Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) WDFNW8 Shipping† Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu. 2. Surface−mounted on FR4 board using the minimum recommended pad size. 3. This is the absolute maximum ratings. Parts are 100% tested at TJ = 25°C, VGS = 10 V, IL = 36 A, EAS = 65 mJ. © Semiconductor Components Industries, LLC, 2020 September, 2021 − Rev. 1 1 Publication Order Number: NVTFS4C02N/D NVTFS4C02N THERMAL RESISTANCE MAXIMUM RATINGS Symbol Value Junction−to−Case (Drain) Parameter RqJC 1.4 Junction−to−Ambient – Steady State RqJA 46 Unit °C/W ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter Symbol Test Condition Min Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 30 Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/ TJ Typ Max Unit OFF CHARACTERISTICS Zero Gate Voltage Drain Current IDSS V 13.8 VGS = 0 V, VDS = 24 V VGS = 0 V, VDS = 30 V mV/°C TJ = 25°C 1.0 TJ = 125°C 10 TJ = 25°C 10 Zero Gate Voltage Drain Current IDSS Gate−to−Source Leakage Current IGSS VDS = 0 V, VGS = 20 V VGS(TH) VGS = VDS, ID = 250 mA mA mA 100 nA 2.2 V ON CHARACTERISTICS (Note 4) Gate Threshold Voltage Negative Threshold Temperature Coefficient Drain−to−Source On Resistance VGS(TH)/TJ RDS(on) Forward Transconductance gFS Gate Resistance 1.3 1.6 5.0 mV/°C VGS = 10 V ID = 20 A 1.9 2.25 VGS = 4.5 V ID = 20 A 2.7 3.1 VDS = 1.5 V, ID = 50 A mW 140 S RG 0.9 W Input Capacitance CISS 2980 Output Capacitance COSS Reverse Transfer Capacitance CRSS CHARGES AND CAPACITANCES Output Charge VGS = 0 V, f = 1 MHz, VDS = 15 V 1200 55 QOSS VGS = 0 V, VDD = 15 V 25 Capacitance Ratio CRSS/CISS VGS = 0 V, VDS = 15 V, f = 1 MHz 0.018 Total Gate Charge QG(TOT) 20 Threshold Gate Charge QG(TH) 4.7 Gate−to−Source Charge QGS Gate−to−Drain Charge QGD Gate Plateau Voltage Total Gate Charge pF VGS = 4.5 V, VDS = 15 V; ID = 50 A 8.5 nC nC 4 VGP QG(TOT) VGS = 10 V, VDS = 15 V; ID = 50 A 2.8 V 45 nC SWITCHING CHARACTERISTICS (Note 5) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(ON) tr td(OFF) 12 VGS = 4.5 V, VDS = 15 V, ID = 50 A, RG = 3.0 W tf 116 25 10 4. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 5. Switching characteristics are independent of operating junction temperatures. www.onsemi.com 2 ns NVTFS4C02N ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter Symbol Test Condition Min Typ Max Unit SWITCHING CHARACTERISTICS (Note 5) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(ON) tr td(OFF) 9 VGS = 10 V, VDS = 15 V, ID = 50 A, RG = 3.0 W tf 102 ns 33 6 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time VSD TJ = 25°C 0.8 TJ = 125°C 0.6 tRR Charge Time ta Discharge Time tb Reverse Recovery Charge VGS = 0 V, IS = 20 A 1.1 V 42 VGS = 0 V, dIS/dt = 100 A/ms, IS = 50 A QRR 21 ns 21 28 nC 4. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 5. Switching characteristics are independent of operating junction temperatures. Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. www.onsemi.com 3 NVTFS4C02N TYPICAL CHARACTERISTICS 160 3.4 V to 10 V 160 3.2 V ID, DRAIN CURRENT (A) 140 120 3.0 V 100 80 2.8 V 60 40 2.6 V 20 RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW) 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 120 100 80 60 TJ = 25°C 40 0 5.0 TJ = 125°C 2.0 TJ = −55°C 2.5 Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics TJ = 25°C ID = 20 A 5 4 3 2 1 0 4 5 6 7 8 9 10 VGS, GATE−TO−SOURCE VOLTAGE (V) 3.5 3.0 VGS, GATE−TO−SOURCE VOLTAGE (V) 3.5 TJ = 25°C VGS = 4.5 V 3.0 2.5 VGS = 10 V 2.0 1.5 1.0 20 40 60 80 100 120 140 160 ID, DRAIN CURRENT (A) Figure 3. On−Resistance vs. Gate−to−Source Voltage Figure 4. On−Resistance vs. Drain Current and Gate Voltage 2 100K VGS = 10 V ID = 20 A 1.8 TJ = 150°C 1.6 IDSS, LEAKAGE (nA) RDS(on), NORMALIZED DRAIN−TO− SOURCE RESISTANCE 1.5 1.0 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 6 3 VDS = 10 V 20 VGS = 2.4 V RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW) ID, DRAIN CURRENT (A) 140 1.4 1.2 1 0.8 10K TJ = 125°C 1K TJ = 85°C 100 0.6 10 0.4 −50 −25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) 150 175 5 10 15 20 25 VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage www.onsemi.com 4 30 NVTFS4C02N TYPICAL CHARACTERISTICS VGS, GATE−TO−SOURCE VOLTAGE (V) 10K C, CAPACITANCE (pF) CISS 1K COSS 100 CRSS 10 1 VGS = 0 V TJ = 25°C f = 1 MHz 0 10 5 15 25 20 30 6 5 4 QGS 3 QGD 2 VDS = 15 V TJ = 25°C ID = 50 A 1 0 4 2 0 6 8 12 10 16 14 QG, TOTAL GATE CHARGE (nC) Figure 7. Capacitance Variation Figure 8. Gate−to−Source vs. Total Charge 1K 20 18 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 100 td(off) td(on) 10 VGS = 4.5 V VDS = 15 V ID = 50 A tf 1 1K ID, DRAIN CURRENT (A) IS, SOURCE CURRENT (A) tr 100 100 1 10 100 TJ = 125°C 0.3 0.4 TJ = 25°C 0.5 0.6 0.7 TJ = −55°C 0.8 0.9 1.0 RG, GATE RESISTANCE (W) VSD, SOURCE−TO−DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current 1K TC = 25°C VGS ≤ 10 V Single Pulse TJ (initial) = 25°C 100 100 ms 10 DC 1 1 ms 10 ms 0.01 0.1 1 10 TJ (initial) = 100°C 1 RDS(on) Limit Thermal Limit Package Limit 0.1 0.01 10 1 IPEAK, (A) t, TIME (ns) VGS = 0 V 0.1 10 100 0.000001 0.00001 0.0001 0.001 VDS, DRAIN−TO−SOURCE VOLTAGE (V) TIME IN AVALANCHE (s) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. IPEAK vs. Time in Avalanche www.onsemi.com 5 0.01 NVTFS4C02N TYPICAL CHARACTERISTICS 10 50% Duty Cycle R(t) (°C/W) 20% 1 10% 5% 2% 0.1 1% Single Pulse 0.01 0.000001 0.00001 0.0001 0.001 0.01 PULSE TIME (sec) Figure 13. Thermal Characteristics www.onsemi.com 6 0.1 1 10 NVTFS4C02N PACKAGE DIMENSIONS WDFN8 3.3x3.3, 0.65P CASE 511AB ISSUE D 2X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS. 0.20 C D A D1 B 2X 0.20 C 8 7 6 5 4X E1 E q c 1 2 3 4 A1 TOP VIEW 0.10 C A e SIDE VIEW 0.10 8X b C A B 0.05 C 4X L C 6X 0.10 C DETAIL A SEATING PLANE DETAIL A 1 8X 0.42 4 INCHES NOM 0.030 −−− 0.012 0.008 0.130 BSC 0.116 0.120 0.078 0.083 0.130 BSC 0.116 0.120 0.058 0.063 0.009 0.012 0.026 BSC 0.012 0.016 0.026 0.032 0.012 0.017 0.002 0.005 0.055 0.059 0_ −−− MIN 0.028 0.000 0.009 0.006 MAX 0.031 0.002 0.016 0.010 0.124 0.088 0.124 0.068 0.016 0.020 0.037 0.022 0.008 0.063 12 _ 0.65 PITCH PACKAGE OUTLINE 4X 0.66 M E3 8 G MILLIMETERS MIN NOM MAX 0.70 0.75 0.80 0.00 −−− 0.05 0.23 0.30 0.40 0.15 0.20 0.25 3.30 BSC 2.95 3.05 3.15 1.98 2.11 2.24 3.30 BSC 2.95 3.05 3.15 1.47 1.60 1.73 0.23 0.30 0.40 0.65 BSC 0.30 0.41 0.51 0.65 0.80 0.95 0.30 0.43 0.56 0.06 0.13 0.20 1.40 1.50 1.60 0_ −−− 12 _ SOLDERING FOOTPRINT* e/2 K E2 DIM A A1 b c D D1 D2 E E1 E2 E3 e G K L L1 M q 5 D2 BOTTOM VIEW 3.60 L1 0.75 2.30 0.57 0.47 2.37 3.46 DIMENSION: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the onsemi Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 7 NVTFS4C02N PACKAGE DIMENSIONS WDFNW8 3.3x3.3, 0.65P (Full−Cut m8FL WF) CASE 515AN ISSUE O onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. 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