NZF220TT1
EMI Filter with ESD
Protection
Features:
•
•
•
•
•
•
•
EMI/RFI Bi−directional “Pi” Low−Pass Filters
ESD Protection Meets IEC61000−4−2
Diode Capacitance: 7 − 10 pF
Zener/Resistor Line Capacitance: 22 ± 20% pF
Low Zener Diode Leakage: 1 mA Maximum
Zener Breakdown Voltage; 6 − 8 Volts
Pb−Free Package is Available
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CIRCUIT DESCRIPTION
1
2
Benefits:
3
• Designed to Suppress EMI/RFI Noise in Systems Subjected to
Electromagnetic Interference
• Small Package Size Minimizes Parasitic Inductance, Thus a More
“Ideal” Low Pass Filtering Response
1
Applications:
•
•
•
•
MARKING
DIAGRAM
3
X6 M G
G
SC−75
CASE 463
STYLE 4
Cellular Phones
Communication Systems
Computers
Portable Products with Input/Output Conductors
X6
M
G
MAXIMUM RATINGS
Rating
2
1
= Device Code
= Date Code*
= Pb−Free Package
(Note: Microdot may be in either location)
Symbol
Value
Unit
Peak Power Dissipation (Note 1)
8 × 20 ms Pulse
PPK
14
W
Maximum Junction Temperature
TJ
150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. All diodes under power
*Date Code orientation may vary depending
upon manufacturing location.
ORDERING INFORMATION
Device
NZF220TT1
NZF220TT1G
Package
Shipping†
SC−75
3000/Tape & Reel
SC−75
(Pb−Free)
3000/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2006
March, 2006 − Rev. 3
1
Publication Order Number:
NZF220TT1/D
NZF220TT1
ELECTRICAL CHARACTERISTICS
Characteristic
Symbol
Min
Typ
Max
Unit
VZ
6.0
−
8.0
V
Ir
N/A
−
1.0
mA
Zener Forward Voltage, @ IF = 50 mA
VF
N/A
−
1.25
V
Zener Internal Capacitance, @ 0 V Bias
C
7.0
−
10
pF
Zener/Resistor Array Line Capacitance
C
17.6
−
26.4
pF
R
90
−
110
W
FC (Note 2)
−
220
−
MHz
Zener Breakdown Voltage, @ IZT = 1 mA
Zener Leakage Current, @ VR = 3 V
Resistance
Cutoff Frequency
2. 50 W Source and 50 W Lead Termination per Figure 2
Applications Information
Suppressing Noise at the Source
• Filter all I/O signals leaving the noisy environment
• Locate I/O driver circuits close to the connector
• Use the longest rise/fall times possible for all digital signals
Reducing Noise at the Receiver
• Filter all I/O signals entering the unit
• Locate the I/O filters as close as possible to the connector
Minimizing Noise Coupling
•
•
•
•
•
Use multilayer PCBs to minimize power and ground inductance
Keep clock circuits away from the I/O connector
Ground planes should be used whenever possible
Minimize the loop area for all high speed signals
Provide for adequate power decoupling
ESD Protection
• Locate the suppression devices as close to the I/O connector as possible
• Minimize the PCB trace length to the suppression device
• Minimize the PCB trace length for the ground return for the suppression device
http://onsemi.com
2
NZF220TT1
Frequency Response Specification
TRACKING
GENERATOR
TG OUTPUT
SPECTRUM
ANALYZER
50 W
RF INPUT
NZF220T
50 W
VG
Vin
Vout
TEST BOARD
Test Conditions:
Source Impedance = 50 W
Load Impedance = 50 W
Input Power = 0 dB
NZF220T
Figure 1. Measurement Conditions
−6.3
GAIN (dB)
Y
Y OUTPUT
3 dB = 220 MHz
−50
1.0
10
100
1000
f, FREQUENCY (MHz)
Figure 2. Typical EMI Filter Response
(50 W Source and 50 W Lead Termination)
http://onsemi.com
3
3000
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−75/SOT−416
CASE 463−01
ISSUE G
3
1
2
DATE 07 AUG 2015
SCALE 4:1
−E−
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
2
3
b 3 PL
0.20 (0.008)
e
DIM
A
A1
b
C
D
E
e
L
HE
−D−
1
M
D
HE
C
0.20 (0.008) E
A
L
MILLIMETERS
MIN
NOM MAX
0.70
0.80
0.90
0.00
0.05
0.10
0.15
0.20
0.30
0.10
0.15
0.25
1.55
1.60
1.65
0.70
0.80
0.90
1.00 BSC
0.10
0.15
0.20
1.50
1.60
1.70
INCHES
NOM MAX
0.031 0.035
0.002 0.004
0.008 0.012
0.006 0.010
0.063 0.065
0.031 0.035
0.04 BSC
0.004 0.006 0.008
0.060 0.063 0.067
MIN
0.027
0.000
0.006
0.004
0.061
0.027
GENERIC
MARKING DIAGRAM*
A1
STYLE 1:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
STYLE 2:
PIN 1. ANODE
2. N/C
3. CATHODE
STYLE 4:
PIN 1. CATHODE
2. CATHODE
3. ANODE
STYLE 5:
PIN 1. GATE
2. SOURCE
3. DRAIN
XX M
G
STYLE 3:
PIN 1. ANODE
2. ANODE
3. CATHODE
1
XX
= Specific Device Code
M
= Date Code
G
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
SOLDERING FOOTPRINT*
0.356
0.014
1.803
0.071
0.508
0.020
0.787
0.031
1.000
0.039
SCALE 10:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB15184C
SC−75/SOT−416
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
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