PCS3P25814

PCS3P25814

  • 厂商:

    ONSEMI(安森美)

  • 封装:

  • 描述:

    PCS3P25814 - Spread Spectrum Clock Generator - ON Semiconductor

  • 详情介绍
  • 数据手册
  • 价格&库存
PCS3P25814 数据手册
PCS3P25811 and PCS3P25812 and PCS3P25814 Spread Spectrum Clock Generator Features • Generates a 1x (PCS3P25811), 2x (PCS3P25812) and 4x(PCS3P25814) low EMI spread spectrum clock of the input frequency • Provides up to 15dB of EMI suppression • Input Frequency: 4MHz - 32MHz • Output Frequency: PCS3P25811: 4MHz - 32MHz PCS3P25812: 8MHz - 64MHz PCS3P25814: 16MHz - 128MHz • Selectable spread options: Down Spread and Center Spread • Low Power Dissipation: 3.3V: 20mW (typ) @ 6MHz 3.3V: 24mW (typ) @ 12MHz 3.3V: 30mW (typ) @ 24MHz • Low inherent Cycle-to-Cycle Jitter • Supply Voltage: 2.8V to 3.6V • LVCMOS Input and output • Functional and Pinout compatible to Cypress CY25811, CY25812 and CY25814 dependent signals. It allows significant system cost savings by reducing the number of circuit board layers, ferrite beads, shielding, and other passive components that are traditionally required to pass EMI regulations. The PCS3P25811/12/14 can generate an EMI reduced clock from crystal, ceramic resonator, or system clock. The PCS3P25811/12/14 modulate the output of a single PLL in order to “spread” the bandwidth of a synthesized cock, and more importantly, decreases the peak amplitudes of its harmonics. This results in significantly lower system EMI compared to the typical narrow band signal produced by oscillators and most frequency generators. Lowering EMI by increasing a signal’s bandwidth is called ‘spread spectrum clock generation.’ The PCS3P25811/12/14 use the most efficient and optimized modulation profile approved by the FCC and is implemented in a proprietary all-digital method. The PCS3P25811/12/14 have 2 pins S0 and S1 to control the selection of Center Spread, Down Spread and NoSpread functions. Additionally there is a 3 level logic contol FSEL, for selecting one of the three different frequency ranges within the operating frequency range. Refer Input/Output Frequency Range Selection Table. The PCS3P25811/12/14 operate from a 2.8V to 3.6V supply and are available in 8 pin SOIC, and 8L 2mmX2mm WDFN packages. • 8-pin SOIC, and 8L 2mmX2mm WDFN (TDFN) Packages Product Description The PCS3P25811/12/14 devices are versatile spread spectrum frequency modulators designed specifically for a wide range of input clock frequencies from 4MHz to 32MHz. The PCS3P25811/12/14 reduce electromagnetic interference (EMI) at the clock source, allowing system wide reduction of EMI of down stream clock and data Applications The PCS3P25811/12/14 are targeted towards EMI management in applications such as LCD Panels, MFPs, Digital copiers, Networking, PC peripheral devices, consumer electronics, and embedded controller systems. ©2010 SCILLC. All rights reserved. JANUARY 2010 – Rev. 1 Publication Order Number: PCS3P25811/D PCS3P25811 and PCS3P25812 and PCS3P25814 Block Diagram FSEL S1 S0 VDD XIN / CLKIN Crystal Oscillator XOUT Frequency Divider Feedback Divide r Input Decoder & Modulation control PLL Phase Detector Loop Filter VCO Output Divider ModOUT Pin Configuration XIN / CLKIN 1 VSS 2 S1 3 S0 4 PCS3P25811 PCS3P25812 PCS3P25814 8 VSS XOUT VDD FSEL ModOUT 7 6 5 Pin Description Pin# 1 2 3 4 5 6 7 8 Pin Name XIN / CLKIN VSS S1 S0 ModOUT FSEL VDD XOUT Type I P I I O I P O Description Crystal connection or External Clock input. Ground to entire chip. Digital 3 level logic input (1-M-0) used to select Center, Down and No spread options. (Refer to Frequency Deviation Selection Table). Default=M. Digital 3 level logic input (1-M-0) used to select Center, Down and No spread options. (Refer to Frequency Deviation Selection Table). Default=M. Spread Spectrum Clock Output. Frequency range select. Digital 3 level logic input (1-M-0) used to select Input Clock frequency range (Refer to Input/Output Frequency Range Selection Table). Default=M. Power supply for the entire chip (2.8V to 3.6V). Crystal connection. If using an external reference, this pin must be left unconnected. Rev. 1 | Page 2 of 9 | www.onsemi.com PCS3P25811 and PCS3P25812 and PCS3P25814 Input/Output Frequency Range Selection Table Part Number FSEL (pin 6) PCS3P25811 (1x) Input (MHz) 0 1 M 4-8 8-16 16-32 Output (MHz) 4-8 8-16 16-32 PCS3P25812 (2x) Input (MHz) 4-8 8-16 16-32 Output (MHz) 8-16 16-32 32-64 PCS3P25814 (4x) Input (MHz) 4-8 8-16 16-32 Output (MHz) 16-32 32-64 64-128 Modulation Rate Input Frequency / 128 Input Frequency / 256 Input Frequency / 512 Output Frequency Deviation Selection Table CLKIN (MHz) 4-5 5-6 6-7 7-8 8-10 10-12 12-14 14-16 16-20 20-24 24-28 28-32 FSEL 0 0 0 0 1 1 1 1 M M M M S1=0 S0=0 Center ±1.4 ±1.3 ±1.2 ±1.1 ±1.4 ±1.3 ±1.2 ±1.1 ±1.4 ±1.3 ±1.2 ±1.1 S1=0 S0=M Center ±1.2 ±1.1 ±0.9 ±0.9 ±1.2 ±1.1 ±0.9 ±0.9 ±1.2 ±1.1 ±0.9 ±0.9 S1=0 S0=1 Center ±0.6 ±0.5 ±0.5 ±0.4 ±0.6 ±0.5 ±0.5 ±0.4 ±0.6 ±0.5 ±0.5 ±0.4 S1=M S0=0 Center ±0.5 ±0.4 ±0.4 ±0.3 ±0.5 ±0.4 ±0.4 ±0.3 ±0.5 ±0.4 ±0.4 ±0.3 S1=1 S0=1 Down -3 -2.7 -2.5 -2.3 -3 -2.7 -2.5 -2.3 -3 -2.7 -2.5 -2.3 S1=1 S0=0 Down -2.2 -1.9 -1.8 -1.7 -2.2 -1.9 -1.8 -1.7 -2.2 -1.9 -1.8 -1.7 S1=M S0=1 Down -1.9 -1.7 -1.5 -1.4 -1.9 -1.7 -1.5 -1.4 -1.9 -1.7 -1.5 -1.4 S1=1 S0=M Down -0.7 -0.6 -0.6 -0.5 -0.7 -0.6 -0.6 -0.5 -0.7 -0.6 -0.6 -0.5 S1=M S0=M No Spread 0 0 0 0 0 0 0 0 0 0 0 0 Note: Frequency Deviation given in the table is for the Input Frequency Range covering PCS3P25811/12 /14. 3 Level Digital Logic S0, S1, and FSEL digital inputs are designed to sense 3 different logic levels designated as High “1”, Low “0” and Middle “M”. With this 3-Level digital input logic 9 different logic states can be detected. S0, S1 and FSEL pins include an on chip 100K (50K/50K) resistor divider. No external application resistors are needed to implement the 3-Level logic levels as shown below: Logic 1 M 0 Control Pins FSEL, S0, S1 to VDD FSEL, S0, S1 UNCONNECTED FSEL, S0, S1 to VSS VSS VDD Rev. 1 | Page 3 of 9 | www.onsemi.com PCS3P25811 and PCS3P25812 and PCS3P25814 Operating Conditions Symbol VDD TA CL CIN Operating temperature Load Capacitance Input Capacitance Parameter Min 2.8 0 Max 3.6 +70 15 7 Unit V ° C pF pF Voltage on any pin with respect to VSS Absolute Maximum Ratings Symbol VDD, VIN TSTG Ts TJ TDV Storage temperature Parameter Rating -0.5 to +4.6 -65 to +125 260 150 2 Unit V ° C ° C ° C KV Voltage on any pin with respect to Ground Max. Soldering Temperature (10 sec) Junction Temperature Static Discharge Voltage (As per JEDEC STD 22- A114-B) Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. DC Electrical Characteristics Symbol VDD VIL VIM VIH VOL VOH CIN Supply Voltage Input low voltage (S0, S1, FSEL Inputs) Commercial Temp. Industrial Temp. Parameter Min 2.8 0 0 0.4VDD 0.85VDD Typ 3.3 Max 3.6 0.15VDD 0.13 VDD 0.60VDD VDD 0.4 1.2 Unit V V V V V V Input Middle Voltage (S0, S1, FSEL Inputs) Input high voltage (S0, S1, FSEL Inputs) Output low voltage (ModOUT Output) Output high voltage (ModOUT Output) Input Capacitance (XIN And XOUT) XIN / CLKIN = 12MHz Commercial Temp XIN / CLKIN = 24MHz XIN / CLKIN = 32MHz XIN / CLKIN = 12MHz Industrial Temp XIN / CLKIN = 24MHz XIN / CLKIN = 32MHz Dynamic supply current (Unloaded Output) IOL= 4mA IOL= 10mA IOH= -4mA IOH= -6mA 2.4 2 6 9 8 10 13 10 12 15 0.5 pF mA IDD mA ICC Static supply current (XIN / CLKIN pulled to VSS) mA Note. The voltage on any input or I/O pin cannot exceed the power pin during power up. All parameters are specified at Commercial and Industrial temperature unless stated otherwise. Rev. 1 | Page 4 of 9 | www.onsemi.com PCS3P25811 and PCS3P25812 and PCS3P25814 AC Electrical Characteristics Symbol fIN Parameter Input Clock frequency for PCS3P25811/12/14 ModOUT Clock frequency for PCS3P25811 Min 4 4 8 16 2 1 2 1 40 40 4MHz 8MHz 16MHz Typ Max 32 32 64 128 5 Unit MHz MHz MHz MHz nS fOUT ModOUT Clock frequency for PCS3P25812 ModOUT Clock frequency for PCS3P25814 tLH 1, 2 ModOUT Rise time (Measured from 20% to 80%) ModOUT Fall time (Measured from 80% to 20%) PCS3P25811/12/14 PCS3P25814 When FSEL=M PCS3P25811/12/14 PCS3P25814 When FSEL=M 2.2 4.4 nS 2.2 60 60 600 450 400 380 380 380 500 400 380 2 3 pS pS % % tHL 1, 2 TDCIN TDCOUT 1, 2 Input Clock Duty Cycle(XIN / CLKIN) Output Clock Duty Cycle (ModOUT) PCS3P25811 Cy-Cy Jitter, For ModOUT with Spread ON (For Commercial temperature) Cy-Cy Jitter, For ModOUT with Spread ON (For Industrial temperature) PLL Lock Time tON 2 PCS3P25812 32MHz 64MHz 2 TJC PCS3P25814 128MHz CLKIN = 6MHz CLKIN = 12MHz CLKIN = 24MHz Commercial Temp. Industrial Temp. PCS3P25811 PCS3P25812 PCS3P25814 (Stable power supply, valid input clock to valid Clock on ModOUT) mS Notes: 1.Parameters are specified with 15pF loaded outputs. 2. Parameter is guaranteed by design and characterization. Not 100% tested in production. Rev. 1 | Page 5 of 9 | www.onsemi.com PCS3P25811 and PCS3P25812 and PCS3P25814 Application Schematic VDD C3 0.1µF Centre Spread ±0.5% ModOUT 5 8 XOUT VDD PCS3P25811/12/14 6 FSEL CL 1 7 XIN VDD CL Y1 12MHz 12MHz (PCS3P25811) 24MHz (PCS3P25812) 48MHz (PCS3P25814) VDD S0 4 S1 3 VSS 2 Typical Crystal Specifications Fundamental AT cut parallel resonant crystal Nominal frequency Frequency tolerance Operating temperature range Storage temperature Load capacitance(CP) Shunt capacitance ESR 12MHz ± 30 ppm or better at 25° C -25° to +85° C C -40° to +85° C C 18pF 7pF maximum 25 Ω Note: Note: CL is Load Capacitance and Rx is used to prevent oscillations at overtone frequency of the Fundamental frequency. Typical Crystal Interface Circuit R Crystal Rx CL CL CL = 2*(CP – CS), Where CP = Load capacitance of crystal CS = Stray capacitance due to CIN, PCB, Trace etc. Rev. 1 | Page 6 of 9 | www.onsemi.com PCS3P25811 and PCS3P25812 and PCS3P25814 Package Information 8-Pin SOIC Package E H D A2 A θ e A 1 B C L D Dimensions Inches Min A1 A A2 B C D E e H L θ 0.004 0.053 0.049 0.012 0.007 Symbol Max 0.010 0.069 0.059 0.020 0.010 Millimeters Min Max 0.10 1.35 1.25 0.31 0.18 4.90 BSC 3.91 BSC 1.27 BSC 6.00 BSC 0.41 0° 1.27 8° 0.25 1.75 1.50 0.51 0.25 0.193 BSC 0.154 BSC 0.050 BSC 0.236 BSC 0.016 0° 0.050 8° Note: Controlling dimensions are millimeters. SOIC: 0.074 grams unit weight. Rev. 1 | Page 7 of 9 | www.onsemi.com PCS3P25811 and PCS3P25812 and PCS3P25814 8L 2mmX2mm WDFN package Symbol A A3 b D E e L Dimensions Inches Millimeters Min Max Min Max 0.027 0.008 0.077 0.077 0.020 0.0315 0.012 0.080 0.080 0.024 0.70 0.20 1.95 1.95 0.50 0.80 0.203 BSC 0.30 2.05 2.05 0.50 BSC 0.60 0.008 BSC 0.020 BSC Rev. 1 | Page 8 of 9 | www.onsemi.com PCS3P25811 and PCS3P25812 and PCS3P25814 Ordering Code Part Number PCS3P25811AG08SR P3P25812AG-08SR P3P25814AG-08SR P3P25811AG-08CR P3P25812AG-08CR P3P25814AG-08CR Marking CGL CIL CKL CG CI CK Package Type 8-pin SOIC – Tape & Reel, Green 8-pin SOIC – Tape & Reel, Green 8-pin SOIC – Tape & Reel, Green 8L-WDFN (2mmX2mm) - Tape & Reel, Green 8L-WDFN (2mmX2mm) - Tape & Reel, Green 8L-WDFN (2mmX2mm) - Tape & Reel, Green Temperature 0° to +70° C C 0° to +70° C C 0° to +70° C C 0° to +70° C C 0° to +70° C C 0° to +70° C C A “microdot” placed at the end of last row of marking or just below the last row toward the center of package indicates Pb-free. Licensed under US patent #5,488,627, #6,646,463 and #5,631,920. Note: This product utilizes US Patent #6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003. Many ON Semiconductor products are protected by issued patents or applications for patent. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. U.S Patent Pending; Timing-Safe and Active Bead are trademarks of PulseCore Semiconductor, a wholly owned subsidiary of ON Semiconductor. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. 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PCS3P25814
物料型号: - PCS3P25811:生成1倍(1x)低EMI展宽频谱时钟的输入频率。 - PCS3P25812:生成2倍(2x)低EMI展宽频谱时钟的输入频率。 - PCS3P25814:生成4倍(4x)低EMI展宽频谱时钟的输入频率。

器件简介: PCS3P25811/12/14是多功能展宽频谱频率调制器,专为4MHz至32MHz的一系列输入时钟频率设计。这些设备减少了时钟源的电磁干扰(EMI),允许系统范围内减少下游时钟和数据相关信号的EMI。通过减少传统上需要通过EMI法规的电路板层数、铁氧体珠、屏蔽和其他被动元件的数量,可以实现显著的系统成本节省。

引脚分配: | 引脚编号 | 引脚名称 | 类型 | 描述 | | --- | --- | --- | --- | | 1 | XIN/CLKIN | 输入 | 晶体连接或外部时钟输入。 | | 2 | VSS | 电源 | 整个芯片的接地。 | | 3 | S1 | 输入 | 数字3级逻辑输入(1-M-0),用于选择中心展宽、向下展宽和无展宽选项。 | | 4 | S0 | 输入 | 数字3级逻辑输入(1-M-0),用于选择中心展宽、向下展宽和无展宽选项。 | | 5 | ModOUT | 输出 | 展宽频谱时钟输出。 | | 6 | FSEL | 输入 | 频率范围选择。数字3级逻辑输入(1-M-0),用于选择输入时钟频率范围。 | | 7 | VDD | 电源 | 整个芯片的电源供应(2.8V至3.6V)。 | | 8 | XOUT | 输出 | 晶体连接。如果使用外部参考,此引脚必须留空。 |

参数特性: - 输入频率:PCS3P25811为4MHz至32MHz,PCS3P25812为8MHz至64MHz,PCS3P25814为16MHz至128MHz。 - 输出频率:PCS3P25811为4MHz至32MHz,PCS3P25812为8MHz至64MHz,PCS3P25814为16MHz至128MHz。 - 可选择的展宽选项:向下展宽和中心展宽。 - 低功耗:3.3V下分别为6MHz时20mW、12MHz时24mW和24MHz时30mW。 - 供电电压:2.8V至3.6V。 - LVCMOS输入和输出。 - 功能和引脚与Cypress CY25811、CY25812和CY25814兼容。

功能详解: PCS3P25811/12/14通过调制单个PLL的输出来“展宽”合成时钟的带宽,并且更重要的是,减少其谐波的峰值幅度。与振荡器和大多数频率生成器产生的典型窄带信号相比,这可以显著降低系统的EMI。通过增加信号的带宽来降低EMI称为“展宽频谱时钟生成”。

应用信息: PCS3P25811/12/14针对LCD面板、多功能打印机、数字复印机、网络、PC外围设备、消费电子和嵌入式控制器系统的EMI管理。
PCS3P25814 价格&库存

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