SA571
Compandor
The SA571 is a versatile low cost dual gain control circuit in which
either channel may be used as a dynamic range compressor or
expandor. Each channel has a full−wave rectifier to detect the average
value of the signal, a linerarized temperature−compensated variable
gain cell, and an operational amplifier.
The SA571 is well suited for use in cellular radio and radio
communications systems, modems, telephone, and satellite
broadcast/receive audio systems.
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MARKING
DIAGRAMS
Features
•
•
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16
Complete Compressor and Expandor in one IChip
Temperature Compensated
Greater than 110 dB Dynamic Range
Operates Down to 6.0 VDC
System Levels Adjustable with External Components
Distortion may be Trimmed Out
Dynamic Noise Reduction Systems
Voltage Controlled Amplifier
Pb−Free Packages are Available*
16
1
SOIC−16 WB
D SUFFIX
CASE 751G
1
16
16
SA571N
AWLYYWWG
1
Applications
•
•
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SA571D
AWLYYWWG
PDIP−16
N SUFFIX
CASE 648
Cellular Radio
High Level Limiter
Low Level Expandor − Noise Gate
Dynamic Filters
CD Player
1
A
WL
YY
WW
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
PIN CONNECTIONS
D, and N Packages*
RECT CAP 1
1
16
RECT CAP 2
RECT IN 1
2
15
DG CELL IN 1
3
14
RECT IN 2
DG CELL IN 2
VCC
GND
4
13
INV. IN 1
RES. R3 1
5
12
INV. IN 2
6
11
RES. R3 2
OUTPUT 1
7
10
OUTPUT 2
THD TRIM 1
8
9
THD TRIM 2
TOP VIEW
*SOL − Released in Large SO Package Only.
ORDERING INFORMATION
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
March, 2006 − Rev. 4
1
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
Publication Order Number:
SA571/D
SA571
THD TRIM
DG IN
R2 20kW
INVERTER IN
R3
R3 20kW
VARIABLE
GAIN
−
VREF
R4 30kW
RECT IN R1 10kW
1.8V
OUTPUT
+
RECTIFIER
RECT CAP
Figure 1. Block Diagram
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VCC
18
VDC
Operating Ambient Temperature Range
TA
−40 to +85
°C
Operating Junction Temperature
TJ
150
°C
Power Dissipation
PD
400
mW
Maximum Operating Voltage
Thermal Resistance, Junction−to−Ambient
N Package
D Package
RqJA
°C/W
75
105
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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2
SA571
ELECTRICAL CHARACTERISTICS (VCC = +15 V, TA = 25°C, unless otherwise noted)
Symbol
Test Conditions
Min
Typ
Max
Unit
Supply Voltage
Characteristic
VCC
−
6.0
−
18
V
Supply Current
ICC
No Signal
−
4.2
4.8
mA
Output Current Capability
IOUT
−
± 20
−
−
mA
SR
−
−
± .5
−
V/ms
Untrimmed
Trimmed
−
0.5
0.1
2.0
%
Resistor Tolerance
−
−
±5
± 15
%
Internal Reference Voltage
−
1.65
1.8
1.95
V
Output DC Shift (Note 3)
Untrimmed
−
± 90
± 150
mV
Expandor Output Noise
No Signal, 15 Hz−20 kHz
(Note 1)
−
20
60
mV
Output Slew Rate
Gain Cell Distortion (Note 2)
Unity Gain Level (Note 5)
1.0 kHz
−1.5
0
+1.5
dBm
Gain Change (Notes 2 and 4)
−
−
± 0.1
−
dB
Reference Drift (Note 4)
−
−
+2.0, −25
+20, −50
mV
−40°C to +85°C
−
+10, −12
−
%
Rectifier Input,
VCC = +6.0 V
V2 = +6.0 dBm, V1 = 0 dB
V2 = −30 dBm, V1 = 0 dB
−
−
−
Resistor Drift (Note 4)
Tracking Error
(Measured Relative to Value at Unity Gain)
Equals [VO − VO (unity gain)] dB − V2dBm
Channel Separation
1.
2.
3.
4.
5.
Input to V1 and V2 grounded.
Measured at 0 dBm, 1.0 kHz.
Expandor AC input change from no signal to 0 dBm.
Relative to value at TA = 25°C.
0 dBm = 775 mVRMS.
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3
dB
+0.2
+0.2
−1.0, +1.5
60
−
dB
SA571
Circuit Description
as brought out externally. A resistor, R3, is brought out from
the summing node and allows compressor or expander gain
to be determined only by internal components.
The output stage is capable of ± 20 mA output current.
This allows a +13 dBm (3.5 VRMS) output into a 300 W load
which, with a series resistor and proper transformer, can
result in +13 dBm with a 600 W output impedance.
A bandgap reference provides the reference voltage for all
summing nodes, a regulated supply voltage for the rectifier
and DG cell, and a bias current for the DG cell. The low
tempco of this type of reference provides very stable biasing
over a wide temperature range.
The typical performance characteristics illustration
shows the basic input−output transfer curve for basic
compressor or expander circuits.
The SA571 compandor building blocks, as shown in the
block diagram, are a full−wave rectifier, a variable gain cell,
an operational amplifier and a bias system. The arrangement
of these blocks in the IC result in a circuit which can perform
well with few external components, yet can be adapted to
many diverse applications.
The full−wave rectifier rectifies the input current which
flows from the rectifier input, to an internal summing node
which is biased at VREF. The rectified current is averaged on
an external filter capacitor tied to the CRECT terminal, and
the average value of the input current controls the gain of the
variable gain cell. The gain will thus be proportional to the
average value of the input signal for capacitively−coupled
voltage inputs as shown in the following equation. Note that
for capacitively−coupled inputs there is no offset voltage
capable of producing a gain error. The only error will come
from the bias current of the rectifier (supplied internally)
which is less than 0.1 mA.
COMPRESSOR INPUT LEVEL OR EXPANDOR
OUTPUT LEVEL (dBm)
+20
|V * V REF | avg
G T IN
R1
or
GT
| V IN | avg
R1
The speed with which gain changes to follow changes in
input signal levels is determined by the rectifier filter
capacitor. A small capacitor will yield rapid response but
will not fully filter low frequency signals. Any ripple on the
gain control signal will modulate the signal passing through
the variable gain cell. In an expander or compressor
application, this would lead to third harmonic distortion, so
there is a trade−off to be made between fast attack and decay
times and distortion. For step changes in amplitude, the
change in gain with time is shown by this equation.
G(t) + (G initial * G final) e
t + 10kW
*t
t
0
−10
−20
−30
−40
−50
−60
−70
−80
−40
−30 −20 −10
0
+10
COMPRESSOR OUTPUT LEVEL
OR
EXPANDOR INPUT LEVEL (dBm)
Figure 2. Basic Input−Output Transfer Curve
) G final
VCC = 15V
C RECT
0.1mF
The variable gain cell is a current−in, current−out device
with the ratio IOUT/IIN controlled by the rectifier. IIN is the
current which flows from the DG input to an internal
summing node biased at VREF. The following equation
applies for capacitively−coupled inputs. The output current,
IOUT, is fed to the summing node of the op amp.
I IN +
+10
10mF
13
6, 11
20kW
2.2mF 20kW
V1
3, 14
V IN * V REF
V
+ IN
R2
R2
DG
4
7, 10
VREF
2.2mF 10kW
V2
2, 15
A compensation scheme built into the DG cell
compensates for temperature and cancels out odd harmonic
distortion. The only distortion which remains is even
harmonics, and they exist only because of internal offset
voltages. The THD trim terminal provides a means for
nulling the internal offsets for low distortion operation.
The operational amplifier (which is internally
compensated) has the non−inverting input tied to VREF, and
the inverting input connected to the DG cell output as well
−
+
30kW
1, 16
5, 12
2.2mF
8.2kW
8, 9
200pF
Figure 3. Typical Test Circuit
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4
VO
SA571
INTRODUCTION
Much interest has been expressed in high performance
electronic gain control circuits. For non−critical
applications,
an
integrated
circuit
operational
transconductance amplifier can be used, but when
high−performance is required, one has to resort to complex
discrete circuitry with many expensive, well−matched
components. This paper describes an inexpensive integrated
circuit, the SA571 Compandor, which offers a pair of high
performance gain control circuits featuring low distortion
(