6-Channel EMI Filter with
Integrated ESD Protection
NUF6401
The NUF6401MN is a six−channel (C−R−C) Pi−style EMI filter
array with integrated ESD protection. Its typical component values of
R = 100 and C = 17 pF deliver a cutoff frequency of 110 MHz and
stop band attenuation greater than −30 dB from 800 MHz to 3.0 GHz.
This performance makes the part ideal for parallel interfaces with
data rates up to 74 Mbps in applications where wireless interference
must be minimized. The specified attenuation range is very effective
in minimizing interference from 2G/3G, GPS, Bluetooth® and
WLAN signals.
The NUF6401MN is available in low−profile 12−lead 1.35 mm x
3.0 mm DFN12/DFNW12 surface mount packages.
www.onsemi.com
MARKING
DIAGRAMS
1
12
64
01
MG
G
DFN12
CASE 506AD
1
Features/Benefits
• ±15 kV ESD Protection on each channel (IEC61000−4−2 Contact
•
•
•
•
•
Discharge)
R/C Values of 100 and 17 pF deliver Exceptional S21 Performance
Characteristics of 110 MHz f3dB and −30 dB Stop Band Attenuation
from 800 MHz to 3.0 GHz
Integrated EMI/ESD System Solution in DFN/DFNW Packages
Offer Exceptional Cost, System Reliability and Space Savings
SZNUF6401MNWT1G − Wettable Flank Package for optimal
Automated Optical Inspection (AOI)
S & SZ Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Applications
6401= Specific Device Code
M = Month
G
= Pb−Free Package
(Note: Microdot may be in either location)
1
12
64
W
MG
G
DFNW12
CASE 507AY
1
64W = Specific Device Code
M
= Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
• EMI Filtering for LCD and Camera Data Lines
• EMI Filtering and Protection for I/O Ports and Keypads
Package
Shipping†
NUF6401MNT1G
DFN12
(Pb−Free)
3000 / Tape &
Reel
SNUF6401MNT1G
DFN12
(Pb−Free)
3000 / Tape &
Reel
SZNUF6401MNWT1G DFNW12
(Pb−Free)
3000 / Tape &
Reel
Device
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2013
November, 2020 − Rev. 6
1
Publication Order Number:
NUF6401/D
NUF6401
0
−5
−10
S21 (dB)
−15
R = 100
Filter + ESDn
−20
−25
−30
Filter + ESDn
−35
Cd = 17 pF Cd = 17 pF
−40
−45
1.0E+6
See Table 1 for pin description
10E+6
100E+6
1.0E+9
10E+9
FREQUENCY (Hz)
Figure 1. Electrical Schematic
Figure 2. Typical Insertion Loss Characteristic
1
2
3
4
5
6
10
9
8
(Bottom View)
7
GND
12
11
Figure 3. Pin Diagram
Table 1. FUNCTIONAL PIN DESCRIPTION
Filter
Device Pins
Filter 1
1 & 12
Filter + ESD Channel 1
Description
Filter 2
2 & 11
Filter + ESD Channel 2
Filter 3
3 & 10
Filter + ESD Channel 3
Filter 4
4&9
Filter + ESD Channel 4
Filter 5
5&8
Filter + ESD Channel 4
Filter 6
6&7
Filter + ESD Channel 4
Ground Pad
GND
Ground
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2
NUF6401
MAXIMUM RATINGS
Parameter
Symbol
Value
Unit
VPP
15
kV
DC Power per Resistor
PR
100
mW
DC Power per Package
PT
600
mW
Operating Temperature Range
TOP
−40 to 105
°C
Storage Temperature Range
TSTG
−55 to 150
°C
TL
260
°C
ESD Discharge IEC61000−4−2
Contact Discharge
Maximum Lead Temperature for Soldering Purposes (1.8 in from case for 10 seconds)
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Parameter
Maximum Reverse Working Voltage
Breakdown Voltage
Symbol
Test Conditions
Min
Typ
VRWM
VBR
IR = 1.0 mA
Leakage Current
IR
VRWM = 3.0 V
VRWM = 5.0 V
Resistance
RA
IR = 10 mA
Diode Capacitance
Cd
Line Capacitance
CL
3 dB Cut−Off Frequency (Note 1)
6 dB Cut−Off Frequency (Note 1)
6.0
Max
Unit
5.0
V
7.0
V
10
50
1000
1000
nA
100
115
VR = 2.5 V, f = 1.0 MHz
17
20
pF
VR = 2.5 V, f = 1.0 MHz
34
40
pF
f3dB
Above this frequency,
appreciable attenuation occurs
110
MHz
f6dB
Above this frequency,
appreciable attenuation occurs
175
MHz
1. 50 source and 50 load termination.
www.onsemi.com
3
85
NUF6401
TYPICAL PERFORMANCE CURVES (TA= 25°C unless otherwise specified)
0
0
−5
−10
−10
−20
S41 (dB)
S21 (dB)
−15
−20
−25
−30
−30
−40
−50
−60
−35
−70
−40
−45
1.0E+6
10E+6
100E+6
1.0E+9
−80
10E+6
10E+9
100E+6
FREQUENCY (Hz)
Figure 4. Typical Insertion Loss Characteristic
10E+9
Figure 5. Typical Analog Crosstalk
2
110
108
106
1.5
RESISTANCE ()
NORMALIZED CAPACITANCE
1.0E+9
FREQUENCY (Hz)
1
0.5
104
102
100
98
96
94
92
0
0
1
2
3
4
90
−40
5
REVERSE VOLTAGE (V)
−20
0
20
40
TEMPERATURE (°C)
60
80
Figure 7. Typical Resistance over Temperature
Figure 6. Typical Capacitance vs.
Reverse Biased Voltage
(Normalized Capacitance, Cd @ 2.5 V)
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4
NUF6401
Theory of Operation
approximation of a square wave, shown below in
Equations 1 and 2 in the Fourier series approximation.
From this it can be seen that a square wave consists of odd
order harmonics and to fully construct a square wave n must
go to infinity. However, to retain an acceptable portion of the
waveform, the first two terms are generally sufficient. These
two terms contain about 85% of the signal amplitude and
allow a reasonable square wave to be reconstructed.
Therefore, to reasonably pass a square wave of frequency x
the minimum filter bandwidth necessary is 3x. All
ON Semiconductor EMI filters are rated according to this
principle. Attempting to violate this principle will result in
significant rounding of the waveform and cause problems in
transmitting the correct data. For example, take the filter
with the response shown in Figure 8 and apply three
different data waveforms. To calculate these three different
frequencies, the 3 dB, 6 dB, and 9 dB bandwidths will be
used.
The NUF6401MN combines ESD protection and EMI
filtering conveniently into a small package for today’s size
constrained applications. The capacitance inherent to a
typical protection diode is utilized to provide the
capacitance value necessary to create the desired frequency
response based upon the series resistance in the filter. By
combining this functionality into one device, a large number
of discrete components are integrated into one small
package saving valuable board space and reducing BOM
count and cost in the application.
Application Example
The accepted practice for specifying bandwidth in a filter
is to use the 3 dB cutoff frequency. Utilizing points such as
the 6 dB or 9 dB cutoff frequencies results in signal
degradation in an application. This can be illustrated in an
application example. A typical application would include
EMI filtering of data lines in a camera or display interface.
In such an example it is important to first understand the
signal and its spectral content. By understanding these
things, an appropriate filter can be selected for the desired
application. A typical data signal is pattern of 1’s and 0’s
transmitted over a line in a form similar to a square wave.
The maximum frequency of such a signal would be the
pattern 1-0-1-0 such that for a signal with a data rate of
100 Mbps, the maximum frequency component would be
50 MHz. The next item to consider is the spectral content of
the signal, which can be understood with the Fourier series
Equation 1:
a
1 sin((2n * 1) t)
x(t) + 1 ) 2
0
2 n + 1 2n * 1
ƪ
ƫ
(eq. 1)
Equation 2 (simplified form of Equation 1):
ƪ
ƫ
sin( 0t) sin(3 0t) sin(5 0t)
)
)
) AAA (eq. 2)
x(t) + 1 ) 2
1
3
5
2
−3 dB
−6 dB
Magnitude (dB)
−9 dB
f1
f2
100k
1M
f3
100M
10M
1G
10G
Frequency (Hz)
Figure 8. Filter Bandwidth
From the above paragraphs it is shown that the maximum
supported frequency of a waveform that can be passed
through the filter can be found by dividing the bandwidth by
a factor of three (to obtain the corresponding data rate
multiply the result by two). The following table gives the
bandwidth values and the corresponding maximum
supported frequencies and the third harmonic frequencies.
www.onsemi.com
5
NUF6401
with a frequency of 66.67 MHz is input to this same filter,
the third harmonic term is significantly attenuated. This
serves to round the signal edges and skew the waveform, as
is shown in Figure 9b. In the case that a 100 MHz signal is
input to this filter, the third harmonic term is attenuated even
further and results in even more rounding of the signal edges
as is shown in Figure 9c. The result is the degradation of the
data being transmitted making the digital data (1’s and 0’s)
more difficult to discern. This does not include effects of
other components such as interconnect and other path losses
which could further serve to degrade the signal integrity.
While some filter products may specify the 6 dB or 9 dB
bandwidths, actually using these to calculate supported
frequencies (and corresponding data rates) results in
significant signal degradation. To ensure the best signal
integrity possible, it is best to use the 3 dB bandwidth to
calculate the achievable data rate.
Table 2. Frequency Chart
Bandwidth
Maximum Supported
Frequency
Third Harmonic
Frequency
3 dB –
100 MHz
33.33 MHz (f1)
100 MHz
6 dB –
200 MHz
66.67 MHz (f2)
200 MHz
9 dB –
300 MHz
100 MHz (f3)
300 MHz
Considering that 85% of the amplitude of the square is in
the first two terms of the Fourier series approximation most
of the signal content is at the fundamental (maximum
supported) frequency and the third harmonic frequency. If a
signal with a frequency of 33.33 MHz is input to this filter,
the first two terms are sufficiently passed such that the signal
is only mildly affected, as is shown in Figure 9a. If a signal
Input Waveform
Output Waveform
a) Frequency = f1
Input Waveform
Output Waveform
b) Frequency = f2
Input Waveform
c) Frequency = f3
Output Waveform
Figure 9. Input and Output Waveforms of Filter
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFN12 3.0x1.35, 0.5P
CASE 506AD−01
ISSUE J
12
1
SCALE 4:1
DATE 09 JUL 2008
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.25 AND 0.30 MM FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
5. EXPOSED PADS CONNECTED TO DIE FLAG.
USED AS TEST CONTACTS.
0.15 C
A
D
B
(A3)
E
2X
0.15 C
EXPOSED Cu
TOP VIEW
PIN ONE
REFERENCE
(A3)
0.10 C
12 X
A
0.08 C
SIDE VIEW
A1
L
1
L1
e
DETAIL A
EXPOSED PAD
6
OPTIONAL
CONSTRUCTION
E2
2X
0.2 X 0.25 MM
NOTE 5
K
12X
12
L
C
D2
DETAIL A
12X
EDGE OF PACKAGE
SEATING
PLANE
7
12X
MILLIMETERS
MIN
MAX
0.80
1.00
0.00
0.05
0.20 REF
0.18
0.30
3.00 BSC
2.10
2.30
1.35 BSC
0.20
0.40
0.50 BSC
0.20
−−−
0.20
0.40
0.00
0.15
DIM
A
A1
A3
b
D
D2
E
E2
e
K
L
L1
GENERIC
MARKING DIAGRAM*
1
XX
XX
MG
G
b
0.10 C A B
0.05 C
BOTTOM VIEW
NOTE 3
XXXX
M
G
SOLDERING FOOTPRINT*
0.479
0.019
= Specific Device Code
= Month Code
= Pb−Free Package
(Note: Microdot may be in either location)
0.265
0.010
*This information is generic. Please refer
to device data sheet for actual part
marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
STYLE 1:
PIN 1. ANODE 1
2. ANODE 2
3. ANODE 3
4. ANODE 4
5. ANODE 5
6. ANODE 6
7. ANODE 7
8. ANODE 8
9. ANODE 9
10. ANODE 10
11. ANODE 11
12. ANODE 12
2.352
0.093
0.500
0.020
Pitch
0.199
0.008
0.351
0.014
SCALE 16:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON19409D
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DFN12 3.0x1.35, 0.5 MM PITCH
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFNW12 3x1.35, 0.5P
CASE 507AY
ISSUE O
12
1
DATE 13 JUN 2019
GENERIC
MARKING DIAGRAM*
1
XX
XX
MG
G
XX
M
G
= Specific Device Code
= Date Code
= Pb−Free Package
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
DOCUMENT NUMBER:
DESCRIPTION:
98AON08530H
DFNW12 3x1.35, 0.5P
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
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and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
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