STK534U362C-E

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Output stage uses IGBT/FRD technology and implements Under Voltage Protection (UVP). Internal Boost diodes are provided for high side gate boost drive. www.onsemi.com Function  Single control power supply due to Internal bootstrap circuit for high side pre-driver circuit  All control input and status output are at low voltage levels directly compatible with microcontrollers.  Built-in cross conduction prevention.  Externally accessible embedded thermistor for substrate temperature measurement Certification  UL1557 (File number: E339285) Specifications Absolute Maximum Ratings at Tc = 25C Parameter Symbol Supply voltage VCC Collector-emitter voltage VCE Output current Io Remarks P to U-, V-, W-, surge < 500 V Ratings *1 V P to U, V, W or U, V, W, to U-, V-, W- 600 V P,U-,V-,W-,U,V,W terminal current ±10 A ±5 A P,U-,V-,W-,U,V,W terminal current, Tc = 100C Output peak current Iop P,U-,V-,W-,U,V,W terminal current, P.W. = 1 ms Pre-driver voltage VD1,2,3,4 VB1 to U, VB2 to V, VB3 to W, VDD to VSS Input signal voltage VIN ±20 A 20 V HIN1, 2, 3, LIN1, 2, 3 0.3 to VDD V 0.3 to VDD V 31.2 W 150 C 40 to +125 C FLTEN terminal voltage VFLTEN FLTEN terminal Maximum power dissipation Pd IGBT per 1 channel Junction temperature Tj IGBT, FRD, Pre-Driver IC Storage temperature Tstg Operating case temperature Tc Tightening torque Unit 450 IPM case A screw part *3 *2 20 to +100 C 0.9 Nm Withstand voltage Vis 50 Hz sine wave AC 1 minute *4 2000 Reference voltage is “VSS” terminal voltage unless otherwise specified. *1: Surge voltage developed by the switching operation due to the wiring inductance between P and U-(V-, W-) terminal. *2: Terminal voltage: VD1 = VB1 to U, VD2 = VB2 to V, VD3 = VB3 to W, VD4 = VDD to VSS. *3: Flatness of the heat-sink should be 0.15 mm and below. *4: Test conditions : AC 2500 V, 1 s. VRMS Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. ORDERING INFORMATION See detailed ordering and shipping information on page 15 of this data sheet. © Semiconductor Components Industries, LLC, 2016 September 2016 - Rev. 1 1 Publication Order Number : STK534U362C-E/D STK534U362C-E Electrical Characteristics at Tc = 25C, VD1, VD2, VD3, VD4 = 15 V Parameter Symbol Conditions Test circuit MIN TYP MAX Unit Power output section Collector-emitter cut-off current Bootstrap diode reverse current Collector to emitter saturation voltage Diode forward voltage Junction to case thermal resistance ICE IR(BD) VCE(SAT) VCE = 600 V VR(BD) = 600 V Ic = 10 A, Tj=25C Ic = 5 A, Tj=100C IF = 10 A, Tj=25C VF IF = 5 A, Tj=100C θj-c(T) IGBT θj-c(D) FWD Fig.1 Fig.2 Fig.3 - - - 100 μA - - 100 μA - 1.6 2.4 1.4 - 1.4 2.1 1.2 - - - 4 - - 6 - 0.08 0.4 - 1.6 4 - V V C /W Control (Pre-driver) section Pre-driver power dissipation VD1,2,3 = 15 V ID VD4 = 15 V Fig.4 mA High level Input voltage Vin H HIN1,HIN2,HIN3, - 2.5 - - V Low level Input voltage Vin L LIN1,LIN2,LIN3 to VSS - - - 0.8 V Logic 1 input leakage current IIN+ VIN = +3.3 V - - 100 143 μA Logic 0 input leakage current IIN- VIN = 0 V - - - 2 μA FLTEN terminal sink current IoSD FAULT:ON / VFLTEN=0.1V - - 2 - mA FLTEN clearance delay time FLTCLR - 1.0 2.0 3.0 ms From time fault condition clear VEN+ VEN rising - - - 2.5 V VEN- VEN falling - 0.8 - - V ITRIP threshold voltage VITRIP ITRIP(16) to VSS(29) - 0.44 0.49 0.54 V ITRIP to shutdown propagation delay tITRIP - 340 550 800 ns ITRIP blanking time tITRIPBL - 250 350 - ns - 10.5 11.1 11.7 V - 10.3 10.9 11.5 V - 0.14 0.2 - V FLTEN Threshold VCC and VBS supply undervoltage protection reset VCC and VBS supply undervoltage protection set VCC and VBS supply undervoltage hysteresis VCCUV+ VBSUV+ VCCUVVBSUVVCCUVH VBSUVH Reference voltage is “VSS” terminal voltage unless otherwise specified. Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. www.onsemi.com 2 STK534U362C-E Electrical Characteristics at Tc = 25C, VD1, VD2, VD3, VD4 = 15 V, VCC = 300 V, L = 3.9 mH Parameter Symbol Conditions Test circuit MIN TYP MAX 0.3 0.5 1.2 - 1.5 2.0 Unit Switching Character Switching time t ON t OFF Io = 10 A Fig.5 Io = 5 A Fig.5 Turn-on switching loss Eon Turn-off switching loss Eoff Total switching loss Turn-on switching loss Turn-off switching loss Eoff Total switching loss Etot Diode reverse recovery energy Erec IF = 5 A, P = 400 V, L = 0.5 mH, - Diode reverse recovery time Trr Tc = 100C - - Reverse bias safe operating area RBSOA Io = 20 A, VCE = 450 V - Short circuit safe operating area SCSOA VCE = 400 V, Tc = 100C - 4 Allowable offset voltage slew rate dv/dt - 50 μs - 240 - μJ - 120 - μJ Etot - 360 - μJ Eon - 270 - μJ - 160 - μJ - 430 - μJ - 17 - μJ 62 - ns - - μs - 50 V/ns Io = 5 A, Tc = 100C Between U,V,W to U-,V-,W- Fig.5 Full square- Reference voltage is “VSS” terminal voltage unless otherwise specified. Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. Notes 1. When the internal protection circuit operates, a Fault signal is turned ON (When the Fault terminal is low level, Fault signal is ON state : output form is open DRAIN) but the Fault signal does not latch.After protection operation ends,it returns automatically within about typ. 2 ms and resumes operation beginning condition. So, after Fault signal detection, set all input signals to OFF (Low) at once. However, the operation of pre-drive power supply low voltage protection (UVLO:with hysteresis about 0.2 V) is as follows. Upper side: The gate is turned off and will return to regular operation when recovering to the normal voltage, but the latch will continue till the input signal will turn ‘low’. Lower side: The gate is turned off and will automatically reset when recovering to normal voltage. It does not depend on input signal voltage. 2. When assembling the IPM on the heat sink with M3 type screw, tightening torque range is 0.6 Nm to 0.9 Nm. 3. When use the over-current protection with external resistor, please set resistance value so that current protection value becomes equal to or less than the double (2 times) of the rating output electric current (Io). www.onsemi.com 3 STK534U362C-E Equivalent Block Diagram VB3(1) W,VS3(2) VB2(5) V,VS2(6) VB1(9) U,VS1(10) P(13) BD BD BD U.V. U.V. U.V. Boot-Resistor U-(17) V-(19) W-(21) Level Shifter Level Shifter Level Shifter HIN1(20) HIN2(22 HIN3(23) Logic LIN1(24) LIN2(25) LIN3(26) TH(27) Thermistor ITRIP(16) VDD(28) VSS(29) Shut down VDD-UnderVoltage FLTEN(18) www.onsemi.com 4 Logic Logic STK534U362C-E Test Circuit (The tested phase : U+ shows the upper side of the U phase and U- shows the lower side of the U phase.)  ICE / IR(BD) M N U+ 13 10 M N U(BD) 9 29 V+ 13 6 W+ 13 2 V(BD) 5 29 U10 17 V6 19 W2 21 W(BD) 1 29 Fig.1  VCE(SAT) (Test by pulse) M N m U+ 13 10 20 V+ 13 6 22 W+ 13 2 23 U10 17 24 V6 19 25 W2 21 26 Fig.2  VF (Test by pulse) M N U+ 13 10 V+ 13 6 W+ 13 2 U10 17 V6 19 W2 21 Fig.3  ID M N VD1 9 10 VD2 5 6 VD3 1 2 VD4 28 29 Fig.4 www.onsemi.com 5 STK534U362C-E  Switching time (The circuit is a representative example of the lower side U phase.) Input signal (0 to 5V) 90% Io 10% tON tOFF Fig.5 www.onsemi.com 6 STK534U362C-E Input / Output Timing Chart VBS undervoltage protection reset signal ON HIN1,2,3 OFF LIN1,2,3 *2 VDD VDD undervoltage protection reset voltage *3 VBS undervoltage protection reset voltage VB1,2,3 VIT≥0.54V *4 ITRIP terminal Voltage VIT