STK5F4U3C2D-E

STK5F4U3C2D-E Intelligent Power Module (IPM) 600 V, 30 A Overview This “Inverter Power IPM” is highly integrated device containing all High Voltage (HV) control from HV-DC to 3-phase outputs in a single DIP module (Dual-In line Package). Output stage uses IGBT / FRD technology and implements Under Voltage Protection (UVP) and Over Current Protection (OCP) with a Fault Detection output flag. Internal Boost diodes are provided for high side gate boost drive. www.onsemi.com Function  Single control power supply due to Internal bootstrap circuit for high side pre-driver circuit  All control inputs and status outputs are at low voltage levels directly compatible with microcontrollers.  A single power supply drive is enabled through the use of bootstrap circuits for upper power supplies  Built-in dead-time for shoot-thru protection  Having open emitter output for low side IGBTs ; individual shunt resistor per phase for OCP  Externally accessible embedded thermistor for substrate temperature measurement  Shutdown function ‘ITRIP’ to disable all operations of the 6 phase output stage by external input Certification  UL1557 (File number : E339285) Specifications Absolute Maximum Ratings at Tc = 25C Parameter Supply voltage Collector-emitter voltage Output current Output peak current Pre-driver supply voltage Input signal voltage Symbol VCC VCE Io Iop VD1, 2, 3, 4 VIN FAULT terminal voltage VFAULT Maximum loss Junction temperature Storage temperature Operating temperature Tightening torque Withstand Voltage Pd Tj Tstg Tc MT Vis Remarks P to NU, NV, NW, surge < 500 V *1 P to U, V, W, U to NU, V to NV, or W to NW P, NU, NV, NW, U, V, W terminal current HIN1, 2, 3, LIN1, 2, 3, terminal Ratings 450 600 ±30 ±15 ±45 20 0.3 to VDD FAULT terminal. 0.3 to VDD V 56.8 150 W P, NU, NV, NW, U, V, W terminal current, Tc = 100C P, NU, NV, NW, U, V, W terminal current, PW = 1 ms VB1 to VS1, VB2 to VS2, VB3 to VS3, VDD to VSS *2 IGBT per channel IGBT, FRD IPM case A screw part at use M4 type screw *3 50 Hz sine wave AC 1 minute *4 40 to +125 20 to +100 1.17 2000 Unit V V A A V V C C C Nm VRMS Reference voltage is “VSS” terminal voltage unless otherwise specified. *1 : Surge voltage developed by the switching operation due to the wiring inductance between the P and N terminals. *2 : Terminal voltage : VD1 = VB1 to VS1, VD2 = VB2 to VS2, VD3 = VB3 to VS3, VD4 = VDD to VSS. *3 : Flatness of the heat-sink should be 0.25 mm and below. *4 : Test conditions : AC 2500 V, 1 s. Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. ORDERING INFORMATION See detailed ordering and shipping information on page 14 of this data sheet. © Semiconductor Components Industries, LLC, 2016 October 2016 - Rev. 1 1 Publication Order Number : STK5F4U3C2D-E/D STK5F4U3C2D-E Electrical Characteristics at Tc = 25C, VD1, VD2, VD3, VD4 = 15 V Parameter Symbol Conditions Test Circuit Ratings Min. Typ. Max. Unit Power output section Collector-to-emitter cut-off current ICE VCE = 600 V Boot-strap diode reverse current IR(BD) VR(BD) = 600 V Collector-to-emitter saturation voltage VCE(sat) Diode forward voltage VF Ic = 30 A, Tj = 25C Fig.1 Fig.2 Ic = 15 A, Tj = 100C IF = 30A, Tj = 25C IF = 15 A, Tj = 100C Fig.3 - - 1.0 mA - - 0.5 mA - 1.7 2.5 - 1.4 - - 1.8 2.7 - 1.5 - V V θj-c(T) IGBT - - 1.8 - C/W θj-c(D) FWD - - 2.3 - C/W - 0.05 0.4 - 1.0 4.0 2.5 - - 0.8 V V 0.44 0.49 0.54 V - 10 - 12 V Junction to case thermal resistance Control (Pre-driver) section VD1, 2, 3 = 15 V Pre-drive power supply consumption current ID High level input voltage Low level input voltage Vin H Vin L HIN1, HIN2, HIN3, LIN1, LIN2, LIN3 ITRIP threshold voltage VITRIP ITRIP(17) to VSS(19) Pre-drive low voltage protection UVLO FAULT terminal input electric current IOSD VFAULT = 0.1 V - - 1.5 - mA FAULT clearance delay time FLTCLR From time fault condition clear - 1.0 - 3.0 ms Thermistor for substrate temperature monitor Rt Resistance between the TH1 and TH2 terminals - 90 - 110 kΩ - 0.6 1.5 μs - 1.2 2.2 μs - 710 - μJ VD4 = 15 V Fig.4 - mA Protection section Fig.5 Switching character Switching time Turn-on switching loss tON tOFF Eon Turn-off switching loss Eoff Total switching loss Etot Turn-on switching loss Eon Turn-off switching loss Eoff Total switching loss Etot Diode reverse recovery energy Erec Diode reverse recovery time Trr Io = 30 A, Inductive load Io = 30 A, VCC =300 V, VD = 15 V, L = 680 μH Io = 15 A, VCC = 300 V, VD = 15 V, L = 680 μH, Tc = 100C Io = 15 A, VCC = 300 V, VD = 15 V, L = 680 μH, Tc = 100C Fig.6 - 570 - μJ - 1280 - μJ - 360 - μJ - 460 - μJ - 820 - μJ - 16 - μJ - 50 - ns Reference Voltage is “VSS” terminal voltage unless otherwise specified. Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. www.onsemi.com 2 STK5F4U3C2D-E Notes 1. Input ON voltage indicates the threshold of input signal voltage to turn on output stage IGBT. Input OFF voltage indicates the threshold of input signal voltage to turn off output stage IGBT. At the time of output ON, set the input signal voltage Vinth(MAX) to 15 V. At the time of output OFF, set the input signal voltage 0 V to Vinth(MIN). *1 The hysteresis voltage is a reference value based on the designed value of built-in pre-driver. 2. When the internal protection circuit operates, a FAULT signal is turned ON (When the FAULT terminal is low level, FAULT signal is ON state : output form is open DRAIN) but the FAULT signal does not latch. After protection operation ends, it returns automatically within about 1 ms to 3 ms and resumes operation beginning condition. So, after FAULT signal detection, set all input signal to OFF (Low) at once. How ever, the operation of pre-drive power supply low voltage protection (UVLO : with hysteresis about 0.2 V) is as follows. Upper side : The gate is turned off and will return to regular operation when recovering to the normal voltage, but the latch will continue till the input signal will turn ‘low’ Lower side : The gate is turned off and will automatically reset when recovering to normal voltage. It does not depend on input signal voltage. 3. When assembling the IPM on the heat sink with M4 type screw, tightening torque range is 0.79 Nm to 1.17 Nm. 4. The pre-drive low voltage protection is the feature to protect a device when the pre-driver supply voltage falls due to an operating malfunction. 5. When use the over-current protection with external resistors, please set the current protection level to be equal or less than the rating of output peak current (Iop). Pin Assignment Pin No. Name Description Pin No. Name Description 1 VB1 High side floating supply voltage 1 44 P Positive bus input voltage 2 VS1 High side floating supply offset voltage 43 P Positive bus input voltage 3 - Without pin 42 P Positive bus input voltage 4 VB2 High side floating supply voltage 2 41 - Without pin 5 VS2 High side floating supply offset voltage 40 U U+ phase output 6 - Without pin 39 U U+ phase output 7 VB3 High side floating supply voltage 3 38 U U+ phase output 8 VS3 High side floating supply offset voltage 37 - Without pin 9 - Without pin 36 V V+ phase output 10 HIN1 Logic input high side driver-Phase1 35 V V+ phase output 11 HIN2 Logic input high side driver-Phase2 34 V V+ phase output 12 HIN3 Logic input high side driver-Phase3 33 - Without pin 13 LIN1 Logic input low side driver-Phase1 32 W W+ phase output 14 LIN2 Logic input low side driver-Phase2 31 W W+ phase output W+ phase output 15 LIN3 Logic input low side driver-Phase3 30 W 16 FAULT Fault out 29 - Without pin 17 ITRIP Over-current protection level setting pin 28 NU U- 18 VDD +15 V main supply 27 NU U- phase output 19 VSS1 Negative main supply 26 NV V- phase output 20 VSS2 Negative main supply 25 NV V- phase output 21 TH1 Thermistor out 24 NW W- phase output 22 TH2 Thermistor out 23 NW W- phase output www.onsemi.com 3 phase output STK5F4U3C2D-E Block Diagram U(38,39,40) V(34,35,36) W(30,31,32) VB1(1) VS1(2) VB2(4) VS2(5) VB3(7) VS3(8) P(42,43,44) DB DB DB U.V. U.V. U.V. RB NU(27,28) NV(25,26) NW(23,24) TH1(21) Thermistor TH2(22) Level Shifter Level Shifter Level Shifter HIN1(10) HIN2(11) HIN3(12) Logic Logic Logic LIN1(13) LIN2(14) LIN3(15) Shutdown ITRIP(17) VDD(18) S + Under voltage Q - Detect Timer VSS1(19) VSS2(20) R Vref Latch time about 1 to 3ms FAULT(16) www.onsemi.com 4 STK5F4U3C2D-E Test Circuit (The tested phase : U+ shows the upper side of the U phase and U shows the lower side of the U phase)  ICE / IR(BD) ICE M N U 42 38 V 42 34 W 42 30 NU 38 27 NV 34 25 NW 30 23 1 M A VD1=15V 2 4 VD2=15V M N U(BD) 1 19 V(BD) 4 19 5 W(BD) 7 19 VCE 7 VD3=15V 8 18 VD4=15V 19,20 N Fig.1  VCE(sat) (Test by pulse) M N m U 42 38 10 V 42 34 11 W 42 30 12 NU 38 27 13 NV 34 25 14 NW 30 23 15 1 M VD1=15V 2 4 VD2=15V 5 V Ic 7 VD3=15V VCE(SAT) 8 18 VD4=15V 5V m 19,20 N Fig.2  VF (Test by pulse) M N U 42 38 V 42 34 W 42 30 NU 38 27 NV 34 25 NW 30 23 M V N Fig.3  ID M N VD1 1 2 VD2 4 5 VD3 7 8 VD4 18 19 ID A M VD* N Fig.4 www.onsemi.com 5 VF IF STK5F4U3C2D-E  ISD (The circuit is a representative example of the lower side U phase) VD1=15V Input signal (0 to 5 V) VD2=15V 1 38 2 4 5 ITRIP VD3=15V Io 7 8 VD4=15V Io Input signal 18 13 19,20 27 Fig.5  Switching time (The circuit is a representative example of the lower side U phase) 42 1 Input signal (0 to 5 V) VD1=15V 2 4 VD2=15V 5 38 90% Vcc 7 Io VD3=15V 10% tON CS 8 18 Io VD4=15V tOFF Input signal 13 19,20 Fig.6 www.onsemi.com 6 27 STK5F4U3C2D-E Input / Output Timing Chart VBS undervoltage protection reset signal ON HIN1,2,3 OFF LIN1,2,3 *2 VDD VDD undervoltage protection reset voltage *3 VBS undervoltage protection reset voltage VB1,2,3 VIT≥0.54V *4 ITRIP terminal Voltage VIT