RP510L Series
4 A Forced PWM Step-down DC/DC Converter with Synchronous Rectifier
No. EA-366-190515
OVERVIEW
The RP510L is a low input voltage step-down DC/DC converter that operates from 2.5 V to 5.5 V and provides up to 4
A of output current (1). It is suitable for power supply of SoC (System-on-a-chip). It is also available in a foldback type
overcurrent protection which automatically recovers to the normal state after the cause of overcurrent is removed.
•
•
•
KEY BENEFITS
The realization of the high-density mounting by the adoption of a small package DFN3030-12.
A simplification of the power sequencing by power-good and adjustable soft-start functions.
Selectable overcurrent protection: Latch type or Foldback type.
KEY SPECIFICATIONS
•
•
•
•
•
•
•
•
•
•
•
TYPICAL CHARACTERISTICS
Operating Temperature Range: −40°C to 85°C
Output Voltage Range(2): 0.8 V to 3.3 V
Output Voltage Accuracy(3) : ±1% (VSET ≥ 1.2 V),
±12 mV (VSET < 1.2 V)
Feedback Voltage Accuracy(4) : ±6 mV (VFB = 0.6 V)
Output/Feedback Voltage Temperature Coefficient: ±100 ppm/°C
Standby Current: Typ.0.35 µA (RP510LxxN)
Typ.0.01 µA or less (RP510LxxG/H/J)
Oscillator Frequency: Typ. 2.3 MHz
Built-in Driver On-resistance (Pch./Nch.): Typ. 0.04 Ω (VIN = 3.6 V)
Maximum Duty Cycle: Min. 100%
Minimum On Time: Typ. 55 ns
Protection Features: UVLO, LX Peak Current Limit, Overcurrent
protection (Latch/Foldback type), and Thermal shutdown.
VOUT = 1.2 V, VIN = 3.3 V/5.0 V (Ta = 25°C)
PACKAGE
TYPICAL APPLICATION CIRCUIT
VIN
CIN
22µF
PVIN
LX
PVIN
LX
AVIN
PGND
RAVIN
1Ω
L
1µH
R1
VOUT
C1
RP510L
CAVIN
0.01µF
PG
PGND
CE
AGND
COUT 1
22µF
COUT 2
22µF
R2
TSS
VFB
DFN3030-12
3.0 x 3.0 x 0.8(1) mm
(1) maximum dimension
RP510L001G/1H/4G/4H (Adjustable Output Voltage Type)
APPLICATIONS
•
•
POL (Point of Load) Converter, and Micro-processor Power Supply with using Battery
Server, Networking Equipment, FPGA, and DSP
(1)
The maximum allowable output current is 4 A but it is a criterion and can be affected by conditions and external parts.
Refer to the section SELECTION GUIDE for details of VSET.
(3) Fixed Output Voltage Type
(4) Adjustable Output Voltage Type
(2)
1
RP510L
No. EA-366-190515
SELECTION GUIDE
The set output voltage, the output voltage type, the auto-discharge function(1), and the protection type are userselectable options.
Selection Guide
Product Name
RP510Lxx$$-TR
Package
Quantity per Reel
Pb Free
Halogen Free
DFN3030−12
3,000 pcs
Yes
Yes
xx: Set Output Voltage (VSET).
Fixed Output Voltage Type: 08 (0.8 V), 10 (1.0 V), 11 (1.1 V), 12 (1.2 V), 13 (1.3 V), 15 (1.5 V),
18 (1.8 V), 30 (3.0 V), 33 (3.3 V)
Adjustable Output Voltage Type: 00 (0.8 V to 3.3 V)
$$: Other Functions
Version
RP510Lxx1G
RP510Lxx1H
RP510L001J
RP510L001N
RP510Lxx4G
RP510Lxx4H
RP510L004J
RP510L004N
(1)
Output Voltage
Type
Fixed
Adjustable
Fixed
Adjustable
Auto-discharge
Function
No
Yes
No
Yes
No
Yes
No
Yes
Oscillator
Frequency
Protection
Type
Latch
2.3 MHz
Foldback
Auto-discharge function quickly lowers the output voltage to 0 V, when the chip enable signal is switched from the
active mode to the standby mode, by releasing the electrical charge accumulated in the external capacitor.
2
RP510L
No. EA-366-190515
BLOCK DIAGRAM
RP510Lxx1G/4G/1H/4H (Fixed Output Voltage Type)
PVIN
Ramp
Compensation
AVIN
Thermal
Protection
UVLO
Current
Detector
LX
Switching
Control
Vref
Soft Start
TSS
Current
Feedback
(“L” during
Soft Start)
PGND
OSC
VOUT
PG
Chip
Enable
CE
Over /Under
Voltage
Detection
OVD
UVD
AGND
RP510Lxx1G/ 4G Block Diagram
PVIN
Ramp
Compensation
AVIN
Soft Start
TSS
Thermal
Protection
UVLO
Vref
Current
Feedback
Current
Detector
LX
Switching
Control
(“L” during
Soft Start)
PGND
OSC
VOUT
CE
Chip
Enable
PG
Over /Under
Voltage
Detection
OVD
UVD
AGND
RP510Lxx1H/ 4H Block Diagram
3
RP510L
No. EA-366-190515
RP510L001J/4J/1N/4N (Adjustable Output Voltage Type)
PVIN
Ramp
Compensation
AVIN
Thermal
Protection
UVLO
Current
Detector
LX
Switching
Control
Vref
Soft Start
TSS
Current
Feedback
(“L” during
Soft Start)
PGND
OSC
VFB
CE
PG
Chip
Enable
Over /Under
Voltage
Detection
OVD
UVD
AGND
RP510L001J/ 4J Block Diagram
PVIN
Ramp
Compensation
AVIN
Soft Start
TSS
Thermal
Protection
UVLO
Vref
Current
Feedback
Current
Detector
LX
Switching
Control
(“L” during
Soft Start)
PGND
OSC
VFB
CE
Chip
Enable
PG
Over /Under
Voltage
Detection
AGND
RP510L001N/ 4N Block Diagram
4
OVD
UVD
RP510L
No. EA-366-190515
PIN DESCRIPTION
Bottom View
Top View
1
2
12
11
12
11
3
4
10
9
8
10
9
5
6
7
∗
1
2
3
4
5
6
8
7
DFN3030-12 Pin Configurations
DFN3030-12 Pin Description
Pin No.
Pin Name
Description
1
PVIN (1)
Input Voltage Pin
2
PVIN (1)
Input Voltage Pin
3
AVIN
(2)
Input Voltage Pin
4
PG
Power Good Pin, NMOS Open-drain
5
CE
Chip Enable Pin, Active-high
6
TSS
Soft-start Pin
7
VOUT/ VFB
(3)
Output Voltage Pin / Feedback Voltage Pin
8
AGND
Analog Ground Pin
9
PGND (3)
Power Ground Pin
10
PGND (3)
Power Ground Pin
11
LX
Switching Pin
12
LX
Switching Pin
∗ The tab on the bottom of the package must be connected to the ground plane on the board to enhance thermal
performance.
(1)
No.1 pin and No.2 pin must be wired to the VIN plane when mounting on boards.
No.3 pin must be wired to No.1 and No.2 pins via a low-pass filter (LPF: 1 Ω, 10 nF) when mounting on boards.
(3) No.8 pin, No.9 pin and No.10 pin must be wired to the GND plane when mounting on boards.
(2)
5
RP510L
No. EA-366-190515
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings
Symbol
(AGND = PGND = 0 V)
Rating
Unit
Parameter
−0.3 to 6.5
V
LX Pin Voltage
−0.3 to VIN + 0.3
V
CE Pin Voltage
−0.3 to 6.5
V
Output Voltage / Feedback Voltage
−0.3 to 6.5
V
VPG
PG Pin Voltage
−0.3 to 6.5
V
VTSS
TSS Pin Voltage
−0.3 to VIN + 0.3
V
3400
mW
VIN
A/PVIN Pin Voltage
VLX
VCE
VOUT/ VFB
PD
Power Dissipation (1)
Tj
Junction Temperature Range
−40 to 125
°C
Tstg
Storage Temperature Range
−55 to 125
°C
DFN3030-12
JEDEC STD. 51-7
ABSOLUTE MAXIMUM RATINGS
Electronic and mechanical stress momentarily exceeded absolute maximum ratings may cause permanent damage
and may degrade the life time and safety for both device and system using the device in the field.
The functional operation at or over these absolute maximum ratings are not assured.
RECOMMENDED OPERATING CONDITIONS
Recommended Operating Conditions
Symbol
Parameter
Rating
Unit
VIN
Input Voltage
2.5 to 5.5
V
Ta
Operating Temperature Range
−40 to 85
°C
RECOMMENDED OPERATING CONDITIONS
All of electronic equipment should be designed that the mounted semiconductor devices operate within the
recommended operating conditions. The semiconductor devices cannot operate normally over the recommended
operating conditions, even if they are used over such conditions by momentary electronic noise or surge. And the
semiconductor devices may receive serious damage when they continue to operate over the recommended operating
conditions.
(1)
6
Refer to POWER DISSIPATION for detailed information.
RP510L
No. EA-366-190515
ELECTRICAL CHARACTERISTICS
The specifications surrounded by
are guaranteed by design engineering at −40°C ≤ Ta ≤ 85°C.
RP510Lxx1/4 Electrical Caharacteristics
Symbol
ISTANDBY
Parameter
Standby Current
(Ta = 25°C)
Test Conditions/Comments
VIN = 5.5 V,
VCE = 0 V
Min.
Typ.
Max.
RP510LxxxN
0.35
15.5
RP510LxxxG/H/J
0.01
7.5
Unit
µA
MΩ
RCE
CE Pin Pull-down Resistance
ICEL
CE Pin Input Current, Low
VIN = 5.5 V, VCE = 0 V
−1
0
1
µA
ILXLEAKH
LX Pin Leakage Current, High
VIN = VLX = 5.5 V, VCE = 0 V
−1
0
3
µA
ILXLEAKL
LX Pin Leakage Current, Low
VIN = 5.5 V, VCE = VLX = 0 V
-10
0
1
µA
VCEH
CE Pin Input Voltage, High
VIN = 5.5 V
1.0
VCEL
CE Pin Input Voltage, Low
VIN = 2.5 V
tSTART1
Soft-start Time1
tSTART2
Soft-start Time2
ILXLIM
LX Current Limit
tPROT
Protection Delay Time
VUVLO1
VUVLO2
TTSD
TTSR
RPGDIS
fOSC
UVLO Threshold Voltage
1
VIN = VCE = 3.6 V or VSET + 1 V,
TSS = OPEN
VIN = VCE = 3.6 V or VSET + 1 V,
CSS = 0.1 µF
V
0.4
V
75
150
300
µs
15
30
45
ms
VIN = VCE = 3.6 V or VSET + 1 V
5000
6500
VIN = VCE = 3.6 V or VSET + 1 V
0.5
1.5
5
ms
VIN = VCE,, Falling
2.1
2.2
2.3
V
VIN = VCE, Rising
2.2
2.3
2.4
V
Thermal Shutdown Threshold
Temperature, Detection
Thermal Shutdown Threshold
Temperature, Release
PG Pin Low Output
ON Resistance
Oscillation Frequency
VIN = VCE = 3.6 V or VSET + 1 V
mA
Tj, Rising
165
°C
Tj, Falling
115
°C
VIN = 3.6 V,
VOUT = 0 V or VFB = 0 V
45
Ω
2.00
2.3
2.50
MHz
All test items listed under Electrical Characteristics are done under the pulse load condition (Tj ≈ Ta = 25°C).
7
RP510L
No. EA-366-190515
The specifications surrounded by
are guaranteed by design engineering at −40°C ≤ Ta ≤ 85°C.
RP510Lxx1G/1H/4G/4H Electrical Characteristics: Fixed Output Voltage Type
Symbol
Parameter
Test Conditions/Comments
VSET ≥ 1.2 V
VOUT
Output Voltage
VIN = VCE = 3.6 V
or VSET + 1 V
VSET < 1.2 V
ISS
Supply Current
VIN = VCE = 5.5 V
IVOUTL
VOUT Pin Current, Low
VIN = 5.5 V, VCE = VOUT = 0 V
VOVD
OVD Voltage
VIN = 3.6 V
VUVD
UVD Voltage
VIN = 3.6 V
(Ta = 25°C)
Min.
Typ.
Max.
x0.99
x1.01
x0.98
x1.02
−0.012
0.012
−0.024
0.024
800
−1
0
Unit
V
µA
1
VSET
× 1.2
VSET
× 0.8
µA
V
V
RP510Lxx1G/4G: Auto-discharge Function Not Included
IVOUTH
VOUT Pin Current, High
VIN = VOUT = 5.5 V, VCE = 0 V
−1
0
1
µA
RP510Lxx1H/4H: Auto-discharge Function Included
RVOUTDIS
VOUT Pin Discharge
NMOS ON-resistance
VIN = 2.5 V, VCE = 0 V, VOUT = 0.5 V
Ω
45
RP510L001J/1N/4J/4N Electrical Characteristics: Adjustable Output Voltage Type
Symbol
Parameter
Test Conditions/Comments
Min.
Typ.
Max.
0.594
0.600
0.606
0.588
0.600
0.612
Unit
VFB
Feedback Voltage
VIN = VCE = 3.6 V
ISS
Supply Current
VIN = VCE = 5.5 V
IVFBH
VFB Pin Current, High
VIN = VFB = 5.5 V, VCE = 0 V
−1
0
1
µA
IVFBL
VFB Pin Current, Low
VIN = 5.5 V, VCE = VFB = 0 V
−1
0
1
µA
VOVD
OVD Voltage
VIN = 3.6 V
0.72
V
VUVD
UVD Voltage
VIN = 3.6 V
0.48
V
65
Ω
800
V
µA
RP510L001N/4N: Auto-discharge Function Included
RLXDIS
LX Pin Discharge
NMOS ON-resistance
VIN = 2.5 V, VCE = 0 V, LX = 0.5 V
All test items listed under Electrical Characteristics are done under the pulse load condition (Tj ≈ Ta = 25°C).
8
RP510L
No. EA-366-190515
The specifications surrounded by
are guaranteed by design engineering at −40°C ≤ Ta ≤ 85°C.
RP510Lxx1G/1H/4G/4H Electrical Characteristics: Fixed Output Voltage Type
VOUT [V]
Product Name
Ta = 25°C
−40°C ≤ Ta ≤ 85°C
Min.
Typ.
Max.
Min.
Typ.
RP510x08xx
0.788
0.800
0.812
0.776
0.800
RP510x10xx
0.988
1.000
1.012
0.976
1.000
RP510x11xx
1.088
1.100
1.112
1.076
1.100
RP510x12xx
1.188
1.200
1.212
1.176
1.200
RP510x13xx
1.287
1.300
1.313
1.274
1.300
RP510x15xx
1.485
1.500
1.515
1.470
1.500
RP510x18xx
1.782
1.800
1.818
1.764
1.800
RP510x30xx
2.970
3.000
3.030
2.940
3.000
RP510x33xx
3.267
3.300
3.333
3.234
3.300
Max.
0.824
1.024
1.124
1.224
1.326
1.530
1.836
3.060
3.366
9
RP510L
No. EA-366-190515
THEORY OF OPERATION
Soft-start
Starting-up with CE Pin
The device starts to operate when the CE pin voltage (VCE) exceeds the threshold voltage. The threshold
voltage is preset between CE “High” input voltage (VCEH) and CE “Low” input voltage (VCEL). The soft-start
circuit also starts to operate after the device start-up. Then, after a certain period of time, the reference
voltage (VREF) in the device gradually increases up to the specified value.
Notes: Soft-start time (tSTART)(1) might not be always equal to an actual turn-on speed of the output voltage.
Please note that the turn-on speed could be affected by the power supply capacity, the output current, the
inductance value, and the COUT value.
CE Pin Input Voltage
(VCE)
Internal Reference Voltage
(VREF)
LX Voltage
(VLX)
VCEH
Threshold Level
VCEL
Soft-start Time (tSTART)
Soft-start Circuit
operation starts.
Output Voltage
(VOUT)
Depending on Power Supply,
Load Current, External Components
Timing Chart when Starting-up with CE Pin
Starting-up with Power Supply
After the power-on, the device starts to operate when VIN exceeds the UVLO released voltage (VUVLO2). The
soft-start circuit also starts to operate. Then after a certain period of time, VREF gradually increases up to the
specified value. Please note that the turn-on speed of VOUT could be affected by the following conditions.
1. Power supply capacity and Turn-on speed of VIN determined by CIN
2. Values of Inductor, Capacitor and Output current
Input Voltage
(VIN)
VSET
VUVLO2
VUVLO1
Soft-start Time (tSTART)
Internal Reference Voltage
(VREF)
LX Voltage
(VLX)
VOUT
Output Voltage
(VOUT)
Depending on Power Supply, Load Current,
External Components
Timing Chart when Starting-up with Power Supply
(1)
Soft-start time (tSTART) indicates the duration until the reference voltage (VREF) reaches the specified voltage after softstart circuit’s activation.
10
RP510L
No. EA-366-190515
Soft-start Time Adjustment
Soft-start time (tSTART) of the RP510L is adjustable by connecting a soft-start time adjustment capacitor (CSS)
between the TSS pin and GND. tSTART can be set from Typ. 0.15 ms as a lower limit. As the figure below shows,
tSTART is Typ. 30 ms when CSS is 0.1 µF. If not requiring to adjust tSTART, tSTART is set to 0.15 ms (Typ.) by making
the TSS pin open. The capacitance value for required soft-start time (tSTART) can be calculated by the following
equation.
CSS [nF] = 3.5 × tSTART [ms]
tSTART
30ms
15ms
3ms
0.15ms
0
470pF
0.01μF
0.047μF
0.1μF
CSS
CSS vs. tSTART (Typ.)
Soft-start Time (tSTART) vs. Soft-start Time Adjustment Capacitor (CSS)
Power Good Function
If any condition as follows is detected, power good function with using Nch. open drain turns Nch. transistor
ON and switches the PG pin to “Low”. After the condition is removed, the power good function turns Nch.
transistor OFF and switches the PG pin back to “High”. The time until the Nch. transistor is turned OFF includes
the release delay time of 0.05 ms (Typ.).
• CE = ”L” (Shutdown)
• UVLO
• Thermal Shutdown
• Over Voltage Detection (Typ.):
VOUT > VSET x 1.2 V (RP510Lxx1G/1H/4G/4H) or VFB > 0.72 V (RP510L001J/1N/4J/4N)
• Under Voltage Detection (Typ.):
VOUT < VSET x 0.8 V (RP510Lxx1G/1H/4G/4H) or VFB < 0.48 V (RP510L001J/1N/4J/4N)
• During the Latch Type Protecting operation
Notes: When using the power good function, the resistance of PG pin (RPG) should be between 10 kΩ to 100
kΩ. The PG pin must be open or connected to GND if the power good function is not used.
11
RP510L
No. EA-366-190515
Under Voltage Lockout (UVLO)
If VIN becomes lower than VSET, the step-down DC/DC converter stops the switching operation and ON duty
becomes 100%, and then VOUT gradually drops according to VIN.
If the VIN drops more and becomes lower than the UVLO detector threshold (VUVLO1), the UVLO circuit starts
to operate, VREF stops, and Pch. and Nch. built-in transistors become the OFF state. As a result, VOUT drops
according to the COUT capacitance value and the load.
To restart the operation, VIN is required to be higher than VUVLO2. The timing chart below shows the voltage
shifts of VREF, VLX and VOUT in response to variation of the VIN value.
Notes: Falling edge (operating) and rising edge (releasing) waveforms of VOUT might be affected by the initial
voltage of COUT and the output current of VOUT.
Input Voltage
(VIN)
VSET
VUVLO2
VUVLO1
Soft-start Time (tSTART)
Internal Reference Voltage
(VREF)
LX Voltage
(VLX)
Output Voltage
(VOUT)
VOUT
Depending on Power Supply, Load Current,
External Components
Timing Chart with Variations in Input Voltage (VIN)
Current limit Function
Current limit circuit supervises the inductor current flowing through the Pch. transistor in each switching cycle.
If the current exceeds the LX current limit (ILXLIM, Typ.6.5 A), a Pch. transistor is turned off and the upper limit
of the inductor peak current is imposed.
12
RP510L
No. EA-366-190515
Latch Type Protection (RP510Lxx1G/1H, RP510L001J/1N)
Latch type protection circuit latches Pch. and Nch. transistors in the OFF state and stops the operation of the
step-down DC/DC converter when the over current status or the output voltage (VOUT) / the feedback voltage
(VFB) being dropped to the half of the setting voltage due to shorting continues for the protection delay time
(tPROT). To release the latch type protection circuit, restart the device by inputting "Low" signal to the CE pin or
making the supply voltage lower than VUVLO1.
Protection Delay Time (tPROT)
IL flowing through L
Lx Limit Current
(ILXLIM)
Current flowing through Pch Tr.
Lx Voltage
(VLX)
Protection Delay Time
The timing chart below shows the voltage shift of VCE, VLX and VOUT when the device status is changed by the
following orders: VIN rising → stable operation → high load → CE reset → stable operation → VIN falling → VIN
recovering (UVLO reset) → stable operation.
(1)(2) If the overcurrent flows through the circuit or the device goes into low VOUT condition due to short-circuit
or other reasons, the latch type protection circuit latches Pch. and Nch. transistors in the OFF state after
tPROT. Then, VLX becomes "Low" and VOUT turns OFF.
(3) The latch type protection circuit is released by CE reset, which puts the device into "Low" once with the CE
pin and back into "High".
(4) The latch type protection circuit is released by UVLO reset, which makes VIN lower than VUVLO1.
(1)
(3)
(2)
(4)
SET
Input Voltage UVLO Released VoltageV(V
UVLO2)
(VIN)
UVLO Detector Threshold (VUVLO1)
CE Pin
Input Voltage
(VCE)
Lx Voltage
(VLX)
Output Voltage
(VOUT)
UVLO Reset
VSET
CE Reset
Threshold Level
Protection Delay Time
Protection Delay Time
VSET
VSET
Latch-type Protection
Stable
Operation
Soft-start Time
Stable
Operation
Soft-start Time
Latch-type Protection
Stable
Operation
Soft-start Time
Timing Chart
13
RP510L
No. EA-366-190515
Foldback Protection (RP510Lxx4G/4H, RP510L004J/4N)
If the device is in a state where an overcurrent is detected during protection delay time (tPROT) or a state where
the output voltage (VOUT) or the feedback voltage (VFB) becomes lower than UVD detector threshold (VUVD) over
about 20 µsec while the overcurrent is caused by an output short-circuit, the foldback protection is enabled.
During the foldback protection, the inductor current is set to the upper limit of 1/2 of LX limit current (ILXLIM) and
the lower limit of 0mA. During the foldback protection, the device alternately operates the following Pch. and Nch.
transistor as follows: the Pch. transistor is turned ON until the inductor current reach the upper limit and the Nch.
transistor is turned ON until the inductor current reach 0mA. Therefore, the switching frequency is decreased
and the upper limit of the output current (IOUT_SHORT) during the foldback protection is limited to a current value
calculated by the following equation.
IOUT_SHORT = ILXLIM / 4
When the short-circuit and the overcurrent states are released and the output current (IOUT) becomes less than
IOUT_SHORT, the output voltage reaches the set output voltage. Then, the foldback protection is released. And
also, the foldback protection is released when the device is reset by inputting CE pin to “Low” or by decreasing
the input voltage to less than the UVLO detector threshold (VUVLO1). If the foldback protection occurs by the
short-circuit and the overcurrent states when IOUT exceed IOUT_SHORT, the device might not return to a normal
state even if their states are released. Release of the foldback protection is required to reduce IOUT less than
IOUT_SHORT or reset the device.
Delay Time:Typ.20µsec
Foldback Duration
Inductor Current
0A
LX limit Current
(ILXLIM)
ILXLIM / 2
Current
for Pch. transistor
LX Voltage
(VLX)
VOUT Voltage
(VOUT)
0V
UVD Detector
Threshold (VUVD)
Foldback Protection Timing Chart at Low Output Voltage
Note: The current limit function and the overcurrent limit protection of the latch / foldback type, as described
above, becomes possible to provide a high degree of safety to the device, not to secure reliability. And, ILXLIM
and tPROT could be easily affected by self-heating or ambient environment. If the VIN drops dramatically or
becomes unstable due to short-circuit, protection operation and tPROT could be affected.
14
RP510L
No. EA-366-190515
Reverse Current Limit Function
The reverse current limit function supervises the current on the Nch. transistor in every switching. When an
overcurrent more than the threshold current (Typ. -2.0 A) occur, the Nch. transistor is turned off to limit a lower
of the inductor current. On the heavy-to-light load transient, the reverse current limit function may occur by the
overcurrent. If this limit function occur, the reduction of the output voltage overshoot by reverse current will be
limited.
15
RP510L
No. EA-366-190515
APPLICATION INFORMATION
Conditions: Power Good enabled, Soft-start time of 30 ms
VIN
RPG
100kΩ
CIN
22µF
PVIN
LX
PVIN
LX
AVIN
PGND
RAVIN
1Ω
L
1µH
VOUT
RP510L
PG
PGND
CE
AGND
TSS
VOUT
COUT1
22µF
PG
CAVIN
0.01µF
CSS
0.1µF
COUT2
22µF
RP510Lxx1G/1H/4G/4H (Fixed Output Voltage Type) Typical Application Circuit
Conditions: Power Good disabled, Soft-start time of 150 µs
VIN
CIN
22µF
PVIN
LX
PVIN
LX
AVIN
PGND
RAVIN
1Ω
L
1µH
R1
VOUT
C1
RP510L
PG
PGND
CE
AGND
COUT1
22µF
COUT2
22µF
R2
CAVIN
0.01µF
TSS
VFB
RP510L001J/1N/4J/4N (Adjustable Output Voltage Type) Typical Application Circuit
Recommended External Components
Symbol
Descriptions
22 μF, Ceramic Capacitor,
CIN
CGA5L1X7R0J226M160AC (TDK) / C2012X6S0J226M125AB (TDK)
22 µF x 2, Ceramic Capacitor,
COUT
CGA5L1X7R0J226M160AC (TDK) / C2012X6S0J226M125AB (TDK)
1.0 µH, Inductor,
L
CLF7045NIT-1R0N-D (TDK) / SPM4012T-1R0M-LR (TDK) / VLS3012HBX-1R0M (TDK)
16
RP510L
No. EA-366-190515
Cautions in selecting external components
•
Choose a low ESR ceramic capacitor. The input capacitor (CIN) between PVIN and PGND should be more
than 22 µF, and the output capacitor (COUT) should be used by two or more parallel connection with ceramic
capacitor of 22 µF.
•
The phase compensation of this device is designed according to the COUT and L values. The inductance
value of an inductor should be 1.0µH to gain stability.
•
Choose an inductor that has small DC resistance, has enough permissible current and is hard to cause
magnetic saturation. If the inductance value of the inductor becomes extremely small under the load
conditions, the peak current of LX may increase along with the load current. As a result, the overcurrent
protection circuit may start to operate when the peak current of LX reaches to LX limit current. Therefore,
choose an inductor with consideration for the value of ILXMAX. See the following page of Calculation
Conditions of LX Pin Maximum Output Current (ILXMAX).
•
As for the adjustable output voltage type (RP510L001J/1N/4J/4N), the output voltage (VOUT) is adjustable
by changing the resistance values of R1 and R2.
VSET(1)= VFB × (R1 + R2) / R2, (0.8 V ≤ VSET ≤ 3.3 V)
If R2 are too large, the impedance of VFB also become large, as a result, the device could be easily affected
by noise. For this reason, R2 should be 30kΩ or less. If the operation becomes unstable dues to the high
impedances, the impedances should be decreased.
C1 can be calculated by the following equation. Please use the value close to the calculation result.
C1 = 5 × 10-7 / R2 [F]
The recommended component values for R1, R2, and C1 are as follows.
Set Output Voltage (VSET) vs. Resistor (R1, R2), Capacitor (C1)
Resistor [kΩ]
Set Output Voltage
VSET [V]
R1
R2
0.8
10
30
1.2
20
20
1.8
40
20
2.5
95
30
3.3
90
20
(1)
Capacitor [pF]
C1
16
25
25
16
25
VSET: set output voltage
17
RP510L
No. EA-366-190515
Calculation Conditions of LX Pin Maximum Output Current (ILXMAX)
The following equations explain the relationship to determine ILXMAX at the ideal operation of the device in
continuous mode.
IRP：Ripple Current P-P value
RONP / RONN：ON resistance of Pch. / Nch. transistor
RL：DC resistance of the inductor
First, when the Pch. transistor is “ON”, Equation 1 is satisfied.
VIN = VOUT + (RONP + RL) × IOUT + L × IRP / tON ·································································· Equation 1
Second, when the Pch. transistor is "OFF" (the Nch. transistor is "ON"), Equation 2 is satisfied.
L × IRP / tOFF = RONN × IOUT + VOUT + RL × IOUT ·································································· Equation 2
Put Equation 2 into Equation 1 to solve ON duty of the Pch. transistor (DON = tON / (tOFF + tON)):
DON = (VOUT + RONN × IOUT + RL × IOUT) / (VIN + RONN × IOUT − RONP × IOUT) ······························· Equation 3
Ripple Current is described as follows:
IRP = (VIN − VOUT − RONP × IOUT − RL × IOUT) × DON / fOSC / L ················································· Equation 4
Peak current that flows through L, and Pch.and Nch. transistors is described as follows:
ILXMAX = IOUT + IRP / 2 ································································································· Equation 5
18
RP510L
No. EA-366-190515
Example applications: Control sequencer
Sequencer control can establishes by using the soft-start time adjustment and the power good functions of
the RP510L. The following figure indicates an application circuit example with using two RP510L (DCDC1
and DCDC2).
DCDC1 starts up prior to DCDC2. After DCDC1 reaches the output voltage of typ.1.44 V (VSET x 0.8), CE pin
of DCDC2 receives "High" signal from PG pin of DCDC1, and the DCDC2's soft-start starts.
DCDC1 (RP510L001J/1N): VIN = 5.0 V, VOUT = 1.8 V, tSTART = 30 ms, CSS = 0.1 μF
DCDC2 (RP510L001J/1N): VIN = 5.0 V, VOUT = 1.2 V, tSTART = 30 ms, CSS = 0.1 μF
VIN=5.0V
LX
PVIN
RAVIN1
1Ω
CIN1
22µF
PVIN
CAVIN1
0.01µF
CSS1
0.1µF
RAVIN2
1Ω
CIN2
22µF
VOUT1
1.8V
LX
RP510L001J/N
AVIN
PGND
RPG1
100kΩ
L1
1µH
PG
DCDC1
PGND
CE
AGND
TSS
VFB
PVIN
LX
PVIN
40kΩ
25pF
COUT11 COUT12
22µF 22µF
20kΩ
L2
1µH
VOUT2
1.2V
LX
RP510L001J/N
AVIN
PGND
20kΩ
25pF
DCDC2
CAVIN2
0.01µF
CSS2
0.1µF
PG
PGND
CE
AGND
TSS
COUT21
22µF
COUT22
22µF
20kΩ
VFB
Sequence Control Application Circuit Example
19
RP510L
No. EA-366-190515
TECHNICAL NOTES
The performance of a power source circuit using this device is highly dependent on a peripheral circuit. A
peripheral component or the device mounted on PCB should not exceed a rated voltage, a rated current or a
rated power. When designing a peripheral circuit, please be fully aware of the following points.
AGND and PGND must be wired to the GND plane when mounting on boards.
AVIN must be connected to between an input capacitor (CIN) and PVIN via a low-pass filter (Recommended
LPF: 1 Ω, 10 nF). Place a capacitor between AVIN and AGND as close as possible to the IC.
Set the external components as close as possible to the IC and minimize the wiring between the
components and the IC. Especially, place CIN as close as possible to PVIN pin and PGND.
Use the VIN and the GND lines as wide and short as possible to make low impedance, since noise pickup
or unstable operation occurs when their impedance are too high.
The VIN line, the GND line, the VOUT line, an inductor, and LX should make special considerations for the
large switching current flows.
For the feedback of output voltage, the wiring to the VOUT pin (RP510Lxx1G/1H/4G/4H) or to a resistor for
setting output voltage (R1) (RP510L001J/1N/4J/4N) must be taken from the connection with the output
capacitor, and also the wiring should be separated from the wiring between the output capacitor and Load.
Overcurrent protection circuit and latch / foldback type protection circuit may be affected by self-heating or
power dissipation environment.
When not using the soft-start time adjustment, always make TSS pin open.
When not using the power good function, PG pin should be Open or connected to GND.
20
RP510L
No. EA-366-190515
PCB Layout Example
RP510L001J/1N/4J/4N (Adjustable Output Voltage Type)
Layer 1 (Top)
Layer 2
Layer 3
Layer 4 (Bottom)
∗ The LPF between PVIN and AVIN is recommended to place to the layer 1 (Top) is recommended.
∗∗ R11 and R12 are arranged as a substitute for R1 so that two resistors can be connected in series.
21
RP510L
No. EA-366-190515
RP510Lxx1G/1H/4G/4H (Fixed Output Voltage Type)
Layer 1 (Top)
Layer 2
Layer 3
Layer 4 (Bottom)
∗ LPF between PVIN and AVIN is recommended to place to Layer 1 (Top) is recommended.
22
RP510L
No. EA-366-190515
TYPICAL CHARACTERISTICS
Typical Characteristics are intended to be used as reference data, they are not guaranteed.
1) Output Voltage vs. Output Current
VOUT = 0.8 V
VOUT = 1.2 V
VOUT = 3.3 V
2) Output Voltage vs. Input Voltage
VOUT = 1.2 V
3) Feedback Voltage vs. Temperature
RP510L001J/1N/4J/4N/
4) Output Voltage vs. Temperature
RP510Lxx1G/1H/4G/4H
VOUT = 1.2 V
23
RP510L
No. EA-366-190515
5) Efficiency vs. Output Current
VOUT = 0.8 V
VOUT = 1.2 V
VOUT = 3.3 V
6) Current Consumption vs. Temperature
VIN = 5.5 V
7) Current Consumption vs. Input Voltage
24
RP510L
No. EA-366-190515
8) Output Voltage Waveform
VOUT = 1.2 V, IOUT = 0mA
VOUT = 1.2 V, IOUT = 4000mA
9) Oscillation Frequency vs. Temperature
10) Oscillation Frequency vs. Input Voltage
11) Soft-start time vs. Temperature
CSS = open
CSS = 0.1µF
25
RP510L
No. EA-366-190515
12) UVLO vs. Temperature
UVLO detection voltage
UVLO release voltage
13) CE Input Voltage vs. Temperature
CE "H" input voltage
VIN = 5.5 V
CE "L" input voltage
VIN = 2.5 V
14) LX Limit Current vs. Temperature
26
RP510L
No. EA-366-190515
15) PG Detection Voltage vs. Temperature
Over Voltage Detection
Under Voltage Detection
16) Soft-start Waveform
VOUT = 1.2 V, CSS = open
VOUT = 1.2 V, CSS = 0.1µF
17) Load Transient Response
VIN = 3.3 V, VOUT = 1.2 V
IOUT = 0.5 A ↔ 3.5 A
VIN = 5.0 V, VOUT = 1.2 V
IOUT = 0.5 A ↔ 3.5 A
27
RP510L
No. EA-366-190515
18) Output Short-circuit Waveform
RP510Lxx1G/1H/1J/1N (Latch Type)
VIN = 5.0 V, VOUT = 0.8 V
19) Output Short-circuit Release Waveform
RP510Lxx4G/4H/4J/4N (Foldback Type)
VIN = 5.0 V, VOUT = 0.8 V
28
RP510Lxx4G/4H/4J/4N (Foldback Type)
VIN = 5.0 V, VOUT = 0.8 V
POWER DISSIPATION
DFN3030-12
Ver. A
The power dissipation of the package is dependent on PCB material, layout, and environmental conditions.
The following measurement conditions are based on JEDEC STD. 51-7.
Measurement Conditions
Item
Measurement Conditions
Environment
Mounting on Board (Wind Velocity = 0 m/s)
Board Material
Glass Cloth Epoxy Plastic (Four-Layer Board)
Board Dimensions
76.2 mm × 114.3 mm × 0.8 mm
Copper Ratio
Outer Layer (First Layer): Less than 95% of 50 mm Square
Inner Layers (Second and Third Layers): Approx. 100% of 50 mm Square
Outer Layer (Fourth Layer): Approx. 100% of 50 mm Square
Through-holes
φ 0.3 mm × 32 pcs
Measurement Result
(Ta = 25°C, Tjmax = 125°C)
Item
Measurement Result
Power Dissipation
3400 mW
Thermal Resistance (θja)
θja = 29°C/W
Thermal Characterization Parameter (ψjt)
ψjt = 3.1°C/W
θja: Junction-to-Ambient Thermal Resistance
ψjt: Junction-to-Top Thermal Characterization Parameter
4000
3400
Power Dissipation (mW)
3500
3000
2500
2000
1500
1000
500
0
0
25
50
75 85
100
125
Ambient Temperature (°C)
Power Dissipation vs. Ambient Temperature
Measurement Board Pattern
i
PACKAGE DIMENSIONS
DFN3030-12
Ver. A
3.0
A
B
7
12
0.1
0.40±0.05
X4
1.7±0.1
3.0
2.5±0.1
C 0.35
0.203 typ
0.8 max.
INDEX
S
6
1
0.5
0.25±0.05
0.05 M AB
Bottom View
0.05 S
DFN3030-12 Package Dimensions (Unit: mm)
*
i
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